PSoC: Fix compilation errors when FIH is enabled.

For some levels of FIH, some or all of the following functions
still need to be implemented:
tfm_hal_verify_static_boundaries()
tfm_fih_random_init()
tfm_fih_random_generate()

Signed-off-by: Chris Brand <chris.brand@cypress.com>
Change-Id: I028f1c71605e1e3ea73370d8f63e6acd10a6c2cd
diff --git a/platform/ext/target/cypress/psoc64/tfm_hal_isolation.c b/platform/ext/target/cypress/psoc64/tfm_hal_isolation.c
index b1e08e1..70c5ad5 100644
--- a/platform/ext/target/cypress/psoc64/tfm_hal_isolation.c
+++ b/platform/ext/target/cypress/psoc64/tfm_hal_isolation.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2020-2022, Arm Limited. All rights reserved.
- * Copyright (c) 2022-2023 Cypress Semiconductor Corporation (an Infineon
+ * Copyright (c) 2022-2024 Cypress Semiconductor Corporation (an Infineon
  * company) or an affiliate of Cypress Semiconductor Corporation. All rights
  * reserved.
  *
@@ -24,29 +24,30 @@
 #define PROT_BOUNDARY_VAL \
     ((1U << HANDLE_ATTR_PRIV_POS) & HANDLE_ATTR_PRIV_MASK)
 
-enum tfm_hal_status_t tfm_hal_set_up_static_boundaries(
+FIH_RET_TYPE(enum tfm_hal_status_t) tfm_hal_set_up_static_boundaries(
                                             uintptr_t *p_spm_boundary)
 {
     Cy_PDL_Init(CY_DEVICE_CFG);
 
     if (smpu_init_cfg() != TFM_PLAT_ERR_SUCCESS) {
-        return TFM_HAL_ERROR_GENERIC;
+        FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
     }
 
     if (ppu_init_cfg() != TFM_PLAT_ERR_SUCCESS) {
-        return TFM_HAL_ERROR_GENERIC;
+        FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
     }
 
     if (bus_masters_cfg() != TFM_PLAT_ERR_SUCCESS) {
-        return TFM_HAL_ERROR_GENERIC;
+        FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
     }
 
     *p_spm_boundary = (uintptr_t)PROT_BOUNDARY_VAL;
 
-    return TFM_HAL_SUCCESS;
+    FIH_RET(fih_int_encode(TFM_HAL_SUCCESS));
 }
 
-enum tfm_hal_status_t tfm_hal_memory_check(uintptr_t boundary,
+FIH_RET_TYPE(enum tfm_hal_status_t) tfm_hal_memory_check(
+                                           uintptr_t boundary,
                                            uintptr_t base,
                                            size_t size,
                                            uint32_t access_type)
@@ -59,7 +60,7 @@
     } else if (access_type & TFM_HAL_ACCESS_READABLE) {
         flags |= MEM_CHECK_MPU_READ;
     } else {
-        return TFM_HAL_ERROR_INVALID_INPUT;
+        FIH_RET(fih_int_encode(TFM_HAL_ERROR_INVALID_INPUT));
     }
 
     if (access_type & TFM_HAL_ACCESS_NS) {
@@ -76,10 +77,10 @@
 
     status = tfm_has_access_to_region((const void *)base, size, flags);
     if (status != SPM_SUCCESS) {
-         return TFM_HAL_ERROR_MEM_FAULT;
+         FIH_RET(fih_int_encode(TFM_HAL_ERROR_MEM_FAULT));
     }
 
-    return TFM_HAL_SUCCESS;
+    FIH_RET(fih_int_encode(TFM_HAL_SUCCESS));
 }
 
 /*
@@ -92,7 +93,7 @@
  * SPM passes the handle to platform to do platform settings and update
  * isolation boundaries.
  */
-enum tfm_hal_status_t tfm_hal_bind_boundary(
+FIH_RET_TYPE(enum tfm_hal_status_t) tfm_hal_bind_boundary(
                                     const struct partition_load_info_t *p_ldinf,
                                     uintptr_t *p_boundary)
 {
@@ -102,7 +103,7 @@
     const struct asset_desc_t *p_asset;
 
     if (!p_ldinf || !p_boundary) {
-        return TFM_HAL_ERROR_GENERIC;
+        FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
     }
 
 #if TFM_ISOLATION_LEVEL == 1
@@ -130,17 +131,17 @@
         }
 
         if (j == ARRAY_SIZE(partition_named_mmio_list)) {
-            return TFM_HAL_ERROR_GENERIC;
+            FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
         }
     }
     partition_attrs = ((uint32_t)privileged << HANDLE_ATTR_PRIV_POS) &
                         HANDLE_ATTR_PRIV_MASK;
     *p_boundary = (uintptr_t)partition_attrs;
 
-    return TFM_HAL_SUCCESS;
+    FIH_RET(fih_int_encode(TFM_HAL_SUCCESS));
 }
 
-enum tfm_hal_status_t tfm_hal_activate_boundary(
+FIH_RET_TYPE(enum tfm_hal_status_t) tfm_hal_activate_boundary(
                              const struct partition_load_info_t *p_ldinf,
                              uintptr_t boundary)
 {
@@ -152,7 +153,7 @@
     ctrl.b.nPRIV = privileged ? 0 : 1;
     __set_CONTROL(ctrl.w);
 
-    return TFM_HAL_SUCCESS;
+    FIH_RET(fih_int_encode(TFM_HAL_SUCCESS));
 }
 
 bool tfm_hal_boundary_need_switch(uintptr_t boundary_from,
diff --git a/platform/ext/target/cypress/psoc64/tfm_hal_platform.c b/platform/ext/target/cypress/psoc64/tfm_hal_platform.c
index 4d84833..f98167d 100644
--- a/platform/ext/target/cypress/psoc64/tfm_hal_platform.c
+++ b/platform/ext/target/cypress/psoc64/tfm_hal_platform.c
@@ -1,6 +1,8 @@
 /*
  * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
- * Copyright (c) 2019-2021, Cypress Semiconductor Corporation. All rights reserved.
+ * Copyright (c) 2019-2024 Cypress Semiconductor Corporation (an Infineon
+ * company) or an affiliate of Cypress Semiconductor Corporation. All rights
+ * reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  *
@@ -48,7 +50,7 @@
     memcpy(boot_data, mock_data, sizeof(mock_data));
 }
 
-enum tfm_hal_status_t tfm_hal_platform_init(void)
+FIH_RET_TYPE(enum tfm_hal_status_t) tfm_hal_platform_init(void)
 {
     enum tfm_plat_err_t plat_err = TFM_PLAT_ERR_SYSTEM_ERR;
 
@@ -67,15 +69,15 @@
 
     plat_err = nvic_interrupt_target_state_cfg();
     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
-        return TFM_HAL_ERROR_GENERIC;
+        FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
     }
 
     plat_err = nvic_interrupt_enable();
     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
-        return TFM_HAL_ERROR_GENERIC;
+        FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
     }
 
-    return TFM_HAL_SUCCESS;
+    FIH_RET(fih_int_encode(TFM_HAL_SUCCESS));
 }
 
 uint32_t tfm_hal_get_ns_VTOR(void)