Core: Move pendsv priority operations into arch

- Move pendsv priority operations into arch.
- Rename the operation name from 'tfm_core_topology_set_pendsv_priority'
  to 'tfm_arch_set_pendsv_priority'.
- Remove tfm_core_topology.h file.

Change-Id: I20ee5d2595849f254c14a5084ccccdf2db475c61
Signed-off-by: Summer Qin <summer.qin@arm.com>
diff --git a/secure_fw/spm/arch/include/tfm_arch.h b/secure_fw/spm/arch/include/tfm_arch.h
index 929a870..96251ae 100644
--- a/secure_fw/spm/arch/include/tfm_arch.h
+++ b/secure_fw/spm/arch/include/tfm_arch.h
@@ -46,6 +46,33 @@
     SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
 }
 
+#ifdef TFM_MULTI_CORE_TOPOLOGY
+__STATIC_INLINE void tfm_arch_set_pendsv_priority(void)
+{
+    NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+}
+#else
+__STATIC_INLINE void tfm_arch_set_pendsv_priority(void)
+{
+    /*
+     * Set secure PendSV priority to the lowest in SECURE state.
+     *
+     * IMPORTANT NOTE:
+     *
+     * Although the priority of the secure PendSV must be the lowest possible
+     * among other interrupts in the Secure state, it must be ensured that
+     * PendSV is not preempted nor masked by Non-Secure interrupts to ensure
+     * the integrity of the Secure operation.
+     * When AIRCR.PRIS is set, the Non-Secure execution can act on
+     * FAULTMASK_NS, PRIMASK_NS or BASEPRI_NS register to boost its priority
+     * number up to the value 0x80.
+     * For this reason, set the priority of the PendSV interrupt to the next
+     * priority level configurable on the platform, just below 0x80.
+     */
+    NVIC_SetPriority(PendSV_IRQn, (1 << (__NVIC_PRIO_BITS - 1)) - 1);
+}
+#endif /* TFM_MULTI_CORE_TOPOLOGY */
+
 /**
  * \brief Get Link Register
  * \details Returns the value of the Link Register (LR)
diff --git a/secure_fw/spm/include/tfm_core_topology.h b/secure_fw/spm/include/tfm_core_topology.h
deleted file mode 100644
index 4f31d99..0000000
--- a/secure_fw/spm/include/tfm_core_topology.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (c) 2019, Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- *
- */
-
-#ifndef _TFM_CORE_TOPOLOGY_H_
-#define _TFM_CORE_TOPOLOGY_H_
-
-#include "tfm_hal_device_header.h"
-#include "cmsis_compiler.h"
-
-#ifdef TFM_MULTI_CORE_TOPOLOGY
-__STATIC_INLINE void tfm_core_topology_set_pendsv_priority(void)
-{
-    NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
-}
-#else
-__STATIC_INLINE void tfm_core_topology_set_pendsv_priority(void)
-{
-    /*
-     * Set secure PendSV priority to the lowest in SECURE state.
-     *
-     * IMPORTANT NOTE:
-     *
-     * Although the priority of the secure PendSV must be the lowest possible
-     * among other interrupts in the Secure state, it must be ensured that
-     * PendSV is not preempted nor masked by Non-Secure interrupts to ensure
-     * the integrity of the Secure operation.
-     * When AIRCR.PRIS is set, the Non-Secure execution can act on
-     * FAULTMASK_NS, PRIMASK_NS or BASEPRI_NS register to boost its priority
-     * number up to the value 0x80.
-     * For this reason, set the priority of the PendSV interrupt to the next
-     * priority level configurable on the platform, just below 0x80.
-     */
-    NVIC_SetPriority(PendSV_IRQn, (1 << (__NVIC_PRIO_BITS - 1)) - 1);
-}
-#endif /* TFM_MULTI_CORE_TOPOLOGY */
-
-#endif
diff --git a/secure_fw/spm/init/tfm_core.c b/secure_fw/spm/init/tfm_core.c
index 729f183..6be9c35 100644
--- a/secure_fw/spm/init/tfm_core.c
+++ b/secure_fw/spm/init/tfm_core.c
@@ -6,7 +6,6 @@
  */
 
 #include "region.h"
-#include "tfm_core_topology.h"
 #include "tfm_internal.h"
 #include "tfm_irq_list.h"
 #include "tfm_nspm.h"
@@ -132,7 +131,7 @@
         return TFM_ERROR_GENERIC;
     }
 
-    tfm_core_topology_set_pendsv_priority();
+    tfm_arch_set_pendsv_priority();
 
     return TFM_SUCCESS;
 }