Boot: Rename NO_SWAP upgrade strategy to DIRECT_XIP
The NO_SWAP upgrade strategy was upstreamed to the mainline
MCUboot repo, but the feature was renamed to DIRECT_XIP.
This change do the same renaming in TF-M to be aligned with
the mainline repo, because the MCUboot fork is going to be
removed from the TF-M repository.
Change-Id: I63201a5319a68394d45d753a700444cdc848b5dc
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
diff --git a/bl2/ext/mcuboot/boot/bootutil/src/loader.c b/bl2/ext/mcuboot/boot/bootutil/src/loader.c
index a3fea2e..e340b44 100644
--- a/bl2/ext/mcuboot/boot/bootutil/src/loader.c
+++ b/bl2/ext/mcuboot/boot/bootutil/src/loader.c
@@ -55,7 +55,7 @@
#define IMAGES_ITER(x)
#endif
-#if !defined(MCUBOOT_NO_SWAP) && !defined(MCUBOOT_RAM_LOADING) && \
+#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOADING) && \
!defined(MCUBOOT_OVERWRITE_ONLY)
#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) && !defined(MCUBOOT_OVERWRITE_ONLY)
@@ -160,7 +160,7 @@
(state)->swap_type, \
(state)->copy_done, \
(state)->image_ok)
-#endif /* !MCUBOOT_NO_SWAP && !MCUBOOT_RAM_LOADING && !MCUBOOT_OVERWRITE_ONLY */
+#endif /* !MCUBOOT_DIRECT_XIP && !MCUBOOT_RAM_LOADING && !MCUBOOT_OVERWRITE_ONLY */
/*
* \brief Verifies the image header: magic value, flags, integer overflow.
@@ -537,7 +537,7 @@
return rc;
}
-#if !defined(MCUBOOT_NO_SWAP) && !defined(MCUBOOT_OVERWRITE_ONLY)
+#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_OVERWRITE_ONLY)
/*
* Compute the total size of the given image. Includes the size of
* the TLVs.
@@ -598,9 +598,9 @@
flash_area_close(fap);
return rc;
}
-#endif /* !MCUBOOT_NO_SWAP && !MCUBOOT_OVERWRITE_ONLY */
+#endif /* !MCUBOOT_DIRECT_XIP && !MCUBOOT_OVERWRITE_ONLY */
-#if !defined(MCUBOOT_NO_SWAP) && !defined(MCUBOOT_RAM_LOADING)
+#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOADING)
/*
* Slots are compatible when all sectors that store up to to size of the image
* round up to sector size, in both slot's are able to fit in the scratch
@@ -2395,7 +2395,7 @@
return rc;
}
-#else /* MCUBOOT_NO_SWAP || MCUBOOT_RAM_LOADING */
+#else /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOADING */
#define BOOT_LOG_IMAGE_INFO(area, hdr, state) \
BOOT_LOG_INF("Image %u: version=%u.%u.%u+%u, magic=%5s, image_ok=0x%x", \
@@ -2834,7 +2834,7 @@
}
return rc;
}
-#endif /* MCUBOOT_NO_SWAP || MCUBOOT_RAM_LOADING */
+#endif /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOADING */
int
boot_go(struct boot_rsp *rsp)
diff --git a/config/config_default.cmake b/config/config_default.cmake
index f25d35c..f6fa2cc 100644
--- a/config/config_default.cmake
+++ b/config/config_default.cmake
@@ -28,7 +28,7 @@
set(MCUBOOT_EXECUTION_SLOT 1 CACHE STRING "Slot from which to execute the image, used for XIP mode")
set(MCUBOOT_LOG_LEVEL "INFO" CACHE STRING "Level of logging to use for MCUboot [OFF, ERROR, WARNING, INFO, DEBUG]")
set(MCUBOOT_HW_KEY ON CACHE BOOL "Whether to embed the entire public key in the image metadata instead of the hash only")
-set(MCUBOOT_UPGRADE_STRATEGY "OVERWRITE_ONLY" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, NO_SWAP, RAM_LOADING]")
+set(MCUBOOT_UPGRADE_STRATEGY "OVERWRITE_ONLY" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOADING]")
set(MCUBOOT_MEASURED_BOOT ON CACHE BOOL "Add boot measurement values to boot status. Used for initial attestation token")
set(MCUBOOT_HW_ROLLBACK_PROT ON CACHE BOOL "Enable security counter validation against non-volatile HW counters")
set(MCUBOOT_ENC_IMAGES OFF CACHE BOOL "Enable encrypted image upgrade support")
diff --git a/docs/getting_started/tfm_secure_boot.rst b/docs/getting_started/tfm_secure_boot.rst
index 6c15a4b..c3bfba2 100644
--- a/docs/getting_started/tfm_secure_boot.rst
+++ b/docs/getting_started/tfm_secure_boot.rst
@@ -126,10 +126,10 @@
the content of the secondary slot (the new firmware image). The second option is
the image swapping strategy when the content of the two memory slots must be
physically swapped. This needs the scratch area to be defined in the memory
-layout. The third option is the non-swapping version, which eliminates the
-complexity of image swapping and its administration. Active image can be
-executed from either memory slot, but new firmware must be linked to the address
-space of the proper (currently inactive) memory slot.
+layout. The third option is the direct execute-in-place version, which
+eliminates the complexity of image swapping and its administration. Active image
+can be executed from either memory slot, but new firmware must be linked to the
+address space of the proper (currently inactive) memory slot.
Overwrite operation
===================
@@ -170,10 +170,10 @@
therefore the bootloader will always perform a "revert" (swap the images
back) during the next boot.
-Non-swapping operation
-======================
+Direct execute-in-place operation
+=================================
This operation can be set with the ``MCUBOOT_UPGRADE_STRATEGY`` compile time
-switch (see `Build time configuration`_). When enabling non-swapping operation
+switch (see `Build time configuration`_). When enabling direct-xip operation
then the active image flag is moved between slots during firmware upgrade. If
firmware is executed-in-place (XIP), then two firmware images must be generated.
One of them is linked to be executed from the primary slot memory region and the
@@ -194,13 +194,13 @@
.. Note::
- Only single image boot is supported with non-swapping upgrade mode.
+ Only single image boot is supported with direct-xip upgrade mode.
RAM Loading firmware upgrade
============================
Musca-A supports an image upgrade mode that is separate to the other (overwrite,
-swapping and non-swapping) modes. This is the ``RAM loading`` mode (please refer
-to the table below). Like the non-swapping mode, this selects the newest image
+swapping and dirext-xip) modes. This is the ``RAM loading`` mode (please refer
+to the table below). Like the direct-xip mode, this selects the newest image
by reading the image version numbers in the image headers, but instead of
executing it in place, the newest image is copied to RAM for execution. The load
address, the location in RAM where the image is copied to, is stored in the
@@ -213,43 +213,43 @@
Summary of different modes for image upgrade
============================================
Different implementations of the image upgrade operation (whether through
-overwriting, swapping, non-swapping or loading into RAM and executing from
+overwriting, swapping, direct-xip or loading into RAM and executing from
there) are supported by the platforms. The table below shows which of these
modes are supported by which platforms:
-+---------------------+-----------------+----------------------------------------------------------+
-| | Without BL2 [1]_| With BL2 [2]_ |
-+=====================+=================+===============+==========+=============+=================+
-| | XIP | XIP | XIP | XIP | Not XIP |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| | | Overwrite [3]_| Swap [4]_| No-swap [5]_| RAM loading [6]_|
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| AN521 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| AN519 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| AN539 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| FVP_SSE300_MPS2 | NO | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| LPC55S69 | No | No | No | No | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| Musca-A | No | No | No | No | Yes |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| Musca-B1 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| Musca-S1 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| AN524 | Yes | No | No | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| PSoC64 | Yes | No | No | No | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| SSE-200_AWS | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| STM_DISCO_L562QE | No | Yes | No | No | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
-| STM_NUCLEO_L552ZE_Q | No | Yes | No | No | No |
-+---------------------+-----------------+---------------+----------+-------------+-----------------+
++---------------------+-----------------+-------------------------------------------------------------+
+| | Without BL2 [1]_| With BL2 [2]_ |
++=====================+=================+===============+==========+================+=================+
+| | XIP | XIP | XIP | XIP | Not XIP |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| | | Overwrite [3]_| Swap [4]_| direct-xip [5]_| RAM loading [6]_|
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| AN521 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| AN519 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| AN539 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| FVP_SSE300_MPS2 | NO | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| LPC55S69 | No | No | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| Musca-A | No | No | No | No | Yes |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| Musca-B1 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| Musca-S1 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| AN524 | Yes | No | No | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| PSoC64 | Yes | No | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| SSE-200_AWS | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| STM_DISCO_L562QE | No | Yes | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
+| STM_NUCLEO_L552ZE_Q | No | Yes | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+-----------------+
.. [1] To disable BL2, please set the ``BL2`` cmake option to ``OFF``
@@ -262,7 +262,7 @@
``MCUBOOT_UPGRADE_STRATEGY`` configuration variable in the build
configuration file, or include this macro definition in the command line
-.. [5] To enable XIP No-swap, assign the "NO_SWAP" string to the
+.. [5] To enable direct-xip, assign the "DIRECT_XIP" string to the
``MCUBOOT_UPGRADE_STRATEGY`` configuration variable in the build
configuration file, or include this macro definition in the command line
@@ -280,7 +280,7 @@
wish to use a locally downloaded copy, the cmake variable ``MCUBOOT_PATH`` can
be set to its location.
-Upstream MCUboot does not support the ``No-swap`` and ``RAM loading`` upgrade
+Upstream MCUboot does not support the ``direct-xip`` and ``RAM loading`` upgrade
strategies, therefore the platforms that don't support other upgrade strategies
(e.g. ``Overwrite``) cannot be used with the original MCUBoot at the moment. To
use the TF-M project's fork, set the ``TFM_INTERNAL_MCUBOOT`` cmake variable to
@@ -359,7 +359,8 @@
- MCUBOOT_UPGRADE_STRATEGY (default: "OVERWRITE_ONLY"):
- **"OVERWRITE_ONLY":** Default firmware upgrade operation with overwrite.
- **"SWAP":** Activate swapping firmware upgrade operation.
- - **"NO_SWAP":** Activate non-swapping firmware upgrade operation.
+ - **"DIRECT_XIP":** Activate direct execute-in-place firmware upgrade
+ operation.
- **"RAM_LOADING":** Activate RAM loading firmware upgrade operation, where
the latest image is copied to RAM and runs from there instead of being
executed in-place.
@@ -433,9 +434,10 @@
Image versioning
================
An image version number is written to its header by one of the Python scripts,
-and this number is used by the bootloader when the non-swapping or RAM loading
-mode is enabled. It is also used in case of multiple image boot when the
-bootloader checks the image dependencies if any have been added to the images.
+and this number is used by the bootloader when the direct execute-in-place or
+the RAM loading mode is enabled. It is also used in case of multiple image boot
+when the bootloader checks the image dependencies if any have been added to the
+images.
The version number of the image (single image boot) can manually be passed in
through the command line in the cmake configuration step::
@@ -666,12 +668,12 @@
Running Test Suite PSA protected storage S interface tests (TFM_PS_TEST_2XXX)...
...
-Non-swapping firmware upgrade
-=============================
+Direct execute-in-place firmware upgrade
+========================================
Follow the same instructions and platform related configurations as in case of
overwriting build including these changes:
-- Set the ``MCUBOOT_UPGRADE_STRATEGY`` compile time switch to "NO_SWAP"
+- Set the ``MCUBOOT_UPGRADE_STRATEGY`` compile time switch to "DIRECT_XIP"
before build.
- set ``MCUBOOT_EXECUTION_SLOT`` to ``1`` in the regression build dir.
- Make sure the image version number was increased between the two build runs
diff --git a/platform/ext/target/mps3/an524/config.cmake b/platform/ext/target/mps3/an524/config.cmake
index 06d4aa4..a306908 100644
--- a/platform/ext/target/mps3/an524/config.cmake
+++ b/platform/ext/target/mps3/an524/config.cmake
@@ -5,8 +5,8 @@
#
#-------------------------------------------------------------------------------
-set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each seperately" FORCE)
-set(MCUBOOT_UPGRADE_STRATEGY "NO_SWAP" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, NO_SWAP, RAM_LOADING]" FORCE)
+set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each separately" FORCE)
+set(MCUBOOT_UPGRADE_STRATEGY "DIRECT_XIP" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOADING]" FORCE)
################################## Dependencies ################################
diff --git a/platform/ext/target/musca_a/config.cmake b/platform/ext/target/musca_a/config.cmake
index 10fc289..1cb2426 100644
--- a/platform/ext/target/musca_a/config.cmake
+++ b/platform/ext/target/musca_a/config.cmake
@@ -5,5 +5,5 @@
#
#-------------------------------------------------------------------------------
-set(MCUBOOT_UPGRADE_STRATEGY "RAM_LOADING" CACHE STRING "Upgrade strategy when multiple boot images are loaded [OVERWRITE_ONLY, SWAP, NO_SWAP, RAM_LOADING]" FORCE)
-set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each seperately" FORCE)
+set(MCUBOOT_UPGRADE_STRATEGY "RAM_LOADING" CACHE STRING "Upgrade strategy when multiple boot images are loaded [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOADING]" FORCE)
+set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each separately" FORCE)