FPU: Load function address into register before blx

The operand of BLX must be a register. Function address needs to be
loaded into register first.

Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: I9e90435bde4ac092bca5571608448bd22da032c1
diff --git a/test/secure_fw/suites/fpu/non_secure/fpu_ns_interface_testsuite.c b/test/secure_fw/suites/fpu/non_secure/fpu_ns_interface_testsuite.c
index fa314ad..2247656 100644
--- a/test/secure_fw/suites/fpu/non_secure/fpu_ns_interface_testsuite.c
+++ b/test/secure_fw/suites/fpu/non_secure/fpu_ns_interface_testsuite.c
@@ -62,17 +62,18 @@
 {
         __asm volatile(
 #if !defined(__ICCARM__)
-        ".syntax unified                   \n"
+        ".syntax unified                     \n"
 #endif
-        "   push    {r12, lr}              \n"
-        "   mov     r12, r0                \n"
-        /* Load params of tfm_psa_call_veneer into r0~r4. */
-        "   ldr     r0, [r12], #4          \n"  /* psa handle */
-        "   ldr     r1, [r12], #4          \n"  /* ctrl_param */
-        "   ldr     r2, [r12], #4          \n"  /* in_vec */
-        "   ldr     r3, [r12]              \n"  /* out_vec */
-        "   blx     tfm_psa_call_veneer    \n"
-        "   pop     {r12, pc}              \n"
+        "   push    {r4-r6, lr}              \n"
+        "   mov     r4, r0                   \n"
+        /* Load params of tfm_psa_call_veneer into r0~r3. */
+        "   ldr     r0, [r4], #4             \n"  /* psa handle */
+        "   ldr     r1, [r4], #4             \n"  /* ctrl_param */
+        "   ldr     r2, [r4], #4             \n"  /* in_vec */
+        "   ldr     r3, [r4]                 \n"  /* out_vec */
+        "   ldr     r5, =tfm_psa_call_veneer \n"
+        "   blx     r5                       \n"
+        "   pop     {r4-r6, pc}              \n"
     );
 }
 
diff --git a/test/secure_fw/suites/fpu/secure/fpu_s_interface_testsuite.c b/test/secure_fw/suites/fpu/secure/fpu_s_interface_testsuite.c
index e8405ef..6d5b791 100755
--- a/test/secure_fw/suites/fpu/secure/fpu_s_interface_testsuite.c
+++ b/test/secure_fw/suites/fpu/secure/fpu_s_interface_testsuite.c
@@ -54,17 +54,18 @@
 {
         __asm volatile(
 #if !defined(__ICCARM__)
-        ".syntax unified                        \n"
+        ".syntax unified                          \n"
 #endif
-        "   push    {r12, lr}                   \n"
-        "   mov     r12, r0                     \n"
-        /* Load params of tfm_psa_call_pack into r0~r4. */
-        "   ldr     r0, [r12], #4               \n"  /* psa handle */
-        "   ldr     r1, [r12], #4               \n"  /* ctrl_param */
-        "   ldr     r2, [r12], #4               \n"  /* in_vec */
-        "   ldr     r3, [r12]                   \n"  /* out_vec */
-        "   blx     "M2S(tfm_psa_call_pack)"    \n"
-        "   pop     {r12, pc}                   \n"
+        "   push    {r4-r6, lr}                   \n"
+        "   mov     r4, r0                        \n"
+        /* Load params of tfm_psa_call_pack into r0~r3. */
+        "   ldr     r0, [r4], #4                  \n"  /* psa handle */
+        "   ldr     r1, [r4], #4                  \n"  /* ctrl_param */
+        "   ldr     r2, [r4], #4                  \n"  /* in_vec */
+        "   ldr     r3, [r4]                      \n"  /* out_vec */
+        "   ldr     r5, ="M2S(tfm_psa_call_pack)" \n"
+        "   blx     r5                            \n"
+        "   pop     {r4-r6, pc}                   \n"
     );
 }