feat(tc): add new TC4 RoS definitions
The TC4 uses a new RoS (Virtual Peripherals) and places them at
different address to that in TC3. Add these addresses to the DTS.
Change-Id: Ia62a670e47cdc98b3c113a670a21edc65905cafe
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
diff --git a/fdts/tc3.dts b/fdts/tc3.dts
index 491cbb6..51431c2 100644
--- a/fdts/tc3.dts
+++ b/fdts/tc3.dts
@@ -17,6 +17,26 @@
#define MID_CPU_PMU_COMPATIBLE "arm,cortex-a725-pmu"
#define BIG_CPU_PMU_COMPATIBLE "arm,cortex-x925-pmu"
+#define ETHERNET_ADDR 18000000
+#define ETHERNET_INT 109
+
+#define SYS_REGS_ADDR 1c010000
+
+#define MMC_ADDR 1c050000
+#define MMC_INT_0 107
+#define MMC_INT_1 108
+
+#define RTC_ADDR 1c170000
+#define RTC_INT 100
+
+#define KMI_0_ADDR 1c060000
+#define KMI_0_INT 197
+#define KMI_1_ADDR 1c070000
+#define KMI_1_INT 103
+
+#define VIRTIO_BLOCK_ADDR 1c130000
+#define VIRTIO_BLOCK_INT 204
+
#include "tc-common.dtsi"
#if TARGET_FLAVOUR_FVP
#include "tc-fvp.dtsi"