| commit | dfb37a2df579ccf0e92c97515452b13ce2c9fba8 | [log] [tgz] |
|---|---|---|
| author | Boyan Karatotev <boyan.karatotev@arm.com> | Mon Dec 09 14:29:33 2024 +0000 |
| committer | Boyan Karatotev <boyan.karatotev@arm.com> | Fri Jun 13 17:58:25 2025 +0100 |
| tree | 402b125287f5be7aae33eec4b9e34f393672bca5 | |
| parent | 82b228ba638cb027cbedfbd4835587b6c465fedc [diff] |
feat(gicv5): initialise the IRS Do IRS initialisation that's only accessible from the EL3 interrupt domain. Relies on the platform to provide SPI domain assignments and trigger modes as well as to map the config frame in device nGnRnE memory. All wires will default to NS and the platform may override this. Change-Id: Icbd43503753cd76fd3d80ed47eba6926494bc323 Co-developed-by: Sascha Bischoff <sascha.bischoff@arm.com> Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>