| commit | 32b3b99918ec2b1d3d490a7f7151d4d1af76518f | [log] [tgz] |
|---|---|---|
| author | Alex Leibovich <alexl@marvell.com> | Sun Mar 10 16:45:02 2019 +0200 |
| committer | Marcin Wojtas <mw@semihalf.com> | Sun Jun 07 00:06:03 2020 +0200 |
| tree | d1eb506a1519dca0fa331b1f3024a20c72a05385 | |
| parent | 615d859b2e59d3c7f5f218c768340a3a3de0b8dc [diff] |
ddr: a80x0: add DDR 32-bit ECC mode support Change a topology map from internal database to SPD based for 32bit bus width mode Change-Id: I803166893ddc2fd916fc8a1c27fffd34b6ec0c72 Signed-off-by: Alex Leibovich <alexl@marvell.com>