diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S
index 08fa585..0cf04f5 100644
--- a/include/lib/cpus/aarch64/cpu_macros.S
+++ b/include/lib/cpus/aarch64/cpu_macros.S
@@ -152,14 +152,14 @@
 	 * If the field equals 1, branch targets trained in one context cannot
 	 * affect speculative execution in a different context.
 	 *
-	 * If the field equals 2, it means that the system is also aware of
+	 * If the field equals 2 or 3, it means that the system is also aware of
 	 * SCXTNUM_ELx register contexts. We aren't using them in the TF, so we
 	 * expect users of the registers to do the right thing.
 	 *
 	 * Only apply mitigations if the value of this field is 0.
 	 */
 #if ENABLE_ASSERTIONS
-	cmp	\_reg, #3 /* Only values 0 to 2 are expected */
+	cmp	\_reg, #4 /* Only values 0 to 3 are expected */
 	ASM_ASSERT(lo)
 #endif