| commit | f78c597041fcb6ee7bf1affc270b3178a9e9dba0 | [log] [tgz] |
|---|---|---|
| author | Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> | Wed Apr 09 22:49:59 2025 -0700 |
| committer | Devanshi Chauhan <devanshi.chauhanalpeshbhai@amd.com> | Mon May 26 05:02:02 2025 -0700 |
| tree | 3f63055ad4232de4ae84b948002df1e8a90e3088 | |
| parent | c314a0b3fe24f4f17745ea90976662e9fe25ea7d [diff] |
fix(xilinx): resolve misra rule 12.2 violations
Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.12.2:
- The right hand operand of a shift operator shall lie in the range
zero to one less than the width in bits of the essential type of
the left hand operand.
- Fix:
- Type casted left operand to a larger width than shift.
Change-Id: I662ff57e52d1260e2f1a0de595f19a9143714892
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>