tree 6dd9ab7c427970010e1494c305387d24b04647a9
parent bce281426a73cb2a3e528de24fc4fbacf93dbc97
author Bipin Ravi <bipin.ravi@arm.com> 1695076049 -0500
committer Varun Wadekar <vwadekar@nvidia.com> 1699023323 +0000

fix(cpus): workaround for Neoverse V2 erratum 2719105

Neoverse V2 erratum 2719105 is a Cat B erratum that applies to all
revisions <= r0p1 and is fixed in r0p2.

The erratum is avoided by setting CPUACTLR2_EL1[0] to 1 to force
PLDW/PFRM ST to behave like PLD/PRFM LD and not cause invalidations
to other PE caches. There might be a small performance degradation
to this workaround for certain workloads that share data.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Id026edcb7ee1ca93371ce0001d18f5a8282c49ba
(cherry picked from commit b01140256b5c0620cbde8e98c0df0e95343a3c71)