| commit | 59eaed03723208bb4cf1ead13012dff733261922 | [log] [tgz] |
|---|---|---|
| author | Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> | Wed Jun 25 04:20:19 2025 +0000 |
| committer | Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> | Mon Jun 30 21:17:29 2025 +0530 |
| tree | 764cb7921cf7da0075ab7e6260b59feccea6a71a | |
| parent | 36b998d75bea3fab391acdb51732cd7a5f2a89a4 [diff] |
feat(versal2): parse reserve memory subnodes In Versal Gen 2, TF-A parses the device tree to identify secure and non-secure memory regions, which are then used to validate the non-secure entry point address during a hot plug event Change-Id: I8cdb098509bd3b06f0df5ea647220bdbb8a4bf35 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>