fix(cpus): workaround for Cortex-X2 erratum 1927200
Cortex-X2 erratum 1927200 is a Cat B erratum that applies to
revisions r0p0 and r1p0 and is fixed in r2p0.
The workaround is to use instruction patching to insert a DMB ST
before acquire atomic instructions without release semantics.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest
Change-Id: I8d9038df1907888b3c5b2520d06bc150665e74a1
Signed-off-by: John Powell <john.powell@arm.com>
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 3c36c93..0e93aa6 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -752,6 +752,10 @@
CPU. This needs to be enabled for revisions r0p0 and r1p0, it is fixed in
r2p0.
+- ``ERRATA_X2_1927200``: This applies errata 1927200 workaround to Cortex-X2
+ CPU. This needs to be enabled for revisions r0p0 and r1p0, it is fixed in
+ r2p0.
+
- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2
CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU,
it is still open.