fix(rme): map DEVICE0_BASE as EL3_PAS
To pass SMMUv3 Realm Page 0 address to RMM
in Boot Manifest, BL31 needs to read SMMU_ROOT_IDR0
register. BL31 at EL3 runs in Root mode, but
CoreSight and peripherals at DEVICE0_BASE
(0x2000_0000) including SMMUv3 at 0x2B40_0000 are
mapped as MT_SECURE which results in RAZ access
to all SMMUv3 registers after enabling MMU.
This patch changes MT_SECURE mapping to EL3_PAS
resulting in MT_SECURE (ENABLE_RME = 0), and
MT_ROOT (ENABLE_RME = 1).
Change-Id: I3d9ae7c86e4836dd6722fa64116a14d8c8aed8da
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c
index 19a340f..7d76814 100644
--- a/plat/arm/board/fvp/fvp_common.c
+++ b/plat/arm/board/fvp/fvp_common.c
@@ -52,7 +52,7 @@
#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
DEVICE0_SIZE, \
- MT_DEVICE | MT_RW | MT_SECURE)
+ MT_DEVICE | MT_RW | EL3_PAS)
#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
DEVICE1_SIZE, \