feat(versal2): parse reserve memory subnodes
In Versal Gen 2, TF-A parses the device tree to identify secure and
non-secure memory regions, which are then used to validate the
non-secure entry point address during a hot plug event
Change-Id: I8cdb098509bd3b06f0df5ea647220bdbb8a4bf35
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
diff --git a/plat/amd/versal2/bl31_setup.c b/plat/amd/versal2/bl31_setup.c
index 28bcaa1..0726c26 100644
--- a/plat/amd/versal2/bl31_setup.c
+++ b/plat/amd/versal2/bl31_setup.c
@@ -261,6 +261,7 @@
{
uint32_t flags = 0;
int32_t rc;
+ uint32_t rre_ret = 0;
set_interrupt_rm_flag(flags, NON_SECURE);
rc = register_interrupt_type_handler(INTR_TYPE_EL3,
@@ -269,6 +270,13 @@
panic();
}
+ /* Instead of calling for each time fill in structure early. */
+ rre_ret = retrieve_reserved_entries();
+
+ if (rre_ret != 0) {
+ INFO("Runtime FDT reserve node retreival failed");
+ }
+
console_switch_state(CONSOLE_FLAG_RUNTIME);
}