feat(imx8ulp): add APD power down mode(PD) support in system suspend
The APD can be put into PD mode when linux suspend(mem). This patch
add the support for it. As the whole AP domain's context will be lost,
so we must save the necessary HW module states before entering PD mode,
and we need to restore those contexts when system wake up. Fot details
about which HW module's state will be lost, please refer to the RM.
When APD enter PD mode, only the wakeup event connected to the WUU
can wakeup APD successfully. The upower wakeup source is used to
wakeup APD by RTD due to the factor that the MU between A core & M
core is not connected into WUU to generate wakeup event.
as the SRAM0 will be power down when APD enters PD mode, so we
need to re-init the scmi channels(resides in the SRAM0). otherwise
the SCMI can NOT work anymore.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I44b0cdc8397e5d6a82081ea6746542e9fa4b9fc1
diff --git a/plat/imx/imx8ulp/include/platform_def.h b/plat/imx/imx8ulp/include/platform_def.h
index 18f72fd..d5f4033 100644
--- a/plat/imx/imx8ulp/include/platform_def.h
+++ b/plat/imx/imx8ulp/include/platform_def.h
@@ -66,14 +66,25 @@
#define IMX_CGC2_BASE U(0x2da60000)
#define IMX_PCC5_BASE U(0x2da70000)
#define IMX_CMC1_BASE U(0x29240000)
+#define IMX_WUU1_BASE U(0x29260000)
#define IMX_SIM1_BASE U(0x29290000)
+#define IMX_GPIOD_BASE U(0x2e200000)
+#define IMX_GPIOE_BASE U(0x2d000000)
+#define IMX_GPIOF_BASE U(0x2d010000)
#define IMX_WDOG3_BASE U(0x292a0000)
-#define IMX_GPIOE_BASE U(0x2D000000)
-#define IMX_GPIOD_BASE U(0x2E200000)
-#define IMX_GPIOF_BASE U(0x2D010000)
+#define IMX_TPM5_BASE U(0x29340000)
#define SRAM0_BASE U(0x2201F000)
+#define IOMUXC_PTD_PCR_BASE U(0x298c0000)
+#define IOMUXC_PTE_PCR_BASE U(0x298c0080)
+#define IOMUXC_PTF_PCR_BASE U(0x298c0100)
+#define IOMUXC_PSMI_BASE0 U(0x298c0800)
+#define IOMUXC_PSMI_BASE1 U(0x298c0838)
+#define IOMUXC_PSMI_BASE2 U(0x298c0954)
+#define IOMUXC_PSMI_BASE3 U(0x298c0994)
+#define IOMUXC_PSMI_BASE4 U(0x298c0a58)
+
#define IMX_ROM_ENTRY U(0x1000)
#define COUNTER_FREQUENCY 1000000