fix(cpus): workaround for Cortex-X2 erratum 1934260
Cortex-X2 erratum 1934260 is a Cat B erratum that applies only
to revision r1p0 and is fixed in r2p0.
The workaround is to set CPUECTLR_EL1[25:18] to 0xFF. This
workaround will result in reduced performance for workloads
that benefit from write streaming.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest
Change-Id: I180d38fee27175dc8ac5fa6726e5b71c3340285f
Signed-off-by: John Powell <john.powell@arm.com>
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 0e93aa6..515cde3 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -756,6 +756,9 @@
CPU. This needs to be enabled for revisions r0p0 and r1p0, it is fixed in
r2p0.
+- ``ERRATA_X2_1934260``: This applies errata 1934260 workaround to Cortex-X2
+ CPU. This needs to be enabled only for revision r1p0, it is fixed in r2p0.
+
- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2
CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU,
it is still open.