fix(st-clock): add ck_bus_risaf4 clock for STM32MP2
Add management of the ck_bus_risaf4 clock.
The RISAF4 clock is missing, which causes a panic if it is enabled.
The DDR clock is set to critical as it is mandatory to keep the DDR
clock active.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: I6ac2aff07484bfc22210ee9d3e46a97d1735f34b
diff --git a/drivers/st/clk/clk-stm32mp2.c b/drivers/st/clk/clk-stm32mp2.c
index 1266e00..fa59517 100644
--- a/drivers/st/clk/clk-stm32mp2.c
+++ b/drivers/st/clk/clk-stm32mp2.c
@@ -281,6 +281,7 @@
_CK_USB3PCIEPHY,
_CK_USBTC,
#endif /* !STM32MP21 */
+ _CK_BUS_RISAF4,
CK_LAST
};
@@ -1339,7 +1340,8 @@
STM32_GATE(_CK_GPIOZ, CK_BUS_GPIOZ, _CK_ICN_LS_MCU, 0, GATE_GPIOZ),
STM32_GATE(_CK_RTC, CK_BUS_RTC, _CK_ICN_LS_MCU, 0, GATE_RTC),
- STM32_GATE(_CK_DDRCP, CK_BUS_DDR, _CK_ICN_DDR, 0, GATE_DDRCP),
+ STM32_GATE(_CK_BUS_RISAF4, CK_BUS_RISAF4, _CK_ICN_LS_MCU, CLK_IS_CRITICAL, GATE_DDRCP),
+ STM32_GATE(_CK_DDRCP, CK_BUS_DDR, _CK_ICN_DDR, CLK_IS_CRITICAL, GATE_DDRCP),
/* WARNING 2 CLOCKS FOR ONE GATE */
#if STM32MP21