Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 1 | <?xml version="1.0" encoding="utf-8"?> |
| 2 | |
| 3 | <!-- |
Daniel Boulby | 0e4629f | 2021-10-26 14:01:23 +0100 | [diff] [blame] | 4 | Copyright (c) 2018-2022, Arm Limited. All rights reserved. |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 5 | |
| 6 | SPDX-License-Identifier: BSD-3-Clause |
| 7 | --> |
| 8 | |
| 9 | <testsuites> |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 10 | <testsuite name="IRQ support in TSP" description="Test the normal IRQ preemption support in TSP."> |
| 11 | <testcase name="TSP preempt by IRQ and resume" function="tsp_int_and_resume" /> |
| 12 | <testcase name="Fast SMC while TSP preempted" function="test_fast_smc_when_tsp_preempted" /> |
| 13 | <testcase name="STD SMC resumption while TSP preempted" function="test_std_smc_when_tsp_preempted_resume" /> |
| 14 | <testcase name="STD SMC abortion while TSP preempted" function="test_std_smc_when_tsp_preempted_abort" /> |
| 15 | <testcase name="Resume SMC without TSP preemption" function="test_resume_smc_without_preemption" /> |
| 16 | <testcase name="Stress TSP preemption and resumption" function="tsp_int_and_resume_stress" /> |
| 17 | <testcase name="Test Secure FIQ while TSP is preempted" function="tsp_fiq_while_int" /> |
| 18 | <testcase name="Resume preempted STD SMC" function="test_irq_preempted_std_smc" /> |
| 19 | <testcase name="Resume preempted STD SMC from other CPUs" function="test_resume_preempted_std_smc_other_cpus" /> |
| 20 | <testcase name="Resume STD SMC from different CPUs" function="test_resume_different_cpu_preempted_std_smc" /> |
| 21 | <testcase name="Resume preempted STD SMC after PSCI CPU OFF/ON cycle" function="test_psci_cpu_on_off_preempted_std_smc" /> |
| 22 | <testcase name="Resume preempted STD SMC after PSCI SYSTEM SUSPEND" function="test_psci_system_suspend_preempted_std_smc" /> |
Sandrine Bailleux | 30ea91c | 2018-10-03 10:06:54 +0200 | [diff] [blame] | 23 | <testcase name="Multicore spurious interrupt test" function="test_multicore_spurious_interrupt" /> |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 24 | </testsuite> |
| 25 | |
| 26 | <testsuite name="TSP handler standard functions result test" description="Validate TSP SMC standard function call"> |
| 27 | <testcase name="TestSecurePayload standard functions service call" function="test_smc_tsp_std_fns_call" /> |
| 28 | </testsuite> |
| 29 | |
| 30 | <testsuite name="Stress test TSP functionality" description="Validate TSP functionality"> |
| 31 | <testcase name="Stress test TSP functionality" function="test_tsp_fast_smc_operations" /> |
| 32 | </testsuite> |
| 33 | |
Daniel Boulby | 0e4629f | 2021-10-26 14:01:23 +0100 | [diff] [blame] | 34 | <testsuite name="TSP PSTATE test" description="Test PSTATE bits are maintained during exception"> |
| 35 | <testcase name="Test PSTATE bits maintained on exception" function="tsp_check_pstate_maintained_on_exception" /> |
| 36 | </testsuite> |
| 37 | |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 38 | </testsuites> |