blob: 06a333ec2c872b73fd5f38328bf4ed950ae107e3 [file] [log] [blame]
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +01001/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <platform.h>
8
9#define TC0_DRAM1_NS_START (TFTF_BASE + 0x4000000)
10#define TC0_DRAM1_NS_SIZE 0x10000000
11
12static const mem_region_t tc0_ram_ranges[] = {
13 { TC0_DRAM1_NS_START, TC0_DRAM1_NS_SIZE }
14};
15
16const mem_region_t *plat_get_prot_regions(int *nelem)
17{
18 *nelem = ARRAY_SIZE(tc0_ram_ranges);
19 return tc0_ram_ranges;
20}