| commit | 8ba06f324d4a1047aed7bc584e4c2ae635e197cc | [log] [tgz] |
|---|---|---|
| author | Michal Simek <michal.simek@amd.com> | Mon Jan 22 12:14:24 2024 +0100 |
| committer | Michal Simek <michal.simek@amd.com> | Mon Jan 22 12:16:51 2024 +0100 |
| tree | 53362acfaff93d33931dfda2e0d023fc70de3188 | |
| parent | 6eec0b422131e94e9c602e5560a432b36b97f703 [diff] |
fix(xilinx): wire Xilinx platforms in docs
Wire Xilinx platform docs to fix build errors when
make DEBUG=1 V=1 doc is called.
Fixes: 30b8bc2aadb8 ("docs(versal-net): add Versal NET documentation")
Fixes: e52f311919f3 ("docs(versal): add versal documentation")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I52f4cf31bec2716a2f8b84a1f01335e387d39556