TFTF: Fix Aarch32 zeromem() function
This patch fixes the following bugs in zeromem() Aarch32 variant:
- Removed ASM_ASSERT for length parameter passed in R1 register.
This is causing assertion in tftf_entrypoint() code
ldr r0, =__BSS_START__
ldr r1, =__BSS_SIZE__
bl zeromem
when __BSS_SIZE__ is not 4-byte aligned:
0x000000000000cced __BSS_SIZE__ = SIZEOF (.bss)
- With ENABLE_ASSERTIONS = 0 for RELEASE builds and R1 not 4-bytes
aligned zeromem() was writing 0 into all the memory in infinite
z_loop, because of the code:
z_loop:
cmp r2, r0
beq z_end
str r1, [r0], #4
b z_loop
with R0 being increased by 4 on each step and R2 = R0 condition
would never be met.
- BLT instruction was used for 'unsigned int length' value in R1
changed to BLO.
This patch also fixes BLO instruction bug in 'memcpy4()' and function
itself is optimised.
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Change-Id: I8128399681def8ba80241882e355c3ca2778605f
1 file changed