diff --git a/plat/arm/fvp/include/platform_def.h b/plat/arm/fvp/include/platform_def.h
index 7fc147d..8555c1f 100644
--- a/plat/arm/fvp/include/platform_def.h
+++ b/plat/arm/fvp/include/platform_def.h
@@ -57,6 +57,36 @@
 #define NOR_FLASH_BLOCKS_COUNT		255
 #define FLASH_SIZE			(NOR_FLASH_BLOCK_SIZE * NOR_FLASH_BLOCKS_COUNT)
 
+/**********************************
+ * Addresses to test invalid access
+ **********************************/
+/*
+ * The top 16MB (or 64MB if RME is enabled) of DRAM1 is configured as
+ * follows for FVP platform:
+ *   - L1 GPT DRAM: Reserved for L1 GPT if RME is enabled
+ *   - REALM DRAM: Reserved for Realm world if RME is enabled
+ *   - AP TZC DRAM: The remaining TZC secured DRAM reserved for AP use
+ *
+ *              RME enabled(64MB)                RME not enabled(16MB)
+ * 0xFC00_0000  --------------------             ------------------- 0xFF00_0000
+ *              |                  |             |                 |
+ *              | AP Secure (~28MB)|             |  AP TZC (~14MB) |
+ *              --------------------             ------------------- 0xFFE0_0000
+ *              |                  |             |                 |
+ *              |  REALM (32MB)    |             |  EL3 TZC (2MB)  |
+ *              --------------------             ------------------- 0xFFFF_FFFF
+ *              |                  |
+ *  0xFFE0_0000 |  EL3 Root (3MB)  |
+ *              --------------------
+ *              |  L1 GPT (1MB)    |
+ *              |                  |
+ *  0xFFFF_FFFF --------------------
+ *
+ *
+ */
+/* For both RME & non-RME case top 2MB will be EL3 memory */
+#define EL3_MEMORY_ACCESS_ADDR			U(0xFFE00000)
+
 /*******************************************************************************
  * Base address and size for the FIP that contains FWU images.
  ******************************************************************************/
diff --git a/plat/arm/fvp/plat_setup.c b/plat/arm/fvp/plat_setup.c
index fa97814..8142611 100644
--- a/plat/arm/fvp/plat_setup.c
+++ b/plat/arm/fvp/plat_setup.c
@@ -34,6 +34,8 @@
 	MAP_REGION_FLAT(FLASH_BASE, FLASH_SIZE, MT_DEVICE | MT_RW | MT_NS),
 #endif
 	MAP_REGION_FLAT(DRAM_BASE, TFTF_BASE - DRAM_BASE, MT_MEMORY | MT_RW | MT_NS),
+	/* Not usable in tftf, Only for testing purpose */
+	MAP_REGION_FLAT(EL3_MEMORY_ACCESS_ADDR, PAGE_SIZE, MT_MEMORY | MT_RW | MT_NS),
 	{0}
 };
 #endif	/* IMAGE_NS_BL1U */