feat(realm): align RSI ABIs with RMM spec 1.1-alp12
This syncs the naming of SMC RSI commands with TF-RMM.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I7905f0f3788c0c659ba6f787fb002d1c5997d289
diff --git a/realm/realm_rsi.c b/realm/realm_rsi.c
index 4e223ca..3ca4e8a 100644
--- a/realm/realm_rsi.c
+++ b/realm/realm_rsi.c
@@ -1,6 +1,6 @@
/*
- * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -18,7 +18,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_VERSION, req_ver, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL});
+ {SMC_RSI_VERSION, req_ver, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL});
if (res.ret0 == SMC_UNKNOWN) {
return SMC_UNKNOWN;
@@ -41,7 +41,7 @@
host_cal.imm = exit_code;
host_cal.gprs[0] = realm_get_my_plane_num();
host_cal.gprs[1] = read_mpidr_el1();
- res = tftf_smc(&(smc_args) {RSI_HOST_CALL, (u_register_t)&host_cal,
+ res = tftf_smc(&(smc_args) {SMC_RSI_HOST_CALL, (u_register_t)&host_cal,
0UL, 0UL, 0UL, 0UL, 0UL, 0UL});
return res.ret0;
}
@@ -57,7 +57,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_IPA_STATE_SET, base, top, ripas, flag});
+ {SMC_RSI_IPA_STATE_SET, base, top, ripas, flag});
if (res.ret0 == RSI_SUCCESS) {
*new_base = res.ret1;
*response = res.ret2;
@@ -74,7 +74,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_IPA_STATE_GET, base, top});
+ {SMC_RSI_IPA_STATE_GET, base, top});
if (res.ret0 == RSI_SUCCESS) {
*out_top = res.ret1;
*ripas = res.ret2;
@@ -96,7 +96,7 @@
smc_ret_values_ext res = {};
tftf_smc_no_retval_x8(&(smc_args_ext) {
- RSI_ATTEST_TOKEN_INIT,
+ SMC_RSI_ATTEST_TOKEN_INIT,
challenge_0,
challenge_1,
challenge_2,
@@ -124,7 +124,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args) {
- RSI_ATTEST_TOKEN_CONTINUE,
+ SMC_RSI_ATTEST_TOKEN_CONTINUE,
buffer_addr,
offset,
buffer_size
@@ -141,7 +141,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_REALM_CONFIG, (u_register_t)s});
+ {SMC_RSI_REALM_CONFIG, (u_register_t)s});
return res.ret0;
}
@@ -152,7 +152,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_MEM_GET_PERM_VALUE, plane_index, perm_index});
+ {SMC_RSI_MEM_GET_PERM_VALUE, plane_index, perm_index});
if (res.ret0 == RSI_SUCCESS) {
*perm = res.ret1;
}
@@ -166,7 +166,8 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_MEM_SET_PERM_VALUE, plane_index, perm_index, perm});
+ {SMC_RSI_MEM_SET_PERM_VALUE, plane_index, perm_index,
+ perm});
return res.ret0;
}
@@ -181,7 +182,8 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_MEM_SET_PERM_INDEX, base, top, perm_index, cookie});
+ {SMC_RSI_MEM_SET_PERM_INDEX, base, top, perm_index,
+ cookie});
if (res.ret0 == RSI_SUCCESS) {
*new_base = res.ret1;
*response = res.ret2;
@@ -196,7 +198,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_PLANE_ENTER, plane_index, plane_run});
+ {SMC_RSI_PLANE_ENTER, plane_index, plane_run});
return res.ret0;
}
@@ -207,7 +209,8 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_PLANE_REG_READ, plane_index, register_encoding});
+ {SMC_RSI_PLANE_REG_READ, plane_index,
+ register_encoding});
if (res.ret0 == RSI_SUCCESS) {
*value = res.ret1;
}
@@ -221,6 +224,7 @@
smc_ret_values res = {};
res = tftf_smc(&(smc_args)
- {RSI_PLANE_REG_WRITE, plane_index, register_encoding, value});
+ {SMC_RSI_PLANE_REG_WRITE, plane_index,
+ register_encoding, value});
return res.ret0;
}