Trusted Firmware-A Tests, version 2.0
This is the first public version of the tests for the Trusted
Firmware-A project. Please see the documentation provided in the
source tree for more details.
Change-Id: I6f3452046a1351ac94a71b3525c30a4ca8db7867
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Co-authored-by: amobal01 <amol.balasokamble@arm.com>
Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Co-authored-by: Asha R <asha.r@arm.com>
Co-authored-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Co-authored-by: David Cunado <david.cunado@arm.com>
Co-authored-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Co-authored-by: Douglas Raillard <douglas.raillard@arm.com>
Co-authored-by: dp-arm <dimitris.papastamos@arm.com>
Co-authored-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Co-authored-by: Jonathan Wright <jonathan.wright@arm.com>
Co-authored-by: Kévin Petit <kevin.petit@arm.com>
Co-authored-by: Roberto Vargas <roberto.vargas@arm.com>
Co-authored-by: Sathees Balya <sathees.balya@arm.com>
Co-authored-by: Shawon Roy <Shawon.Roy@arm.com>
Co-authored-by: Soby Mathew <soby.mathew@arm.com>
Co-authored-by: Thomas Abraham <thomas.abraham@arm.com>
Co-authored-by: Vikram Kanigiri <vikram.kanigiri@arm.com>
Co-authored-by: Yatharth Kochar <yatharth.kochar@arm.com>
diff --git a/el3_payload/spin.S b/el3_payload/spin.S
new file mode 100644
index 0000000..8cf067f
--- /dev/null
+++ b/el3_payload/spin.S
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2018, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "arch.h"
+#include "asm_macros.S"
+#include "platform.h"
+
+/* Initial value of each entry in the cpus_table[] array */
+#define NO_CPU 0xDEADDEADDEADDEAD
+
+/*
+ * Declare a per-CPU array to mark the CPUs presence.
+ *
+ * If cpus_table[i] == NO_CPU then CPU 'i' hasn't successfully booted to the
+ * to the EL3 test payload yet.
+ *
+ * Otherwise, it successfully booted (and cpus_table[i] should contain the
+ * CPU MPID).
+ */
+ .data
+ .align 3
+cpus_table:
+ .rept CPUS_COUNT
+ .quad NO_CPU
+ .endr
+
+
+ .text
+ .global mark_cpu_presence
+ .global is_cpu_present
+
+ /*
+ * void mark_cpu_presence();
+ * Mark the calling CPU present in the CPUs array.
+ * clobbers: x0, x1, x2, x9
+ */
+func mark_cpu_presence
+ /* Store masked MPID in x2 */
+ mrs x0, mpidr_el1
+ ldr x1, =MPIDR_AFFINITY_MASK
+ and x2, x0, x1
+
+ /* Store core position in x0 */
+ mov x9, x30
+ bl platform_get_core_pos
+ mov x30, x9
+
+ /* Write masked CPU MPID in the CPU entry */
+ adr x1, cpus_table
+ add x1, x1, x0, lsl #3
+ str x2, [x1]
+
+ ret
+endfunc mark_cpu_presence
+
+ /*
+ * unsigned int is_cpu_present(unsigned int core_pos);
+ * Return 0 if CPU is absent, 1 if it is present.
+ * clobbers: x0, x1
+ */
+func is_cpu_present
+ adr x1, cpus_table
+ add x1, x1, x0, lsl #3
+ ldr x0, [x1]
+
+ ldr x1, =NO_CPU
+ cmp x0, x1
+ b.eq 1f
+ mov x0, #1
+ ret
+1:
+ mov x0, #0
+ ret
+endfunc is_cpu_present