chore(xilinx): reorganize timer code into common path
Reorganized timer code into common folder, updated paths in
platform.mk and Versal/Versal NET ttc timer irq in platform_def.h for
Xilinx project.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I504727f55099decf07a208fc95254597e6e24902
diff --git a/plat/xilinx/versal/timers.c b/plat/xilinx/common/timer/timers.c
similarity index 95%
rename from plat/xilinx/versal/timers.c
rename to plat/xilinx/common/timer/timers.c
index 5c1e8f5..a6e1afa 100644
--- a/plat/xilinx/versal/timers.c
+++ b/plat/xilinx/common/timer/timers.c
@@ -33,8 +33,6 @@
#define TTC_CLK_SEL_PS_REF BIT(0)
#define TTC_CLK_SEL_RPU_REF BIT(4)
-#define TIMER_IRQ U(69)
-
#define RET_SUCCESS U(0)
/*
@@ -136,12 +134,12 @@
return RET_SUCCESS;
}
-static const plat_timer_t versal_timers = {
+static const plat_timer_t timers = {
.program = program_timer,
.cancel = cancel_timer,
.handler = handler_timer,
.timer_step_value = INTERVAL,
- .timer_irq = TIMER_IRQ
+ .timer_irq = TTC_TIMER_IRQ
};
int plat_initialise_timer_ops(const plat_timer_t **timer_ops)
@@ -162,10 +160,10 @@
*/
timer_write_32(TTC_OFFSET_TMR_0 + TTC_CNT_CNTRL_OFFSET, 0x23);
timer_write_32(TTC_OFFSET_TMR_0 + TTC_CLK_CNTRL_OFFSET,
- CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN);
+ CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN);
timer_write_32(TTC_OFFSET_TMR_0 + TTC_IER_OFFSET, 0x01);
- *timer_ops = &versal_timers;
+ *timer_ops = &timers;
return RET_SUCCESS;
}
diff --git a/plat/xilinx/versal/include/platform_def.h b/plat/xilinx/versal/include/platform_def.h
index dbc6845..925825c 100644
--- a/plat/xilinx/versal/include/platform_def.h
+++ b/plat/xilinx/versal/include/platform_def.h
@@ -115,4 +115,6 @@
/* LPD_SWDT_INT, AM011(v1.5), Chapter 50, Page 428 */
#define IRQ_TWDOG_INTID U(0x51)
+#define TTC_TIMER_IRQ U(69)
+
#endif /* PLATFORM_DEF_H */
diff --git a/plat/xilinx/versal/platform.mk b/plat/xilinx/versal/platform.mk
index 264ed3c..2161e89 100644
--- a/plat/xilinx/versal/platform.mk
+++ b/plat/xilinx/versal/platform.mk
@@ -4,6 +4,7 @@
# SPDX-License-Identifier: BSD-3-Clause
#
+XLNX_COMMON_PATH := plat/xilinx/common
VERSAL_PATH := plat/xilinx/versal
PLAT_INCLUDES := -I${VERSAL_PATH}/include/
@@ -18,7 +19,7 @@
${VERSAL_PATH}/versal_setup.c \
${VERSAL_PATH}/versal_pwr_state.c \
${VERSAL_PATH}/aarch64/plat_helpers.S \
- ${VERSAL_PATH}/timers.c
+ ${XLNX_COMMON_PATH}/timer/timers.c
PLAT_TESTS_SKIP_LIST := ${VERSAL_PATH}/tests_to_skip.txt
diff --git a/plat/xilinx/versal_net/include/platform_def.h b/plat/xilinx/versal_net/include/platform_def.h
index b55d337..c357c96 100644
--- a/plat/xilinx/versal_net/include/platform_def.h
+++ b/plat/xilinx/versal_net/include/platform_def.h
@@ -117,4 +117,6 @@
/* LPD_SWDT_INT, AM011(v1.5), Chapter 50, Page 428 */
#define IRQ_TWDOG_INTID U(0x51)
+#define TTC_TIMER_IRQ U(75)
+
#endif /* PLATFORM_DEF_H */
diff --git a/plat/xilinx/versal_net/platform.mk b/plat/xilinx/versal_net/platform.mk
index 398d12e..90d6d73 100644
--- a/plat/xilinx/versal_net/platform.mk
+++ b/plat/xilinx/versal_net/platform.mk
@@ -4,6 +4,7 @@
# SPDX-License-Identifier: BSD-3-Clause
#
+XLNX_COMMON_PATH := plat/xilinx/common
VERSAL_NET_PATH := plat/xilinx/versal_net
PLAT_INCLUDES := -I${VERSAL_NET_PATH}/include/
@@ -18,7 +19,7 @@
${VERSAL_NET_PATH}/versal_net_setup.c \
${VERSAL_NET_PATH}/versal_net_pwr_state.c \
${VERSAL_NET_PATH}/aarch64/plat_helpers.S \
- ${VERSAL_NET_PATH}/timers.c
+ ${XLNX_COMMON_PATH}/timer/timers.c
PLAT_TESTS_SKIP_LIST := ${VERSAL_NET_PATH}/tests_to_skip.txt
diff --git a/plat/xilinx/versal_net/timers.c b/plat/xilinx/versal_net/timers.c
deleted file mode 100644
index ce87b0f..0000000
--- a/plat/xilinx/versal_net/timers.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <assert.h>
-#include <stddef.h>
-
-#include <debug.h>
-#include <mmio.h>
-#include <platform.h>
-#include <tftf_lib.h>
-#include <timer.h>
-#include <utils_def.h>
-
-#define TTC_OFFSET_TMR_0 U(0)
-#define TTC_OFFSET_TMR_1 U(4)
-#define TTC_OFFSET_TMR_2 U(8)
-
-#define TTC_CLK_CNTRL_OFFSET U(0x00) /* Clock Control Reg, RW */
-#define TTC_CNT_CNTRL_OFFSET U(0x0C) /* Counter Control Reg, RW */
-#define TTC_COUNT_VAL_OFFSET U(0x18) /* Counter Value Reg, RO */
-#define TTC_INTR_VAL_OFFSET U(0x24) /* Interval Count Reg, RW */
-#define TTC_ISR_OFFSET U(0x54) /* Interrupt Status Reg, RO */
-#define TTC_IER_OFFSET U(0x60) /* Interrupt Enable Reg, RW */
-
-#define TTC_CNT_CNTRL_DISABLE_MASK BIT(0)
-
-#define TTC_CLK_SEL_OFFSET U(0x360)
-#define TTC_CLK_SEL_MASK GENMASK(1, 0)
-
-#define TTC_CLK_SEL_PS_REF BIT(0)
-#define TTC_CLK_SEL_RPU_REF BIT(4)
-
-#define TIMER_IRQ U(75)
-
-#define RET_SUCCESS U(0)
-
-/*
- * Setup the timers to use pre-scaling, using a fixed value for now that will
- * work across most input frequency, but it may need to be more dynamic
- */
-#define PRESCALE_EXPONENT U(16) /* 2 ^ PRESCALE_EXPONENT = PRESCALE */
-#define PRESCALE U(65536) /* The exponent must match this */
-#define CLK_CNTRL_PRESCALE ((PRESCALE_EXPONENT - 1) << 1U)
-#define CLK_CNTRL_PRESCALE_EN BIT(0)
-#define CNT_CNTRL_RESET BIT(4)
-
-/* Resolution obtained as per the input clock and Prescale value
- * Clock Selected : PS_REF_CLK
- * Clock Value : 33333333Hz (33.33MHz)
- * Prescalar for TTC, N : 15 (highest)
- * Prescalar Applied 2^(N+1) : 65536
- * Input clock : (PS_REF_CLK)/Prescalar) : 508.6263Hz
- * Resolution (1/InputClock) : 1.966miliseconds ~2ms
- */
-const unsigned long INTERVAL = 2;
-
-static void timer_write_32(uint32_t offset, uint32_t val)
-{
- /* actual write */
- mmio_write_32(SYS_CNT_BASE1 + offset, val);
-}
-
-static uint32_t timer_read_32(uint32_t offset)
-{
- /* actual read */
- return mmio_read_32(SYS_CNT_BASE1 + offset);
-}
-
-static int cancel_timer(void)
-{
- /* Disable Interrupt */
- timer_write_32(TTC_IER_OFFSET, 0);
-
- /* Disable Counter */
- timer_write_32(TTC_CLK_CNTRL_OFFSET, !CLK_CNTRL_PRESCALE_EN);
- timer_write_32(TTC_CNT_CNTRL_OFFSET, !CLK_CNTRL_PRESCALE_EN);
-
- return RET_SUCCESS;
-}
-
-static void clocksetup(void)
-{
- timer_write_32(TTC_OFFSET_TMR_0 + TTC_CLK_CNTRL_OFFSET, 0x0);
-
- mmio_write_32(LPD_IOU_SLCR + TTC_CLK_SEL_OFFSET, TTC_CLK_SEL_PS_REF);
-
- VERBOSE("%s TTC_CLK_SEL = 0x%x\n", __func__,
- mmio_read_32(LPD_IOU_SLCR + TTC_CLK_SEL_OFFSET));
-}
-
-static void setcounts(unsigned long time_out_ms)
-{
- unsigned long intrvl = (time_out_ms / INTERVAL) + (time_out_ms % INTERVAL);
-
- timer_write_32(TTC_INTR_VAL_OFFSET, intrvl);
-}
-
-static int program_timer(unsigned long time_out_ms)
-{
- uint32_t reg;
-
- /* Disable and program the counter */
- reg = timer_read_32(TTC_CNT_CNTRL_OFFSET);
- reg |= TTC_CNT_CNTRL_DISABLE_MASK;
- timer_write_32(TTC_CNT_CNTRL_OFFSET, reg);
-
- setcounts(time_out_ms);
-
- /* Enable the interrupt */
- timer_write_32(TTC_IER_OFFSET, 0x01);
-
- /* Enable the counter */
- reg |= CNT_CNTRL_RESET;
- reg &= ~TTC_CNT_CNTRL_DISABLE_MASK;
- timer_write_32(TTC_CNT_CNTRL_OFFSET, reg);
-
- return RET_SUCCESS;
-}
-
-static int handler_timer(void)
-{
- uint32_t status;
-
- /* Disable the interrupts */
- timer_write_32(TTC_IER_OFFSET, 0x00);
-
- status = timer_read_32(TTC_ISR_OFFSET);
- if (status & 0x1)
- INFO("Timer Event! %x\n", status);
- else
- ERROR("Its not a Timer Event %d\n", status);
-
- return RET_SUCCESS;
-}
-
-static const plat_timer_t versal_timers = {
- .program = program_timer,
- .cancel = cancel_timer,
- .handler = handler_timer,
- .timer_step_value = INTERVAL,
- .timer_irq = TIMER_IRQ
-};
-
-int plat_initialise_timer_ops(const plat_timer_t **timer_ops)
-{
- assert(timer_ops != NULL);
-
- /* Disable all Interrupts on the TTC */
- timer_write_32(TTC_OFFSET_TMR_0 + TTC_IER_OFFSET, 0);
- timer_write_32(TTC_OFFSET_TMR_1 + TTC_IER_OFFSET, 0);
- timer_write_32(TTC_OFFSET_TMR_2 + TTC_IER_OFFSET, 0);
-
- clocksetup();
-
- /*
- * Setup the clock event timer to be an interval timer which
- * is prescaled by 32 using the interval interrupt. Leave it
- * disabled for now.
- */
- timer_write_32(TTC_OFFSET_TMR_0 + TTC_CNT_CNTRL_OFFSET, 0x23);
- timer_write_32(TTC_OFFSET_TMR_0 + TTC_CLK_CNTRL_OFFSET,
- CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN);
- timer_write_32(TTC_OFFSET_TMR_0 + TTC_IER_OFFSET, 0x01);
-
- *timer_ops = &versal_timers;
-
- return RET_SUCCESS;
-}