)]}' { "log": [ { "commit": "f41d8eeb88a4759bd463ccbb2e5eac3e6ee7eb2c", "tree": "56b3830820758d600ddb6d138590c4c6aeb60ee4", "parents": [ "735050f270024e5443f1e9bf45e98a4d3954c9d5" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Jul 10 16:41:28 2025 -0500" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Wed Aug 20 20:01:47 2025 +0000" }, "message": "test(fuzzing): adding variable coverage\n\nAdding the capability to produce coverage of the arguments of the\nSMC calls as generated by the fuzzer. The output from the FVP will\nbe routed to UART3 where a python flow will read the data to create\ntables of each SMC call with its fields shown and values given. The\noption is enabled by adding SMC_FUZZ_VARIABLE_COVERAGE\u003d1 to the\ncorresponding TFTF config.\n\nChange-Id: I2d4d310976aa2c0447efbd8ec0676bb9f8699828\nSigned-off-by: Mark Dykes \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "51f0333e24e6c4aff44ace871c6042b507476b5e", "tree": "4e7a4c0d34ab7cb3c0039bbd3b59431f646c531c", "parents": [ "cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Jun 27 13:47:23 2025 +0000" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Jun 27 13:57:23 2025 +0000" }, "message": "revert: replace in-tree Event Log Lib w/ submodule\n\nThis reverts commit cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849.\n\nReason for revert: Causing CI failures\n\nChange-Id: Iad32fb9ba1d32044ef647f01e3091e9b0ee0d9e2\n" }, { "commit": "cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849", "tree": "8be9469773b3f15614ee27ae9539cc29f8692c3c", "parents": [ "68ecce15bcd5db2449700d122f4e8f32cce91ae9" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu May 22 11:08:46 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 15:58:15 2025 +0000" }, "message": "refactor: replace in-tree Event Log Lib w/ submodule\n\nThe Event Log Library has been relocated to a separate repository and is\nnow integrated as a submodule, eliminating the need for in-tree files\nand reducing maintenance efforts for TFTF.\n\nChange-Id: I29694f8b3b08bb1d57dd685f6e42dc9f69d241bb\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "b674809e4d937d44f85ef53aa2bdbb9f74b569b2", "tree": "3192a0624448d4503cb3679f0d939cb7c169ac22", "parents": [ "19620adc7cbcae26cc432a28a9c3b0944957cf13" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri Apr 25 16:03:03 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri Apr 25 16:09:25 2025 +0000" }, "message": "feat(measured-boot): add measured boot drivers\n\nIntroduces core measured boot support, including TPM event log handling,\nhashing infrastructure, and event formatting per TCG spec. The driver is\nimported from the existing implementation in TF-A.\n\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\nChange-Id: Ib2e6a88c86f110f9a6907c3e6dbb0dc736486de9\n" }, { "commit": "7c9f2fc8f6bf5768c5643c10df8ab434129f811f", "tree": "57fb964c332bf561d604736c5e2f286961c85963", "parents": [ "1f099ddf7ac01f8e01627fd251b743e8f2d49f5a" ], "author": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Thu Feb 08 16:35:08 2024 +0530" }, "committer": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Fri Mar 08 10:29:07 2024 +0530" }, "message": "feat(zynqmp): introduce platform support\n\nIntroduce platform support for AMD-Xilinx zynqmp, an adaptive\ncompute acceleration platform (ACAP).\n\n- TF-A cadence driver is used for console.\n- TTC is used for Timers.\n\nsummary:\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\nTests Skipped : 193\nTests Passed : 29\nTests Failed : 0\nTests Crashed : 0\nTotal tests : 222\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\nNOTICE: Exiting tests.\n\nChange-Id: Ia63df682f8e97cc3a5d88468bf0df71f6bb3fc26\nSigned-off-by: Akshay Belsare \u003cakshay.belsare@amd.com\u003e\nSigned-off-by: Amit Nagal \u003camit.nagal@amd.com\u003e\n" }, { "commit": "c6a3abf980d69e59c08a66a0f4743958c1de6092", "tree": "bee421ee4ad87734d661b3dcf6cb36f61e0d92c0", "parents": [ "092189660673eeac7de4514035033240fde95b42" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Oct 25 16:47:23 2023 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Nov 02 21:36:07 2023 -0500" }, "message": "fix(interrupts): check support for ESPI before testing it\n\nIt is possible for extended range interrupts to be enabled by software\nbut the underlying hardware (GIC) may not support it. In such,\nscenarios check if the support exists before exercising the\nESPI functionality.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: Ibdf18be8403539c0ae9204309adc8a81dd0382d3\n" }, { "commit": "2f30f1030f186760b20cd06b59832e332b2bdd0a", "tree": "e06899ba1be405650b4a15603429900dac67ccc2", "parents": [ "2eb601b98a245df8a31e670a7dc322c2e8f153cf" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Mon Mar 13 19:37:46 2023 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 31 11:41:56 2023 +0200" }, "message": "feat(rme): add PMU Realm tests\n\nThis patch adds Realm PMU payload tests with\nPMU interrupt handling.\n\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I86ef96252e04c57db385e129227cc0d7dcd1fec2\n" }, { "commit": "dd7db24aaf872571b630b46add1995b3bec1b6fd", "tree": "cb1f1db984b5e8051cfdc084aee5c449c895fbcd", "parents": [ "f0c8a8853c373e046d14ab629e0ea50066df92e7" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Aug 05 14:14:15 2021 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Nov 05 15:35:57 2021 -0500" }, "message": "feat: add support for SP805 Trusted watchdog module helper APIs\n\nWe leverage this module to generate secure interrupts which we\nplan to use for exercising secure interrupt handling support in\nSPM(Hafnium) in co-ordination with Cactus SP\n\nCorrespondingly, a device region node is added to the Cactus primary\nSP manifest which captures the base address as well as other related\nproperties such as interrupts.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I410fdf926a23bd438e9899320f43a77e3697bc91\n" }, { "commit": "9473007967d34fede067dcb55849e0901da44688", "tree": "e131a3f937af72a759d1afa4ce73cb913b6d6fa8", "parents": [ "aaca1c848767e2bb7935887dca3d540bdc9e6d77" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Jun 08 16:59:38 2020 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Sep 02 11:54:08 2020 -0500" }, "message": "Minor bug fixes in multicore IRQ spurious test\n\nProgram the memory mapped GIC_ITARGETSR register with appropriate\ncpu mask and assert the expected value is returned upon reading\nthe register.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I356111d763569c229d7f4c9ea3cd4899305a4954\n" }, { "commit": "9e6f757f3df716b7a1a9ac05de130617e10316fb", "tree": "9e6ea130e31face4b1012e65a55c80ee5aa1f9a9", "parents": [ "5861730b3d6333f936c2fcecaa034de0391cbd94" ], "author": { "name": "Varun Wadekar", "email": "vwadekar@nvidia.com", "time": "Thu Mar 12 14:31:39 2020 -0700" }, "committer": { "name": "Varun Wadekar", "email": "vwadekar@nvidia.com", "time": "Mon Jun 08 16:20:40 2020 -0700" }, "message": "drivers: ti: uart: introduce UART 16550 driver\n\nThis patch introduces a console driver for the TI UART 16550\ndevice.\n\nSigned-off-by: Varun Wadekar \u003cvwadekar@nvidia.com\u003e\nChange-Id: I46c1abacfe3c2392aee68f0f94b98a284568ddd8\n" }, { "commit": "f218ffeb19020ac0ecf8cedc7ec733ac8bd2d416", "tree": "72554d56c2a6814123ef81dccc381273f36ac0c2", "parents": [ "97de48df60e16c0889b41098beb138eaeff32362" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Apr 09 15:16:40 2020 +0100" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Apr 27 10:39:35 2020 +0100" }, "message": "pl011: allow alternate stdout to be used\n\nTill now only pl011 UART is available stdout but there is a usecase to\nredirect it to other channel.\n\nThis patch decouples console_putc implementation from pl011.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I38e8c5c90421fad2425228f407e6f29bdf6b08c7\n" }, { "commit": "73e5cb494d3d49ba05ecb3fc9707544e29e50c89", "tree": "0b1075554272d845d98bee2f33d3c128b757dac1", "parents": [ "c249d5e5cfbf2aa0f584001543c1d39953e1d6aa" ], "author": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Thu Feb 06 17:15:23 2020 -0600" }, "committer": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Tue Feb 11 09:22:12 2020 -0600" }, "message": "Max SPI INTID is 1019\n\nSigned-off-by: Deepika Bhavnani \u003cdeepika.bhavnani@arm.com\u003e\nChange-Id: I1f99ec379f636cb9c812d7c4ca44f529455dabfd\n" }, { "commit": "c249d5e5cfbf2aa0f584001543c1d39953e1d6aa", "tree": "bae825efb76949c451188bb0e96de2ea1b120514", "parents": [ "1b5952a79ca1a6feb7b23372420285e886497852" ], "author": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Thu Feb 06 16:29:45 2020 -0600" }, "committer": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Tue Feb 11 09:22:12 2020 -0600" }, "message": "Switch AARCH32/AARCH64 to __aarch64__\n\nNOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.\n\nAll common C compilers pre-define the same macros to signal which\narchitecture the code is being compiled for: __arm__ for AArch32 (or\nearlier versions) and __aarch64__ for AArch64. There\u0027s no need for TF-A\nto define its own custom macros for this. In order to unify code with\nthe export headers (which use __aarch64__ to avoid another dependency),\nlet\u0027s deprecate the AARCH32 and AARCH64 macros and switch the code base\nover to the pre-defined standard macro. (Since it is somewhat\nunintuitive that __arm__ only means AArch32, let\u0027s standardize on only\nusing __aarch64__.)\n\nNOTE: This change is based on below TFA commit\nhttps://github.com/ARM-software/arm-trusted-firmware/commit/402b3cf8766fe2cb4ae462f7ee7761d08a1ba56c\n\nSigned-off-by: Deepika Bhavnani \u003cdeepika.bhavnani@arm.com\u003e\nChange-Id: If2c3dbaeb01d4a9d8cfd95d906e5eaf4ae94417f\n" }, { "commit": "d651444dbf8af93e21c4e205d6ada440d9c679ce", "tree": "2741a66b24a4e5b681ed6bc860e552d9f88125a5", "parents": [ "69a0bfc0abf7ca48ed425d260549822d1fe1b3bb" ], "author": { "name": "Marek Bykowski", "email": "marek.bykowski@gmail.com", "time": "Tue Dec 17 07:41:43 2019 -0600" }, "committer": { "name": "Marek Bykowski", "email": "marek.bykowski@gmail.com", "time": "Thu Dec 19 11:17:56 2019 +0100" }, "message": "arm: gic: Don\u0027t assume the GIC base addresses are within 4G range.\n\nThere are systems out where the GIC registers (but not only) are\nmemory-mapped to addresses above the 4G range, eg. 0x80_0000_0000\nto 0xFF_FFFF_FFFF. After following a flat (one to one) mapping a 32-bit\nunsigned int isn\u0027t big enough for the 40-bit addresses. Change that to\nuintptr_t.\n\nSigned-off-by: Marek Bykowski \u003cmarek.bykowski@gmail.com\u003e\nChange-Id: Ida47495e9b2d6f4f93cbfc6eb2e497d449d6a208\n" }, { "commit": "3da9cb1fcad88d5c7ca60141c067ad5559cdb399", "tree": "03dea16e67cb32994050580fd74a0fb5cb9c9994", "parents": [ "5394feaf2190cb0a80ff0b633d2702a9add337a2" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Tue Apr 23 10:53:45 2019 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Tue Apr 23 10:53:45 2019 +0100" }, "message": "drivers: console: pl011: Move comments to header\n\nRather than having the description of each function in the\nimplementation, move it to the header so that it isn\u0027t needed to copy\nit in each file that implements a console driver.\n\nChange-Id: I1b437ae3d3ccff10979466727353bc1fa1d5b188\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "602b7f58dd7668411c8a4032652b4552bd7fe934", "tree": "675e0939d19e306e01703359d7b8661d4f312d32", "parents": [ "8a573de8dda42258b747e56f19190311ea090d29" ], "author": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Mon Feb 11 14:13:43 2019 +0000" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Mar 04 12:20:38 2019 +0000" }, "message": "libc: Update includes\n\nReflect the changes in the structure of libc.\n\nNB: the include of stdarg.h in nvm_results_helpers.c is not in alphabetical\norder because it needs to be included before stdio.h. Fixing this would require\nfurther changes.\n\nChange-Id: I07f62a3450802833408ff3e1f950fd3b643e5e33\nSigned-off-by: Ambroise Vincent \u003cambroise.vincent@arm.com\u003e\n" }, { "commit": "09a00ef98c6108fec75dafcc7dbdddacb2ee2e91", "tree": "77b585708a4fd850f0dac3a3f0fcaf34576fa8c9", "parents": [ "9e550b6f75f064b53d74a4ad3c8672332d87451c" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Jan 11 13:12:58 2019 +0000" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri Jan 25 08:23:20 2019 +0000" }, "message": "Sanitise includes of include/drivers across codebase\n\nEnforce full include path for includes.\n\nThe reason for this change is that having a global namespace for\nincludes isn\u0027t a good idea. It defeats one of the advantages of having\nfolders and it introduces problems that are sometimes subtle (because\nyou may not know the header you are actually including if there are two\nof them with the same name).\n\nChange-Id: I45e912b16c9fff81f50840dad7e7f90ed6637b2a\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "3cd87d77947ec4fc04440268ed122b4ed81c7781", "tree": "78fdee12b026b931029e434f29b4fe09835fe4c9", "parents": [], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 09 11:12:55 2018 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Oct 10 12:34:34 2018 +0200" }, "message": "Trusted Firmware-A Tests, version 2.0\n\nThis is the first public version of the tests for the Trusted\nFirmware-A project. Please see the documentation provided in the\nsource tree for more details.\n\nChange-Id: I6f3452046a1351ac94a71b3525c30a4ca8db7867\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\nCo-authored-by: amobal01 \u003camol.balasokamble@arm.com\u003e\nCo-authored-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\nCo-authored-by: Asha R \u003casha.r@arm.com\u003e\nCo-authored-by: Chandni Cherukuri \u003cchandni.cherukuri@arm.com\u003e\nCo-authored-by: David Cunado \u003cdavid.cunado@arm.com\u003e\nCo-authored-by: Dimitris Papastamos \u003cdimitris.papastamos@arm.com\u003e\nCo-authored-by: Douglas Raillard \u003cdouglas.raillard@arm.com\u003e\nCo-authored-by: dp-arm \u003cdimitris.papastamos@arm.com\u003e\nCo-authored-by: Jeenu Viswambharan \u003cjeenu.viswambharan@arm.com\u003e\nCo-authored-by: Jonathan Wright \u003cjonathan.wright@arm.com\u003e\nCo-authored-by: Kévin Petit \u003ckevin.petit@arm.com\u003e\nCo-authored-by: Roberto Vargas \u003croberto.vargas@arm.com\u003e\nCo-authored-by: Sathees Balya \u003csathees.balya@arm.com\u003e\nCo-authored-by: Shawon Roy \u003cShawon.Roy@arm.com\u003e\nCo-authored-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\nCo-authored-by: Thomas Abraham \u003cthomas.abraham@arm.com\u003e\nCo-authored-by: Vikram Kanigiri \u003cvikram.kanigiri@arm.com\u003e\nCo-authored-by: Yatharth Kochar \u003cyatharth.kochar@arm.com\u003e\n" } ] }