)]}' { "log": [ { "commit": "e533478ae2a0374e25d1eaff68eb5381a33ed345", "tree": "610a7160c96b43e96c00fafcbf9f4676ad6c222c", "parents": [ "dfc4d7f46fb95441443066f60d1b855f7ef9c364" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed May 08 20:33:20 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed May 08 20:33:20 2024 -0500" }, "message": "feat(smc): add test for pmf version check\n\nPMF is moved under vendor specific EL3 range, part of this\nwe have introduced each sub-service have an version scheme[1].\n\nAdd a simple test to check if the sub-service version\nis probed.\n\n[1]:\nhttps://trustedfirmware-a.readthedocs.io/en/latest/components/ven-el3-service.html\n\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\nChange-Id: I885cd1378a8025371172e5cd82fdd111d6832619\n" }, { "commit": "dd8025c73f9c2f73c663629b30508b96f04194e1", "tree": "d476fff8d3bc87d11f8b132b4b55698638792f4a", "parents": [ "951d5fbe6641ed58747fed557e462dd3f3508ce4" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Mar 14 09:47:24 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "feat(smc): add test for vendor-specific service\n\nAdd test to check vendor-specific el3 service calls.\n\nChange-Id: I981d1cacec8690f57e51a5f05d51b6e437d1eb6a\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "951d5fbe6641ed58747fed557e462dd3f3508ce4", "tree": "b086b0ade6129b8294017dcaba03c0ebc5b4da9a", "parents": [ "f33112d50b18143421d3f3eac02a615f821ec284" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Mar 14 09:50:37 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "refactor(smc): group all smc tests\n\nMove and group all smccc related tests to tests-smc*\nfile.\n\nChange-Id: I34eb4dc906b558badab2c9356bb316d92f40914a\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "f33112d50b18143421d3f3eac02a615f821ec284", "tree": "eacae716d87f7883d56bbdf8b533a8c068a0c00a", "parents": [ "3eb25fb886ece03d872eaba4bbd31cf80edda6af" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Mon Feb 26 09:44:36 2024 -0600" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "refactor: make debugfs and pmf as vendor el3 services\n\nMove Debugfs and PMF support to vendor-specific el3 space.\nSMCCC 1.5 introduces vendor-specific el3 space.\n\nRef: https://developer.arm.com/docs/den0028/latest\n\nChange-Id: Ie6679dbb2ca2434ebd4fc19c2cc21cf5a84f97ab\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "3eb25fb886ece03d872eaba4bbd31cf80edda6af", "tree": "5de8b9d866ae31762bec44e6d2264ed47bc59d1e", "parents": [ "bbd609b99b23da41b997415980065be5849aeea9", "f2bb5d0f502955caf58192c6d9c9e0a051817b5d" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Apr 23 14:48:41 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 23 14:48:41 2024 +0200" }, "message": "Merge \"test(ff-a): FFA_FEATURES returns max RXTX buffer size\"" }, { "commit": "42487ce271ed8de49625bcec731661b6b790953d", "tree": "9dbccf61a20c85ca92fbf81fbfef005ebb67519d", "parents": [ "eaf60b4cad7d34afedb3259a4dd6164b39cb9c0e", "bff9b3ca375d40753a3212dbf178bcdfc7784841" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Apr 15 15:56:34 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Apr 15 15:56:34 2024 +0200" }, "message": "Merge changes from topic \"km/rxtx_map_unmap\"\n\n* changes:\n test(spm): tests for RXTX_MAP/RXTX_UNMAP\n feat(ffa-svc): add `ffa_func_name` and `ffa_error_name`\n" }, { "commit": "bff9b3ca375d40753a3212dbf178bcdfc7784841", "tree": "d46e017d6c35e04582c340fbd1c433680fbc22c9", "parents": [ "e3e570653471af3506846f06b5fe0421970adce4" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 18 16:08:35 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Apr 12 17:24:23 2024 +0100" }, "message": "test(spm): tests for RXTX_MAP/RXTX_UNMAP\n\nTests to check that RXTX_MAP and RXTX_UNMAP properly unmap/map the RX\nand TX pages from the NWd stage 2 page tables.\nSpecifically:\n* RXTX_MAP should fail when using secure memory\n* RXTX_MAP should fail when using non-secure memory outside the regions\n specified in SPMC nodes\n* Memory sharing functions (lend, share, donate) should fail when using\n memory that has been mapped by RXTX_MAP\n* RXTX_UNMAP should fail when using different VM IDs\n* Forwarded RXTX_MAP should succeed when the region is not mapped\n* Two consecutive forwarded RXTX_MAPs should succeed when the regions\n don\u0027t overlap and the endpoint IDs are different\n* Forwarded RXTX_MAP should fail when the region is already mapped\n* Memory sharing functions (lend, share, donate) should fail when using\n memory that has been mapped by forwarded RXTX_MAP\n\nChange-Id: I006681ab54f5ff602e862ae09438d0d174c8d0b0\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "e3e570653471af3506846f06b5fe0421970adce4", "tree": "f1a6c8a23f0a06e442d058b2ad22034f6e0febb5", "parents": [ "52f0b0ac70de3701d642cd59044aa70ffa342e40" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 18 14:28:36 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Apr 12 17:16:00 2024 +0100" }, "message": "feat(ffa-svc): add `ffa_func_name` and `ffa_error_name`\n\nAdds helper functions for getting string representations of function\nidentifiers and error codes. This makes debug logs more readable than\nprinting the integer value.\n\nChange-Id: I9e74c197686dc08e0c71886f641c60829587bad6\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "b21ee3e7c8e796f918e59205dd4184aa7732a3e6", "tree": "4c109838a31cfe3375936a4685973af32d39a30b", "parents": [ "52f0b0ac70de3701d642cd59044aa70ffa342e40" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Mar 20 16:32:56 2024 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Apr 05 11:25:54 2024 -0500" }, "message": "test: ensure mte registers are restored upon context switch\n\nThis test aims to validate MTE system registers are restored to\ncorrect values upon world switch triggered by an FF-A direct message\nrequest to an SP.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I9b01d349a0cf0ce557e74cfc70ed5208468e7919\n" }, { "commit": "b1b37926917b265ef8a3f6caf59b6a20fe8b636c", "tree": "41baf3e3f7d6ab325f673bb5bababe955713663f", "parents": [ "e3ee6e0a40b73baffd26563adb9cf49b040cbc30" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Sat Jan 13 21:49:04 2024 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 29 09:22:09 2024 +0100" }, "message": "test(realm): add test for enabling pmu with multiple rec\n\nTest creates realm with less number of pmu counters than available\nTest verifies that only programmed num of pmu counters are available in realm\n\nChange-Id: I479dd8949950357b9814576b1b6cef142d21c75f\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f2bb5d0f502955caf58192c6d9c9e0a051817b5d", "tree": "578f200539be531f599a6d3989cc5894f2280f6f", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Feb 13 17:23:17 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Mar 27 12:48:46 2024 +0000" }, "message": "test(ff-a): FFA_FEATURES returns max RXTX buffer size\n\nAdd testcase to check that a call to `FFA_FEATURES` with\n`FFA_RXTX_MAP_SMC64` returns a parameter explaining the maximum and\nminimum buffer size on v1.2 or greater.\n\nChange-Id: I03efc89655daf9f7c2eb9cf35d26c5a68690036a\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "462b07dc17b74e12a02c66f8135b849e7aea0d52", "tree": "b4f9c6193b7c624f588164232cb10e633ced5621", "parents": [ "faee961c7c3a17ba0eb25f5c90486a38e681c83c" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Feb 08 02:16:25 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm): add testcase for access outside realm IPA space\n\nAdd testcase for accessing addr with IPA outside realm IPA space.\n* If IPA is larger than implemented PA size expect adr size fault,\n* If IPA is larger than realm IPA space but less than implemented\n PA size expect SEA taken to realm.\n\nChange-Id: I81c49bac5b8b869b24b81f6af3cdb3f093eb9f64\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "faee961c7c3a17ba0eb25f5c90486a38e681c83c", "tree": "ac9e3fb9edd777093ea918200a1f649e9377d0f4", "parents": [ "f733a781ab7fdcb4e775a74005b2f23a313094ef" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 14:26:36 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm): add ability to overwrite s2sz for creating realm\n\nAdd capability to check and overwrite s2sz via feature flag\nwhile creating realm.\n\nChange-Id: I33afd5903cf4de546aba1c17c988b32a6e1b05a5\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f733a781ab7fdcb4e775a74005b2f23a313094ef", "tree": "3de60d072408b473bfdbb0ca912eccfafa6be9a9", "parents": [ "733f88170011df029477656c66b6959fdb91cf35" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Jan 03 22:33:10 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm) : add tests for PAS transitions\n\nadd tests for HIPAS and RIPAS changes at a\nProtected IPA which can occur when the\nRealm state is New and Active\n\nChange-Id: I0ad13d697e8b69e71e58197878d1d58a2f6ebff7\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "248284e7c05a0c80c2d8399759686a1357a58cc9", "tree": "f6552943f25141e317637e9bf6aa495f0ea2fa94", "parents": [ "4b67249600e466b4f4758ee19fc13e2b0a54118f", "31b91f4c51656adf5fe9e8319272d95fa1a2ecdf" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Mar 20 18:13:00 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Mar 20 18:13:00 2024 +0100" }, "message": "Merge \"refactor: trim down extensive test list\"" }, { "commit": "31b91f4c51656adf5fe9e8319272d95fa1a2ecdf", "tree": "dca102360884f383515beb942623029e1960bc4f", "parents": [ "e39d55ab48b30c610859c277551b97c65cbe82bf" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Mar 20 12:57:10 2024 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Mar 20 12:57:10 2024 +0000" }, "message": "refactor: trim down extensive test list\n\nExtensive tests are meant to do stress testing but currently the list\nincludes most of the tests from standard test and two extensive ones\nrelated with PSCI and timer.\nSince we do standard tests in quite a few configurations, no need to\ntest them again in extensive.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I0be868e1e781fd95e95908b82bd138dc7c6d32aa\n" }, { "commit": "e42a620bfceaf6723cba4871a662054cdb622fe4", "tree": "25fcc9e9f03973351598deaae6d10bccce6eb84a", "parents": [ "68f022f84d501985d0be5d5b497d91938539efe0" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 16:37:17 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): add Cortex-A520 cpu struct for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: Ia0533991cc0489fc67c1c69917e5d343410c3a29\n" }, { "commit": "68f022f84d501985d0be5d5b497d91938539efe0", "tree": "58cb3213925bd292c1eea987561182211252d095", "parents": [ "7bb1c84eca3a7dc46051b75b6b1cf13046b88c92" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 16:33:13 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): add Cortex-X3 cpu struct for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I8b3bad451b6c29dedff6cdf310a1bdb3b20c6f4c\n" }, { "commit": "7bb1c84eca3a7dc46051b75b6b1cf13046b88c92", "tree": "1be17aeca48b145e8814b08be48637483268afe7", "parents": [ "44115698f07b73ce83fdcce4e26aafe701c49b1c" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 15 14:14:59 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): update the cpu structs for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I4650a88003db2ded9277b35c7fc521026fe4a5d7\n" }, { "commit": "df754458af72ab6a30db822cf7c3fe5b42d5c885", "tree": "7238e95f8a1d9f79fbc8314b146b12e7e1a3761e", "parents": [ "5c5f7bdf581348dc8e483b2e4fc3b34b8bae56d2" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Mon Mar 04 15:46:05 2024 -0600" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Mar 14 10:56:21 2024 -0500" }, "message": "refactor(sdei): refactor SDEI test to align with new SPSR config\n\nModified sdei_event_check_pstate() to align with the updated\nSPSR configuration procedure which uses the create_spsr()\nAPI.\n\nChange-Id: I7723657117a8c64762acdbb410ad535058c97e9d\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "cd6128d479033c7ac4cff8e932415b5c04bbde67", "tree": "8fc71d62d3a84528c74c35fb383208129a741a38", "parents": [ "e39d55ab48b30c610859c277551b97c65cbe82bf" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 15:18:50 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Tue Mar 05 11:34:15 2024 -0600" }, "message": "refactor(errata_abi): add the Cortex-X4 cpu struct\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I8421dcc98eea85d038070f90e819e91bb2652727\n" }, { "commit": "f6328f67e4e87639b48e00d842192122360e1c89", "tree": "fa8e1d90237ac255382b19b74da650f55b9c6faa", "parents": [ "8c2ca7ec7e312f48486c75c42ffad9dc1401d563", "d72ab0984a2318cfa5b74a2dff5b708734d4d402" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Wed Feb 28 14:51:13 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 28 14:51:13 2024 +0100" }, "message": "Merge \"feat: introduce UNDEF injection test\"" }, { "commit": "d72ab0984a2318cfa5b74a2dff5b708734d4d402", "tree": "7eb71791a47bcbea2491ddacfb27f65fe5406f4b", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Dec 11 17:43:53 2023 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Feb 22 14:21:33 2024 +0000" }, "message": "feat: introduce UNDEF injection test\n\nTest to verify UNDEF injection support in TF-A by trapping FGT register\naccess from tftf into EL3.\n\nTo trap FGT register access to EL3, run the test on model with FEAT_FGT\npresent but the traps from EL3 are not enabled (ENABLE_FEAT_FGT \u003d 0).\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: Ic58ef797c64aad6d17ea33d9fc34e14b4e1a7055\n" }, { "commit": "4aaccc671a4750c72e30e282eff0c4c863eb57a9", "tree": "452393e32b8e1ee9bbc99bd104d4386c82e7ed6b", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Feb 22 12:26:57 2024 +0000" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Feb 22 12:51:48 2024 +0000" }, "message": "feat(rmi): force max IPA size on Realms to 48 bits\n\nCurrently, RMM might be able to support FEAT_LPA2 and 52 bits address\nsize, however as TFTF tests does not support FEAT_LPA2 yet, we need to\nlimit the maximum IPA space size for realm creation on RMI tests, as\nTFTF uses the maximum size supported reported by RMM as the IPA\nsize when creating new realms, which can cause an inconsistency if\nFEAT_LPA2 is disabled.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I3b77cbbb41a8a1353c7a35decc35d080fd3ad9f3\n" }, { "commit": "2a5abadb8e841eedeaa1ff78b6f0da5f957b2ab8", "tree": "42755e1512d2cf0d6abf3f0baa01a289d2a69e46", "parents": [ "21a30ed1ae35a8b32d23e96cdc143702a27bda90" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Jan 17 13:48:44 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Feb 14 12:51:31 2024 +0100" }, "message": "test(realm): add test for FEAT_DIT\n\nAdd testcase to enable FEAT_DIT in realm.\nTest if DIT Bit is preserved across context switch RL/NS.\n\nChange-Id: I26cbaaf669b53ecba14a451955b6f847c45e0575\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "21a30ed1ae35a8b32d23e96cdc143702a27bda90", "tree": "bd1d61a86ff59e96c33a98a036e542f43ce185df", "parents": [ "a8deec5c0b51719b1f268e4f106c3a095a387074" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Sat Jan 13 23:07:43 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Feb 14 12:51:31 2024 +0100" }, "message": "test(realm): test realm pauth state is preserved\n\nModify Pauth lib to work for multiple CPU\nTest if Realm pauth state is preserved for all RECs\non context switch to RMM/NS.\n\nChange-Id: Ibb393b415bab27066289b560be49e02d0c8f58ba\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "a3ec1f1762236914d129dd8155d19b149b2c6570", "tree": "932c808a0ca57770ecff5fd831ba2eddb0b25f9d", "parents": [ "8e3f5662031f785930f997d713fc1730b101e5bb", "a08c7195558726a2c3abd3bf9167ff4deae7d9e1" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Mon Feb 12 17:31:14 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Feb 12 17:31:14 2024 +0100" }, "message": "Merge changes from topic \"mp/dma_isolation\"\n\n* changes:\n test: exercise DMA isolation for secure access to ns memory\n fix: specify properties to corresponding memory region nodes\n" }, { "commit": "8e3f5662031f785930f997d713fc1730b101e5bb", "tree": "ee4e3153b8563f3a46e0e845fdce0492307645d0", "parents": [ "51e153663b5b31c3d4f7dcdef266a431111d4bad", "7b51dbe9d4739f622f332fd232a3068b99c2bb50" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Feb 08 17:08:05 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 08 17:08:05 2024 +0100" }, "message": "Merge \"refactor(smc_fuzz): performance enhancement\"" }, { "commit": "b027f5706308502152b5aade0ad509ba27370c42", "tree": "3a05dab054068d29e8b242f8f82daa4a864468e9", "parents": [ "fd35f0a4d6125bb1fa69a671a6d2d42628229609" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Jan 02 22:00:29 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Feb 08 12:14:31 2024 +0100" }, "message": "test(realm): add testcase for Synchronous external aborts\n\nAdd testcase to cause instruction or data abort in Realm by\naccessing addr with\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dEMPTY\n* HIPAS\u003dASSIGNED and RIPAS\u003dEMPTY\n* Unprotected IPA\n* Host injected SEA after Data abort\n\nChange-Id: I6be546c042b4983670fb7c27fca74649c68787be\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "a08c7195558726a2c3abd3bf9167ff4deae7d9e1", "tree": "3701dcb74085676d356e05b92f201e2e6800860b", "parents": [ "9fd0a9a2342668fa12cf2b15bc83be907899b8a4" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Oct 18 17:49:32 2023 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Feb 07 17:03:56 2024 -0600" }, "message": "test: exercise DMA isolation for secure access to ns memory\n\nThis test helps to validate a scenario where a secure stream\nbelonging to Cactus SP accesses non-secure IPA space.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I8085f2974d53b9cec9b3ae4a17fd328607b76e2b\n" }, { "commit": "fd35f0a4d6125bb1fa69a671a6d2d42628229609", "tree": "bf1c92d316299405b3751e62e904616f2f81e0a3", "parents": [ "69c9f363cb172788ef7e8d3fd711f56ddf481bf8", "e742ba89effefc4298fb4e406e0515a83db9c7e0" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed Feb 07 17:22:13 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 07 17:22:13 2024 +0100" }, "message": "Merge changes from topic \"ja/spm_rme\"\n\n* changes:\n refactor: cactus to handle expect exception\n test(memory share): memory contents checks\n refactor(spm): clean-up after failed memory share\n test(spm): lend/donate realm memory\n test(spm): use all constituents of memory share\n test(spm): validate GPC with memory sharing\n test(memory share): leverage rme for lend/donate\n" }, { "commit": "4984ea7561a8bc3daefb2971594e3ff59fa3177a", "tree": "1c2b20b14f9bf6a1b43bbee538bcaf852e3d3e8b", "parents": [ "8469257f30b94e749c339d193a2f680ef701b380", "e68494eb130e2c8021ca4af626a9cb1df8d67dbd" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Wed Feb 07 11:16:36 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 07 11:16:36 2024 +0100" }, "message": "Merge changes Ic04c0dda,I350957ac,Idb838bd8\n\n* changes:\n test(realm): add testcase for REC exit due to Data/Instr abort\n fix(realm): fix realm destroy api\n test(realm): remove unwanted host_rmi_rtt_init_ripas\n" }, { "commit": "e742ba89effefc4298fb4e406e0515a83db9c7e0", "tree": "c3d9688ea07be06ac244e757faebdb1c76bb329b", "parents": [ "c2e32ed038aa54ae9c5d35362dc3c2fffc55fdb3" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 11 10:38:29 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "refactor: cactus to handle expect exception\n\nIn the test \u0027rl_memory_cannot_be_accessed_in_s\u0027, tftf\nshares memory to the SP that it changed to realm PAS.\n\nThe access from the SP should result in an exception.\nCactus receives an indication it should expect an\nexception on memory access via the arguments of the\n\u0027cactus_mem_send_cmd\u0027 request. This is used to avoid\nthe reads to check memory, which could return in an error\nresponse, which would make the test falsely fail.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ie220d4bab04c052a73e8b04c8667c9973b95a9e0\n" }, { "commit": "c2e32ed038aa54ae9c5d35362dc3c2fffc55fdb3", "tree": "449fb0a27b10806227d86762b9d27f53a8e35402", "parents": [ "b122eea5195b23c3e27fc8a28bc7dccf3623894a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Dec 04 13:22:44 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(memory share): memory contents checks\n\nIn RME enabled systems, the memory is expected to be\nscrubbed on PAS updates from S to NS. As well, it is likely\nthat the memory addresses are shadowed, and the contents are not\nvisible accross updates from the different address spaces.\nAs such, the SP shall not rely on memory content to be\nin any form. FFA_MEM_LEND/FFA_MEM_DONATE are thus considered\nfor memory allocation purposes.\n\nThis patch changes the memory sharing tests, to cater\nfor the correct assumptions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I78ed47df789dda1d695e2e52b0df8c28b12658da\n" }, { "commit": "b122eea5195b23c3e27fc8a28bc7dccf3623894a", "tree": "e891429587f817ef4eae9329f5063466824bd886", "parents": [ "3be0efa1d92003476d89f448502927660d747b1a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Oct 11 16:59:46 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "refactor(spm): clean-up after failed memory share\n\nClean-up after failed memory share test, to allow for subsequent\ntests to still provide meaningful test results.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ic763fb64c0948c19e6b7d7f99119b20cc05fc83b\n" }, { "commit": "3be0efa1d92003476d89f448502927660d747b1a", "tree": "1822e848bd7dd29c2213d9955249686df23c8969", "parents": [ "72f002936b6978078674dd1ed69c622220c90196" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Oct 02 19:11:11 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): lend/donate realm memory\n\nValidate if memory gets delegated to a realm PAS, it can\u0027t be used\nin FF-A memory lend/donate from NS to SWd.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I16c9b7193b4ae8f56b1182e3b28d13a742bfcd4e\n" }, { "commit": "72f002936b6978078674dd1ed69c622220c90196", "tree": "8a4c1f8adead9f77e0703a8e4c421d7b309919d5", "parents": [ "8083db2a0878011f16c549c7546331f255aa4658" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jan 08 11:31:45 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): use all constituents of memory share\n\nOn memory sharing operation use all the constituents within the\ncomposite.\n\nExtended memory lend operation test to include multiple scattered\npages to make sure the update to security state is happening\nto all memory regions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I2179df12ca63636bdb6489eea77e809422f95430\n" }, { "commit": "8083db2a0878011f16c549c7546331f255aa4658", "tree": "e9698ebfcb4185f174e05eaf57ff3721ceaf6074", "parents": [ "d39aa5b579411c1481efaf637ef44869831f7b7b" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jun 27 17:22:58 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): validate GPC with memory sharing\n\nValidate during the lend/donate with the SWd, when RME\nis in the platform of test, if the NWd attempts to access\nthe memory it will trigger a fault due to Granule Protection\nChecks (GPC).\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ibab25e7e56abaa28ae077d8b8c2c7cd377ccf515\n" }, { "commit": "d39aa5b579411c1481efaf637ef44869831f7b7b", "tree": "bc3ed3c9b3ae43b5accb744060ac28d3f8907c0d", "parents": [ "8469257f30b94e749c339d193a2f680ef701b380" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 24 10:21:46 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(memory share): leverage rme for lend/donate\n\nAdd the memory sharing test suite to invalid-access, and rename\nit to memory-access.\nIn such configuration the TF-A is meant to provide services\naccessible via SMC, to update the security state of the memory\nlent/donated between NWd to SWd.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4a6f2de612dbd9de2db757e3baf2613c47b8a09b\n" }, { "commit": "e68494eb130e2c8021ca4af626a9cb1df8d67dbd", "tree": "894c262fc0aa78dcbe3b28cc6b731df068a404b6", "parents": [ "daa6c795847b78692f522fd96f783a6d419aaec2" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Nov 06 11:04:57 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "test(realm): add testcase for REC exit due to Data/Instr abort\n\nAdd testcase to cause instruction or data abort in Realm by\naccessing addr with\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dDESTROYED\n* HIPAS\u003dASSIGNED and RIPAS\u003dDESTROYED\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dRAM\nVerify rec exit due to abort\n\nChange-Id: Ic04c0ddaf1b18ec0cfd71c28753c4ed7298302da\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "daa6c795847b78692f522fd96f783a6d419aaec2", "tree": "34ac7b861c0b9f264f21c1eeae2cdfc7cf8e52fd", "parents": [ "f33e3a6f851ef61d4271be6446278123bc6633a2" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Jan 11 15:06:29 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "fix(realm): fix realm destroy api\n\nAPI failed to destroy realms in new state,\nfix the assumption that no recs were created if realm is in new state\nDestroys all rec and realm properly.\n\nChange-Id: I350957acfa1ba1446a3028e6c277625ca76486b0\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f33e3a6f851ef61d4271be6446278123bc6633a2", "tree": "206b6e67ebd432ff5383c8a8cabb14abb3536478", "parents": [ "bca7a3ab0f23de5b4c135eb21fa4b80209d86118" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Dec 22 13:52:37 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "test(realm): remove unwanted host_rmi_rtt_init_ripas\n\nRemove unwanted host_rmi_rtt_init_ripas\nfrom host_realm_map_protected_data API\n\nChange-Id: Idb838bd824ab663ded5d08ca08211e0116daa64d\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "7b51dbe9d4739f622f332fd232a3068b99c2bb50", "tree": "ec009a4479242e55a6a863d2dc6fb5b10966796b", "parents": [ "6eec0b422131e94e9c602e5560a432b36b97f703" ], "author": { "name": "mardyk01", "email": "mark.dykes@arm.com", "time": "Wed Jan 17 15:25:36 2024 -0600" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Fri Feb 02 13:50:12 2024 -0600" }, "message": "refactor(smc_fuzz): performance enhancement\n\nAdd the ability to return integer rather than string from fuzzer\nfunction. This will improve performance especially for larger fuzz\nbased testing. This will work in tandem with the changes to the CI where\nthe script flows provide additional support for the change. Modifications\nto the device tree files have been made to prevent name clashes with\nthe function names.\n\nChange-Id: I95aaf23c95943f944d5837e2a8440514aafd6dde\nSigned-off-by: mardyk01 \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "1abd0d2332d79ef7e2889d648cd093bb90e10bf3", "tree": "720447f478c9e5ae6b5c1720419fed5c63da4b73", "parents": [ "f3ea1a8a01aa7e6181677c7d94654891903de9e4" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jan 17 11:31:57 2024 +0000" }, "committer": { "name": "Manish V Badarkhe", "email": "Manish.Badarkhe@arm.com", "time": "Wed Jan 31 19:18:57 2024 +0000" }, "message": "fix(spm): logs with errors in verbose builds\n\nFix few instances with verbose logs that contained\nbuild errors.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I08a2c23d831e5882939efce655c9c95485e2c9b9\n" }, { "commit": "0945e23153c06ed196756ac094c81ab8627d9a95", "tree": "7bc1e57bb77a4cf09cf18b75974e18e60711da53", "parents": [ "8f6b131f44bf5355d07b274f6a43490f968590b2", "16de81046dbffdfc19ca4a30524f170860eac178" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Jan 31 08:48:35 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jan 31 08:48:35 2024 +0100" }, "message": "Merge \"test(fvp): Test trusted key certificate corruption\"" }, { "commit": "16de81046dbffdfc19ca4a30524f170860eac178", "tree": "d70655f6090cd2e8befdae3a8270682f19f551ba", "parents": [ "84ad6157a4e83834fa925b80534ca5414c368586" ], "author": { "name": "Jimmy Brisson", "email": "jimmy.brisson@arm.com", "time": "Fri Aug 18 08:50:30 2023 -0500" }, "committer": { "name": "Jimmy Brisson", "email": "jimmy.brisson@arm.com", "time": "Mon Jan 29 13:10:08 2024 -0600" }, "message": "test(fvp): Test trusted key certificate corruption\n\nThis also includes a test framework for use with corrupting the\nroot of trust private key certificate in the boot FIP, found\nusing its UUID.\n\nSigned-off-by: Jimmy Brisson \u003cjimmy.brisson@arm.com\u003e\nChange-Id: I988c517637edcf6fdcaf271628eb650781c276f8\n" }, { "commit": "6bb3a506bf2c94a959735d03e2dd9f1e377c8451", "tree": "eb268bbc5ec9569193c661f481a91a70f117ed3c", "parents": [ "0f49af50669fa3484df3166e7db8a28c70d06329" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Oct 12 16:08:02 2023 +0200" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Jan 26 12:01:29 2024 +0100" }, "message": "refactor(spm): rename spm cpu_features to simd\n\ntest_spm_cpu_features.c is renamed test_spm_simd.c\ncactus_test_cpu_features.c is renamed cactus_test_simd.c\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: Icc2d7deada0ff335436cf36c7f2d2dfbf2a0d9a3\n" }, { "commit": "6dd65d85e079ae31478316051ac1568214491a82", "tree": "77ae85cddf2e6361df618f8fa8c370759383a674", "parents": [ "b744c9b49dc4af01e8af0a13b3c16d225cc05732" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 18 17:08:49 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jan 23 14:50:07 2024 +0000" }, "message": "test(memory share): enable hypervisor retrieve tests\n\nThe Hypervisor retrieve tests had been temporarily disabled,\nnow integration issues are expected to have been fixed.\nAs such, enable the tests.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4a1f5a99a8b3259799280daf5d32702c16964e4d\n" }, { "commit": "b744c9b49dc4af01e8af0a13b3c16d225cc05732", "tree": "9c79638bb86409a8d440ff890f375558cc78c239", "parents": [ "f325331b86dd3f2ea31bbb20690b36538a8ead87" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 18 17:03:47 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jan 23 14:50:07 2024 +0000" }, "message": "feat(memory share): verify receivers\n\nAdded functions to validate the receivers list in the\nhypervisor retrieve request tests.\nLeverage them to validate receivers list.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I705f3ca9f0e540dce60f660ebf996f2462a51e3c\n" }, { "commit": "f325331b86dd3f2ea31bbb20690b36538a8ead87", "tree": "4237de4b195da4aab89edcacf6ed2f6667af2f82", "parents": [ "f0b3bd6c706da491eb589e0e8cbd3bc16a77113a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 18 17:05:26 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jan 23 14:50:07 2024 +0000" }, "message": "fix(memory share): arguments used in retrieve tests\n\nFix a few small arguments that are used in the hypervisor\nretrieve request tests.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I9f6d2d10178331ffea6387a00c05002c07346bc6\n" }, { "commit": "a24f23a476578361aecd8a568191cc907c24240e", "tree": "b38806323ed4a33d91d27b0f18d563c1635f8f7c", "parents": [ "899dcedd9938549a19eb1a2ed474544c27f59520" ], "author": { "name": "Daniel Boulby", "email": "daniel.boulby@arm.com", "time": "Wed Nov 15 18:23:40 2023 +0000" }, "committer": { "name": "Daniel Boulby", "email": "daniel.boulby@arm.com", "time": "Mon Jan 22 18:49:54 2024 +0000" }, "message": "feat(ff-a): add impdef field to ffa_memory_access\n\nAdd impdef field to the endpoint memory access descriptor as\nintroduced by FF-A v1.2.\n\nSigned-off-by: Daniel Boulby \u003cdaniel.boulby@arm.com\u003e\nChange-Id: Ieb2808a5b4a8773cb4729c5aa10a6a0223ed8039\n" }, { "commit": "b34fe10c8ea998f3a1d8d9a40ba0f52ab5e30670", "tree": "c565a7445d6b0405317fd64ec559fa49d98e04e1", "parents": [ "6eec0b422131e94e9c602e5560a432b36b97f703" ], "author": { "name": "Daniel Boulby", "email": "daniel.boulby@arm.com", "time": "Wed Jan 17 15:10:52 2024 +0000" }, "committer": { "name": "Daniel Boulby", "email": "daniel.boulby@arm.com", "time": "Mon Jan 22 18:49:49 2024 +0000" }, "message": "feat(ff-a): update FF-A version for memory sharing tests\n\nSigned-off-by: Daniel Boulby \u003cdaniel.boulby@arm.com\u003e\nChange-Id: I647ad7d5cac7942dd24f5c5cc339943225821be8\n" }, { "commit": "6eec0b422131e94e9c602e5560a432b36b97f703", "tree": "32af6d4c80b149691948c6e3e064b70a25fb9b4d", "parents": [ "93c3c3809933914a4f104c901aec7e6f9c54cd79", "13887ac63d4186a851ae2a916c112cb6229c6e63" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Jan 18 14:36:04 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Jan 18 14:36:04 2024 +0100" }, "message": "Merge \"feat(mpam): add MPAM system registers access test\"" }, { "commit": "0c0f0eb414a0b93888ec5e1bff68f90de071c1d2", "tree": "309cebbf43a67056a2be4a918c1b122a24589053", "parents": [ "ea94738603d09be1399337f0976f89f951c35e6a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jan 17 14:08:52 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jan 17 14:08:52 2024 +0000" }, "message": "fix(spm): dropping hypervisor retrieve tests\n\nThe Hypervisor retrieve request tests have been merged\nand due to merging timing, missed capturing the failures\nintroduced with the hafnium changes [1].\n\nThis patches temporarily removes the hypervisor retrieve\nrequest tests, to unblock the ci.\nOnce we have fully fixed the issues we can re-insert\nthe tests.\n\n[1] https://review.trustedfirmware.org/q/topic:%22db/emad%22\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ic57d46e1fef3159b0d792667ede6afd98339a720\n" }, { "commit": "13887ac63d4186a851ae2a916c112cb6229c6e63", "tree": "e49867e623b38a26d977d84b2a21b1f382f523cf", "parents": [ "ea94738603d09be1399337f0976f89f951c35e6a" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Jan 04 15:22:52 2024 -0600" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Tue Jan 16 12:43:23 2024 -0600" }, "message": "feat(mpam): add MPAM system registers access test\n\nAdded a test which reads MPAM system registers to ensure that\nEL3 is giving permission to Non-secure EL2 to access these registers.\n\nChange-Id: Ie701a19c9682df6d6aeaec086954e275afff1843\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "ea94738603d09be1399337f0976f89f951c35e6a", "tree": "41b0b558a54f4e96a42ef4989d0910ea1f773fa1", "parents": [ "ec2eda8cf0faba3097570400ee4d07b736053efa", "028712b494ac24627f88e355af2864a54d81ba29" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Tue Jan 16 17:18:58 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Jan 16 17:18:58 2024 +0100" }, "message": "Merge changes from topic \"km/test_hypervisor_retrieve_request\"\n\n* changes:\n test(memory share): fragmented hypervisor retrieve request\n feat(memory share): support sending fragmented messages.\n test(memory share): multiple receiver hypervisor retrieve request\n feat(memory share): send multiple receiver regions\n test(memory share): hypervisor retrieve request\n refactor(spm): `ffa_memory_access` constructors\n refactor(ffa_helpers): use bitfields for memory access bitmaps\n" }, { "commit": "028712b494ac24627f88e355af2864a54d81ba29", "tree": "2a7c9db438c29eb37773029975f30e8eedbebf1c", "parents": [ "0d4f5ffaeb91f57e37819d69092bdf38aeac13d0" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Dec 06 15:50:33 2023 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 11 16:08:18 2024 +0000" }, "message": "test(memory share): fragmented hypervisor retrieve request\n\nChecks that the hypervisor retrieve request from section 17.4.3 of FF-A\nv1.2 REL0 is supported, when the request does not fit in a single\nfragment.\n\nChange-Id: I34c24251e2ed131758ce692dc538de704746e488\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "0d4f5ffaeb91f57e37819d69092bdf38aeac13d0", "tree": "9336eb6404b034baf8b9a9ed76aa88744078f25f", "parents": [ "1f48892a72dc34dbdfc1d27ae4708a243150eef3" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Oct 13 20:03:16 2023 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 11 16:07:24 2024 +0000" }, "message": "feat(memory share): support sending fragmented messages.\n\nUpdates `memory_init_and_send` to allow sending memory share messages\nacross multiple fragments.\nTests for this functionality will be added in the next commit.\n\nChange-Id: I6a47735415a8fed1d15322499f1d08cc3e1fd6a2\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "1f48892a72dc34dbdfc1d27ae4708a243150eef3", "tree": "7bba68b0223332faa26a4bbee16656a3f776db1e", "parents": [ "1331a8c0e861331e7ea9a140a2adea398988faaa" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Mon Dec 04 21:28:25 2023 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 11 14:08:37 2024 +0000" }, "message": "test(memory share): multiple receiver hypervisor retrieve request\n\nChecks that the hypervisor retrieve request from section 17.4.3 of FF-A\nv1.2 REL0 is supported, when specifying multiple recievers.\n\nChange-Id: I55e9f25aedaa408ab015115d5bab72bf17b22d25\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "1331a8c0e861331e7ea9a140a2adea398988faaa", "tree": "10fac1901bd460455d6ffa877666a8d5afff55f7", "parents": [ "3d879b8d66caf9d1f2b4e2a4c5333987bb74e4b8" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Sep 14 16:25:15 2023 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 11 14:08:37 2024 +0000" }, "message": "feat(memory share): send multiple receiver regions\n\nUpdates `memory_init_and_send` to allow passing more than one receiver.\nTests for this functionality will be added in the next commit.\n\nChange-Id: I51d92d74f64bfebfa3d49ff6d5066050087b44ef\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "3d879b8d66caf9d1f2b4e2a4c5333987bb74e4b8", "tree": "f2e37b988b49f36f01acf13471cacc6b7c33e8a2", "parents": [ "367ff54c829a41e5b223683805e2cf80f8882201" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Jun 16 10:32:08 2023 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 11 14:08:36 2024 +0000" }, "message": "test(memory share): hypervisor retrieve request\n\nChecks that the hypervisor retrieve request from section 17.4.3 of FF-A\nv1.2 REL0 is supported.\n\nSpecifically, the tests:\n1. Sends a FFA_MEM_SHARE/FFA_MEM_LEND/FFA_MEM_DONATE message from the\n tftf target to the SPMC.\n2. Sends a hypervisor retrieve request from the tftf target to the SPMC.\n3. Verify the contents of the FFA_MEM_RETRIEVE_RESP message against the\n previously sent message.\n4. Invoke reclaim interface for SPMC to free memory owned by the handle.\n\nChange-Id: If27d8d5b515c5e468977ed4f5f4ddeb86e44c5df\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "a91f0d7e67846729f2c480d414819ff37e287d83", "tree": "b91550102b119bf5059d0da4626a25bee15ea4b4", "parents": [ "e71ec9c4923590f5732b6d5e647ea1f3cc895d36" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Oct 24 11:23:12 2023 +0200" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Jan 11 11:39:31 2024 +0100" }, "message": "test(smmu): secure peripheral access prevented\n\nCheck a secure peripheral upstream to an SMMU cannot perform\ntransactions to a realm region.\n\nAdd an NS region to cactus SP, to be used as a placeholder for the DMA\ntest engine to perform a RAND48 operation.\nThe test scenario changes the NS buffer PAS into Realm. It then queries\na SP to initiate a secure DMA operation on this buffer through the SMMU.\nThe operation is expected to fail as a secure DMA transaction to a Realm\nregion fails SMMU GPC checks.\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: I5d061e5f0fc16cc9c14089f95e0ff5e49cb2a9cd\n" }, { "commit": "e71ec9c4923590f5732b6d5e647ea1f3cc895d36", "tree": "0475fb8e7e1a441df6319b60a215bc797655f078", "parents": [ "be4850c9345512f37da32c520367fc2a775303e7" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Mon Feb 28 18:57:26 2022 +0100" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Jan 11 11:36:11 2024 +0100" }, "message": "refactor(smmu): secure side DMA rand and memcpy\n\nAdd operation, source and size parameters to the cactus command\ninitiating an operation to the DMA test engine through the SMMU.\nAdd RAND48 operation support to the DMA test engine.\nRefactor to a common run_testengine helper exercised by MEMCPY\nand RAND48 SMMU operations.\nCactus SP dispatches either one of the operation based on the\noperation id passed from TFTF.\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: I2ca7c303e8fef6baf99fe4b64b33102546b9ff30\n" }, { "commit": "367ff54c829a41e5b223683805e2cf80f8882201", "tree": "3e3245f6b10fe26ca64dcafd8d67705705c299e0", "parents": [ "92aa770261f62af56268659db38fed9465953106" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Nov 01 15:05:37 2023 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Jan 09 12:33:42 2024 +0000" }, "message": "refactor(spm): `ffa_memory_access` constructors\n\nAdd `ffa_memory_access_init_permissions` and\n`ffa_memory_access_init_permissions_from_mem_func` helpers.\n\nChange-Id: I9a5bb09e7f230a65decff7f58a0c188aff3e7449\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "92aa770261f62af56268659db38fed9465953106", "tree": "db987ff7f7c9b03bbc1a5db68faffc0f32766a5d", "parents": [ "be4850c9345512f37da32c520367fc2a775303e7" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Oct 11 18:48:01 2023 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Jan 09 12:26:42 2024 +0000" }, "message": "refactor(ffa_helpers): use bitfields for memory access bitmaps\n\nInstead of doing the bit-manipulation manually, these types can be\ndeclared as structs where the fields are given explicit bitwidths. The\ncompiler will generate the appropriate bit-manipulation automatically.\n\nChange-Id: I0d4754466b1e70d1b36cb039bfe9e7701ebbd60f\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "86f312a40a1aff596f6adfd18bebc8a28411c414", "tree": "1c42ed26352bf1425bc598f17e26a0647c83e555", "parents": [ "affbae8163ad25534cfe4dbc4bcda5a3372d0062" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Dec 21 11:33:03 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Jan 05 16:38:11 2024 +0100" }, "message": "test(realm): testcase for multiple rec validations\n\nAdded negative testcase for CPU_ON\nand PSCI_COMPLETE calls\n\nChange-Id: Ie14140825de6b00ca6dcf9d758ee9b68a427bf8a\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "affbae8163ad25534cfe4dbc4bcda5a3372d0062", "tree": "b75a233b78259620329179a4f6e3d8e3a3b18d79", "parents": [ "ec482824eba8020f9b36b6b7a563ac3c84064c23" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Aug 22 12:51:11 2023 +0100" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Jan 05 15:35:50 2024 +0000" }, "message": "test(rmm): add testcase for multiple rec on multiple cpu\n\nTest creates and enter 8 recs on different CPUs.\nExercises CPU_ON, CPU_OFF and PSCI_AFFINITY_INFO\nfrom realm.\n\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\nChange-Id: Iecc58ea79bfde28f307d1df99680d707e57a1d80\n" }, { "commit": "a0e46db319398df36e4bd3c49e391c814079b898", "tree": "f1310729aadb309b5efc5173fa9eaa0b3a1c4e7c", "parents": [ "84ad6157a4e83834fa925b80534ca5414c368586", "e15bc803ed76eee496f95cba2df45aa292500090" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Dec 20 15:28:23 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Dec 20 15:28:23 2023 +0100" }, "message": "Merge \"feat(handoff): update register signature\"" }, { "commit": "84ad6157a4e83834fa925b80534ca5414c368586", "tree": "ee6e72c6abfc54d2d552754ee8bf16b2d3ba5ac7", "parents": [ "d616be5afd3a372b30dd34d572608ac56703fc13", "fef8621d2d5ce3ce67a4ba3013292b7382b92355" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Dec 19 16:07:10 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Dec 19 16:07:10 2023 +0100" }, "message": "Merge changes I6809fdab,I4da6c7d2,Ia57a0ddb\n\n* changes:\n test(realm): testcase for RMI_RTT_SET_RIPAS reject\n feat(realm): add support for RSI_IPA_STATE_GET/SET\n fix(realm): fix issue in rtt teardown\n" }, { "commit": "fef8621d2d5ce3ce67a4ba3013292b7382b92355", "tree": "3704d2a1a84205cedf36191c7f2ebb648ecce4a2", "parents": [ "bb772193864856ce5d0da9b3534316b7bc4fc3d3" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Oct 17 12:15:38 2023 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Dec 19 15:09:04 2023 +0200" }, "message": "test(realm): testcase for RMI_RTT_SET_RIPAS reject\n\nAdd testcase for realm to call rsi_ipa_state_set,\nhost will reject and call RMI_RTT_SET_RIPAS\nre-enter rec with response RSI_REJECT\n\nChange-Id: I6809fdabba580b23269aedc2aa844b15fbcce981\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "bb772193864856ce5d0da9b3534316b7bc4fc3d3", "tree": "c2ecde3c3eaea03acb70d6fa5166e178591a1fd2", "parents": [ "d5b30b42f36d9fc80d0a26c238129a2488f6a068" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Oct 09 16:08:28 2023 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Dec 19 15:08:13 2023 +0200" }, "message": "feat(realm): add support for RSI_IPA_STATE_GET/SET\n\nAdd support for realm API rsi_ipa_state_set, rsi_ipa_state_get\nAdd testcase for following\n* Realm calls rsi_ipa_state_set to change RIPAS\u003dRAM,\n* Host accepts and call RMI_RTT_SET_RIPAS\n* Realm verifies RIPAS change was successful\n\nChange-Id: I4da6c7d25faa62afde1d0f682510bac6c8445821\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "d616be5afd3a372b30dd34d572608ac56703fc13", "tree": "ca0730ea552687bea0f70fb6c5c58ac763d9876c", "parents": [ "f0da2001c7779ca7bc23dce4bab9bd314cdcb0e6", "f5b46352dbafdbca62b2cf10b4410213c62612c8" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Dec 18 19:27:16 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Dec 18 19:27:16 2023 +0100" }, "message": "Merge changes Ic47879dd,Ic093aea6\n\n* changes:\n test(smc_fuzzing): add tsp testing\n refactor(smc_fuzzing): add multi cpu capability\n" }, { "commit": "e15bc803ed76eee496f95cba2df45aa292500090", "tree": "684b021e9625392ed31f006b559c1f103be4503c", "parents": [ "f0da2001c7779ca7bc23dce4bab9bd314cdcb0e6" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Mon Dec 18 15:21:13 2023 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Mon Dec 18 16:17:14 2023 +0000" }, "message": "feat(handoff): update register signature\n\nThe existing register signature was changed from 0x6ed0ff to account for\n0xff being a value that is regularly found in memory [1].\n\n[1] https://github.com/sjg20/firmware_handoff/commit/f70c184905607f6b1d074a5de9aa407a5d92344b\n\nChange-Id: Ib217f1b68df9e534fc61604c88eea4560ecb9dc2\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "d5b30b42f36d9fc80d0a26c238129a2488f6a068", "tree": "24919472b3b2c4ddff3ec5e8ea61aa0bbe633986", "parents": [ "f0da2001c7779ca7bc23dce4bab9bd314cdcb0e6" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Oct 25 22:38:45 2023 +0100" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Dec 18 12:32:37 2023 +0000" }, "message": "fix(realm): fix issue in rtt teardown\n\nUse IPA WIDTH to decide if adr is protected\nor unprotected. Do not treat ripas empty as unprotected adr\n\nChange-Id: Ia57a0ddb12a76e4eec9a1c03e9302d959dd0ac31\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "334217c012558149603f8909159a819ecaf71403", "tree": "7fa45077f184a0cfa9eb12a771e590ad046e2d92", "parents": [ "a276b20c477aab869c74f687484d480c4a289f0a" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Dec 18 10:28:53 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Dec 18 12:53:06 2023 +0100" }, "message": "test(realm): remove unwanted arg from realm API\n\nRemove unwanted arg plat_mem_pool_size\nfrom host_create_realm_payload and\nhost_create_activate_realm_payload API\n\nChange-Id: Id92d77d2ed8944c0e038cb62459247f0d17e516c\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "a276b20c477aab869c74f687484d480c4a289f0a", "tree": "e3166fc186f557e471e3207b6602d17540adfb80", "parents": [ "ac806965a1d44d1ef98919df8241a8d54141f7ca" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Dec 18 10:07:43 2023 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Dec 18 13:53:03 2023 +0200" }, "message": "test(realm): fix realm_printf string\n\nRemove extra Realm: string from realm printf\ncorrect the print format\n\nChange-Id: I1916cf5bda23aab2cdee59457872353c108148c7\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "c0f6e2227aeaa374375576d0c7b16ee56539affc", "tree": "f4eba151a5cdf561edb5f9f7e4812fa987d105f2", "parents": [ "11886e848b790408ba69d636d9b52cb7204f94f9", "941c99a298b8b09b94299d958fad1b74ef196ad9" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Dec 18 10:53:25 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Dec 18 10:53:25 2023 +0100" }, "message": "Merge changes I67c330c2,I2f4a83c3,If0d7d2e2\n\n* changes:\n test(realm): add new api to create and activate realm\n test(realm): testcase for multiple realms\n test(realm): add support for multiple realm\n" }, { "commit": "11886e848b790408ba69d636d9b52cb7204f94f9", "tree": "815591889af321b63ac12205027112535d0317da", "parents": [ "0386212b59003a4969acf26683f9d93774fa1031", "82389fbbe889a2accc543e4fc2a191faa90e6f74" ], "author": { "name": "Bipin Ravi", "email": "bipin.ravi@arm.com", "time": "Fri Dec 15 21:57:11 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Dec 15 21:57:11 2023 +0100" }, "message": "Merge \"refactor(smc_fuzzing): add new test function\"" }, { "commit": "941c99a298b8b09b94299d958fad1b74ef196ad9", "tree": "7b4a2916a30b148cc5ca2d52e33c18f1c252b174", "parents": [ "944016b3e7cd2f07e7e3e0db983fd08ba5b7553a" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Dec 15 02:10:55 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Dec 15 19:28:06 2023 +0100" }, "message": "test(realm): add new api to create and activate realm\n\n* Add new API to create realm payload and activate realm.\n host_create_activate_realm_payload().\n* Also add API to create realm without activate.\n host_create_realm_payload(). Host will need to call\n host_realm_activate() separately prior to entering.\n\nChange-Id: I67c330c2672a02438cbb9a99c6c1741d3eda3cc3\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "944016b3e7cd2f07e7e3e0db983fd08ba5b7553a", "tree": "819ddee820f873a79bacc9e12a43eb5452a4de9d", "parents": [ "e59296214e26da925521d927892544bcde009316" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Nov 21 11:30:35 2023 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Dec 15 20:27:56 2023 +0200" }, "message": "test(realm): testcase for multiple realms\n\nTestcase creates 2 realms with 1 rec each.\n\nChange-Id: I2f4a83c3cef3be0ce25d3b18521d9e04c5754c97\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "e59296214e26da925521d927892544bcde009316", "tree": "df11d07fbfaefe40d96c60bc7a2971c1afccf954", "parents": [ "0386212b59003a4969acf26683f9d93774fa1031" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Nov 21 10:50:22 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Dec 15 19:20:54 2023 +0100" }, "message": "test(realm): add support for multiple realm\n\nAdd support for creating multiple realm payloads\n* Layout change to reserve memory for two realm pools.\n* Change offset of shared memory region between host and realm.\n* Change API to get/set shared memory region for each realm\n\nChange-Id: If0d7d2e2697052387c2ddcc729ec3872fd5dd409\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "e4c9a93b7879222fc67eb2f17a5c11c6fa1a6af4", "tree": "780665397ff89d17bf7a81d35b2c2316e6529a83", "parents": [ "6f9e14a0e3a9e14051cf6235a49b06bae32823d9" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Wed Dec 13 14:58:08 2023 +0000" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Dec 14 17:31:16 2023 +0000" }, "message": "fix(realm_test): initialization of RIPAS is incorrectly done on TFTF\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I34872aabdaf1b71e4142480a058dfab80c2302a1\n" }, { "commit": "f5b46352dbafdbca62b2cf10b4410213c62612c8", "tree": "0e1da9979b9ab56f79cc44ec908e6d62308ae5fa", "parents": [ "c14e4ad11ab2430ac14fd0c5b572690b25061dae" ], "author": { "name": "mardyk01", "email": "mark.dykes@arm.com", "time": "Tue Oct 24 16:23:23 2023 -0500" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Dec 14 10:11:44 2023 -0600" }, "message": "test(smc_fuzzing): add tsp testing\n\nAdding TSP based SMC instructions to fuzzing infrastructure.\n\nChange-Id: Ic47879dd6294be5afe44a37da9a630cf635f920a\nSigned-off-by: mardyk01 \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "c14e4ad11ab2430ac14fd0c5b572690b25061dae", "tree": "d22daa83795234e02449eceed73b64023085b491", "parents": [ "82389fbbe889a2accc543e4fc2a191faa90e6f74" ], "author": { "name": "mardyk01", "email": "mark.dykes@arm.com", "time": "Wed Oct 11 16:50:19 2023 -0500" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Mon Dec 11 22:41:21 2023 -0600" }, "message": "refactor(smc_fuzzing): add multi cpu capability\n\nUsing the MULTI_CPU_SMC_FUZZER option in tftf config\nmultiple CPU\u0027s will be enabled to produce fuzzing SMC\ncalls for a given platform. They will all use the\nsame device tree file for random execution of the calls\n\nSigned-off-by: mardyk01 \u003cmark.dykes@arm.com\u003e\nChange-Id: Ic093aea69e577a1b678cf572149550881c0791b0\n" }, { "commit": "82389fbbe889a2accc543e4fc2a191faa90e6f74", "tree": "8ce896946d7d4084b5159c6bd41a977ce3ffb25a", "parents": [ "6d8721db1753e0b9fc4252308186d5eb152252a8" ], "author": { "name": "mardyk01", "email": "mark.dykes@arm.com", "time": "Mon Sep 25 16:34:56 2023 -0500" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Mon Dec 11 14:28:41 2023 -0600" }, "message": "refactor(smc_fuzzing): add new test function\n\nAdding the new runtestfunction for easier user introduction\nof SMC calls and also creating a new top level device tree file\nto encapsulate all SMC calls in one structure. This includes\nonly SDEI calls currently.\n\nSigned-off-by: mardyk01 \u003cmark.dykes@arm.com\u003e\nChange-Id: I4295de564a1114706aa43c373abb7578c68b7cfa\n" }, { "commit": "9cfccddc4dbbcee51d76e52ad664ecef498decfd", "tree": "e923f220ec07e80a6cdb7b1dbb6f297dba9ec030", "parents": [ "6ca83d8d47ce82d8d67376435a590d55e88e1fe4" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Mon Dec 11 18:09:15 2023 +0000" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Mon Dec 11 18:39:08 2023 +0000" }, "message": "fix(realm_test): host_realm_init_ipa_state() is called with wrong args\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: If5794562b7d3828f735f59f751024c36b7f0173a\n" }, { "commit": "ec06083913d491f2d37a133155d172af2f495a9f", "tree": "2287df31b878166ec0f4fe850b4087c1277f8203", "parents": [ "43a50c3b4c1d33be07cf77fb674f7060dc93f601" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Nov 21 00:44:47 2023 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Dec 11 13:38:30 2023 +0200" }, "message": "test(realm): change realm create and execute api\n\nChange realm creation and execution API\nin preparation for multiple realm support.\n* API host_create_realm_payload needs pointer to\n realm structure.\n* API initializes structure on success.\n* API host_enter_realm_execute needs pointer to initialized\n realm structure.\n* modified sleep testcase to create/destroy realm iteratively.\n\nChange-Id: I196166e30aa7e77b90603e270ca250e2390ba066\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "12cee415ae010d0258f238b1a51c1af117b2e0e5", "tree": "bde8da4fe898eeafcae708688b0dc2bcb390e148", "parents": [ "fa605fe479ef69ce71c4b065134c4d6137b715d0" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Mon Nov 20 11:51:23 2023 +0000" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Mon Dec 04 19:01:44 2023 +0000" }, "message": "fix(rme): return value of host_enter_realm_execute call\n\nA failing realm command might be reported as pass if the exit reason\nis RMI_EXIT_HOST_CALL. For RMI_EXIT_HOST_CALL exit reason, return true\nonly when host_call_result is TEST_RESULT_SUCCESS.\n\nThis change also fixes the expected RmiRecExit reason for PMU tests.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I37789a2c2941eec83fe1ebc54a0107192fd2fc11\n" }, { "commit": "fa605fe479ef69ce71c4b065134c4d6137b715d0", "tree": "4c7eb90de20d5ff165fab27ca4c97d599d7ab31c", "parents": [ "53ff0ad786ce0a6218dc3c275b5b50f2e246b027", "75b4221efda572f56a44b94cad993ed97d11ea3d" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Dec 04 18:17:38 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Dec 04 18:17:38 2023 +0100" }, "message": "Merge changes from topic \"rmm_sme\"\n\n* changes:\n test(rme): use sve hint bit feature\n feat(smc): add SMCCCv1.3 sve hint bit support in tftf framework\n fix(cactus): replace tftf_smc with ffa_service_call\n" }, { "commit": "d0eff2aa0acf17013d675daca17524d340ee3fae", "tree": "dcd4e83b79629e954d6b40896eac541b765d25b1", "parents": [ "42b99719d5dde58bdde07712bcb70a20d87f9067" ], "author": { "name": "Kathleen Capella", "email": "kathleen.capella@arm.com", "time": "Fri Sep 29 18:21:51 2023 -0400" }, "committer": { "name": "Kathleen Capella", "email": "kathleen.capella@arm.com", "time": "Thu Nov 30 17:34:52 2023 +0100" }, "message": "feat(ff-a): update FF-A version to v1.2\n\nBump the required FF-A version in framework and manifests to v1.2 as\nupstream feature development goes.\n\nSigned-off-by: Kathleen Capella \u003ckathleen.capella@arm.com\u003e\nChange-Id: Id00cdbd94466570a962d9c6956fda793758ee5d9\n" }, { "commit": "75b4221efda572f56a44b94cad993ed97d11ea3d", "tree": "f6c850cbec31ed127b9ef3ef222f53ddf10d785d", "parents": [ "417edcad3eb332eca5d7ed70de51cac489a2dca4" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Sep 05 18:24:12 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Thu Nov 30 16:27:25 2023 +0000" }, "message": "test(rme): use sve hint bit feature\n\nWhile testing SVE registers randomly set SVE hint bit. The SVE helper\nroutines to compare the SVE registers will check for either of these\nconditions:\n- The vector registers must match or\n- The vector registers must be set to zero. Except for Z vector, the\n lower 128 bits must be preserved.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Ied9408a5850c95d15e99bf24ca82a9d52688047f\n" }, { "commit": "c6a3abf980d69e59c08a66a0f4743958c1de6092", "tree": "bee421ee4ad87734d661b3dcf6cb36f61e0d92c0", "parents": [ "092189660673eeac7de4514035033240fde95b42" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Oct 25 16:47:23 2023 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Nov 02 21:36:07 2023 -0500" }, "message": "fix(interrupts): check support for ESPI before testing it\n\nIt is possible for extended range interrupts to be enabled by software\nbut the underlying hardware (GIC) may not support it. In such,\nscenarios check if the support exists before exercising the\nESPI functionality.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: Ibdf18be8403539c0ae9204309adc8a81dd0382d3\n" }, { "commit": "87ce0a2f16c477e209a19a5d0458e4bf9518933e", "tree": "8f9c6a3e27ea23dc14061bd635c917e0519ab80a", "parents": [ "f3aa070f69debb2aa9b6480cbf4c2d67b5a4f68c" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Jun 16 16:53:16 2023 +0100" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Nov 02 10:40:28 2023 +0100" }, "message": "feat(ras): test to verify SErros synchronized at EL3 boundry\n\nTests to verify SErrors which gets triggered as part of error\nsynchronization at EL3 entry.\nIn FFH mode, EL3 does nested exception handling while in KFH it\nreflectes it back to TF-A Tests.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I5a980ed49ee47ea2f0d5685ba8378d48393ad157\n" }, { "commit": "11320699cb58d75e5821d0938403efabaffda21d", "tree": "4d127ea733e9fb218803c3d448543b06f78ea4a0", "parents": [ "1a7a9832a1725168ba0476017ede051e375b8ed5" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Thu Sep 07 17:05:48 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Wed Nov 01 11:50:59 2023 +0000" }, "message": "test(rme): add SME registers to SIMD state test\n\nRandomly verify SVE registers or SME registers if the system supports\nboth SVE and SME.\n\nWithin SME, randomly select below configs\n- enable/disable streaming mode\n- enable/disable FA64\n- select random streaming vector length\n\nWith this change \u0027host_and_realm_check_simd\u0027 test will support below\nconfigs:\n* SVE only\n* SME only\n* with SVE and SME\n* without SVE and SME\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I2895135eeecd3f3e895de3ed7aa2864fb35fd4b1\n" }, { "commit": "1b327c2f7cf7e20172a79fa370d71efc0e84770d", "tree": "580dc95a4ed5b9394be66040dd79048e34e2f648", "parents": [ "1768e59c3a6ac8d727ac012719b4b09947c8400d" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jun 06 15:39:47 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Oct 31 13:56:57 2023 +0000" }, "message": "test(rme): intermittently switch to Realm while NS doing SSVE ops\n\nInterleave NS Streaming SVE operations with Realm SVE operations and\ncheck whether Streaming SVE vectors are not affected.\n\nThis commit extends the existing SVE test case to work on both Normal\nand Streaming SVE mode.\n\nThis testcase runs for SVE+SME config and for SME only config.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I70fe20f980866cbdd5dadf85804a9e5738227846\n" }, { "commit": "1768e59c3a6ac8d727ac012719b4b09947c8400d", "tree": "cc6ad04618bb60fb861bf3e7e4da2538c1a5cf42", "parents": [ "5b68e20b2a0c9ac70caa2dd833d48f5fd49aa581" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue May 23 13:28:38 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Oct 31 13:56:54 2023 +0000" }, "message": "feat(rme): add tests to check NS SME ID registers and configurations\n\nThese tests checks the functionality of RMM for NS SME support.\n- Create Realm and test ID registers specific to SME\n- Check if Realm gets undefined abort when it accesses SME\n- Check whether RMM preserves NS SMCR_EL2 register\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Ia8ffd0188297a74c095dbadfb389add50c548e10\n" }, { "commit": "5b68e20b2a0c9ac70caa2dd833d48f5fd49aa581", "tree": "3e0552b2dae1f333abe34bddd7a4ea63c40f985f", "parents": [ "47b702c49a622e895d70104d78a20bb979dae229" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jun 06 16:31:19 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Oct 31 13:56:17 2023 +0000" }, "message": "feat(sme): add sme helper routines and add streaming sve support\n\nThis patch adds a few helper routines to set the Streaming SVE vector\nlength (SVL) in the SMCR_EL2 register, to enable/disable FEAT_SME_FA64\nand to get CPU\u0027s Streaming SVE mode status.\n\nThis patch also makes SVE compare routines compatible for both normal\nSVE and streaming SVE mode.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I7294bb17a85de395a321e99241704066662c90e8\n" }, { "commit": "47b702c49a622e895d70104d78a20bb979dae229", "tree": "0d8eb64935c78a960998a4163c996f418c0fd96b", "parents": [ "92f1868013792ac13497d1045078b7e8a12d4f02" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jun 06 13:31:46 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Oct 31 13:56:17 2023 +0000" }, "message": "fix(sme): use rdsvl instead of rdvl\n\nUse rdsvl instruction to get Streaming SVE vector length instead of rdvl\ninstruction. When the CPU is in Streaming SVE mode both rdvl and rdsvl\ninstruction returns the same value but that is not true when the CPU is\nin Normal SVE mode. So it\u0027s preferred to use rdsvl to get SVL.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Ieb6226f4fc275ee8a81eb359af465c26e307bc75\n" }, { "commit": "92f1868013792ac13497d1045078b7e8a12d4f02", "tree": "c94edb176be497ef790dfeaf98bb7b1e49cef824", "parents": [ "3dc2d746aa4bc44174a9981fa082c1473d0006a4" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Sat Sep 02 01:41:28 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Oct 31 13:56:17 2023 +0000" }, "message": "fix(sme): enable SME/SME2 during arch init\n\nThis change enables SME/SME2 for nonsecure use at EL2 for TFTF cases\nduring arch_setup. This removes dependency on testcases to explicitly\ncall sme_enable or sme2_enable to access SME or SME2 functionality.\n\nThis change also adds CPTR_EL2 register in suspend context. CPTR_EL2\nregister is saved/restored in CPU suspend entry/exit path.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I2c99fd49c48c1a9ff2110747714db858a78d3a32\n" }, { "commit": "3dc2d746aa4bc44174a9981fa082c1473d0006a4", "tree": "e62c636478dc937e944d7f236837096b535d3551", "parents": [ "ab2fe6b01abef3c4b17ffb2c6ee4759f6801e095", "40de8ec10f4d9925c24d2b9dd22822e0c8fd4224" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Oct 31 12:08:26 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Oct 31 12:08:26 2023 +0100" }, "message": "Merge changes from topic \"rmm-eac5\"\n\n* changes:\n feat(rmm-eac5): update RSI_VERSION, RMI_VERSION\n feat(rmm) : add api for rec force exit\n test(rmm-eac4): add testcase for CPU_ON denied\n" } ], "next": "40de8ec10f4d9925c24d2b9dd22822e0c8fd4224" }