)]}' { "log": [ { "commit": "d31b6b55e12ed5aa334805000864eeeaca857ddb", "tree": "3252d5f674e87f76df326d5dd27ed912d1284192", "parents": [ "3c96c4b7a1e650aaf6a13e91d1beecce00a8233a" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Mon Dec 09 13:32:00 2019 +0000" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Mon Dec 16 13:10:37 2019 +0000" }, "message": "Aligning block_buffer to uint32_t\n\nblock_buffer will eventually be used by the flash_write_buffer() implementation\nof the NOR driver for the Juno board. That implementation requires the buffer\npassed to it to be 32bit aligned, which might not be enforced depending on\nthe compiler optimizations.\nThis patch will enforce that alignment on all cases.\n\nChange-Id: I84d22f6b796d5d6c93d3c69dd24c7ebe01103691\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\n" }, { "commit": "3c96c4b7a1e650aaf6a13e91d1beecce00a8233a", "tree": "10aa54143d3dd355bbcaa39f7dcf662679bebe19", "parents": [ "58c5d7067db9102e0c754d8bfb7d76622a802d4e", "2198e9a1fb8c48c68dc9aa5180ef6ceaca135c29" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Dec 13 13:40:01 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Dec 13 13:40:01 2019 +0000" }, "message": "Merge \"TFTF: Add missing D-cache invalidation\"" }, { "commit": "58c5d7067db9102e0c754d8bfb7d76622a802d4e", "tree": "e641aaf6341cbe8b9542d8d42c89367ae3aa7b01", "parents": [ "fc0b20764ec1d613ae41f7985485d8be81c5e526", "537b358321b850bfca59c5f8f5941a1e70d9341d" ], "author": { "name": "György Szing", "email": "gyorgy.szing@arm.com", "time": "Fri Dec 13 12:26:03 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Dec 13 12:26:03 2019 +0000" }, "message": "Merge \"make: Fix parallel builds\"" }, { "commit": "2198e9a1fb8c48c68dc9aa5180ef6ceaca135c29", "tree": "571c838e8334bbff2970330c7db0491fb7478c12", "parents": [ "fc0b20764ec1d613ae41f7985485d8be81c5e526" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Dec 12 14:14:55 2019 +0000" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Dec 12 14:16:13 2019 +0000" }, "message": "TFTF: Add missing D-cache invalidation\n\nThis patch adds missing D-cache invalidation of RW memory\nin tftf_entrypoint to safeguard against possible corruption\nof this memory by dirty cache lines in a system cache as\na result of use by an earlier boot loader stage.\nRef. GENFW-3455\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I595344c307502a6c24c2e62d3e3f2f9d7a810dfa\n" }, { "commit": "fc0b20764ec1d613ae41f7985485d8be81c5e526", "tree": "98dcc0e495790490a48f37fb5e5159383e245b15", "parents": [ "caaa306fe24a503c6fa0eb77b2f9ae718d7335d7", "1465d25ce61a9180dd673ed5920aa958e54b525a" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Dec 12 11:44:09 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Dec 12 11:44:09 2019 +0000" }, "message": "Merge \"Skip PMU tests on SGI-575\"" }, { "commit": "1465d25ce61a9180dd673ed5920aa958e54b525a", "tree": "98dcc0e495790490a48f37fb5e5159383e245b15", "parents": [ "caaa306fe24a503c6fa0eb77b2f9ae718d7335d7" ], "author": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Tue Dec 10 10:23:17 2019 +0000" }, "committer": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Thu Dec 12 09:35:35 2019 +0000" }, "message": "Skip PMU tests on SGI-575\n\nThe PMU tests currently fail on SGI-575 platform. The root cause is unknown at\nthis point and some further investigation is needed.\nSkip these tests in the meantime.\n\nSigned-off-by: Petre-Ionut Tudor \u003cpetre-ionut.tudor@arm.com\u003e\nChange-Id: Ia43d1ccef8394e2ac8f08c28f32aa68cf045781a\n" }, { "commit": "caaa306fe24a503c6fa0eb77b2f9ae718d7335d7", "tree": "daa05562daec46c6cb3d1406330636ea3d138033", "parents": [ "640af3a32b645e1b54003081d93739a6d05527dc", "c783c0b82c4803fd666c3e02c1250d8aeca9e378" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Dec 05 15:29:16 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Dec 05 15:29:16 2019 +0000" }, "message": "Merge \"Support for extended register usage in SMCCC v1.2 spec\"" }, { "commit": "537b358321b850bfca59c5f8f5941a1e70d9341d", "tree": "987a079bd37de7624f90edb441b48aa5a1eb167c", "parents": [ "640af3a32b645e1b54003081d93739a6d05527dc" ], "author": { "name": "Bence Szépkúti", "email": "bence.szepkuti@arm.com", "time": "Fri Nov 29 18:23:56 2019 +0100" }, "committer": { "name": "Bence Szépkúti", "email": "bence.szepkuti@arm.com", "time": "Fri Nov 29 18:23:56 2019 +0100" }, "message": "make: Fix parallel builds\n\nParallel builds would fail while generating the dependency file of the\nfirst source file that included tests_list.h due to it missing.\nIn-order builds only worked, because a rule that specified tests_list.c\nas a prerequisite happened to get executed first.\n\nThis patch introduces tests_list.h as an order-only dependency of all\nrules that generate dependency files. This is necessary because we can\u0027t\nknow which files actually depend on it until the dependency files have\nbeen generated.\n\nThis forces the autogenerated files to be generated before any other\nfiles are compiled, but does not cause unrelated files to recompile if\nthey are modified.\n\nSigned-off-by: Bence Szépkúti \u003cbence.szepkuti@arm.com\u003e\nChange-Id: I21f0b98052a884a853935ea35a2898ff90245a49\n" }, { "commit": "640af3a32b645e1b54003081d93739a6d05527dc", "tree": "92d207902d36a0cb6991cd8f0e148c113c4fe503", "parents": [ "535f1be59d83351423aa6e712f8fcf49a7116450", "0f305470237c19a73979d558e740fb90f8449a59" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Nov 29 11:59:13 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Nov 29 11:59:13 2019 +0000" }, "message": "Merge \"TFTF: Add support for FVP platforms with SMT capabilities\"" }, { "commit": "535f1be59d83351423aa6e712f8fcf49a7116450", "tree": "71d766a25093b4e8bb82605c3fafc2bfc20d571b", "parents": [ "6c81de700adcf68a9db9a3e6ae2c747d434d3dd9", "9fec7b280cff4cbd6b7556510829e26e02c5cce7" ], "author": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Thu Nov 28 10:36:42 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Nov 28 10:36:42 2019 +0000" }, "message": "Merge changes from topic \"sphinx-doc\"\n\n* changes:\n doc: Move license file to docs folder\n doc: Reformat RST content for Sphinx rendering\n" }, { "commit": "6c81de700adcf68a9db9a3e6ae2c747d434d3dd9", "tree": "42f2cd4e5c79abf28278d2d0bdcdbc6cc1eff959", "parents": [ "a78c8203e8ce7b901c13ae9fb25d8863c1bcd5bc", "717bac4dca0bf204329a8cb19f52c8e30bb58502" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Nov 27 11:27:13 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Nov 27 11:27:13 2019 +0000" }, "message": "Merge \"doc: Add basic Sphinx configuration and Makefile\"" }, { "commit": "c783c0b82c4803fd666c3e02c1250d8aeca9e378", "tree": "97fe58cabb4ee3ab15363d1663f2fca69fe45b72", "parents": [ "a78c8203e8ce7b901c13ae9fb25d8863c1bcd5bc" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Nov 14 23:52:37 2019 -0600" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Nov 21 19:45:07 2019 -0600" }, "message": "Support for extended register usage in SMCCC v1.2 spec\n\nThe new version of SMC Calling Convention spec makes X0-X7/W0-W7/R0-R7\nregisters available for returning results and X1-X7/W1-W7/R1-R7 for\npassing arguments during SMC calls.\n\nThis patch makes necessary changes to support the update in register\nusage and also enhances existing test case to check for expected\nbehavior across SMC call.\n\nLink to the SMCCC spec:\nhttps://developer.arm.com/docs/den0028/c\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I9e5a3e4f9de388cb9a7426b0eae1c0fa1229292a\n" }, { "commit": "9fec7b280cff4cbd6b7556510829e26e02c5cce7", "tree": "71d766a25093b4e8bb82605c3fafc2bfc20d571b", "parents": [ "5c92895dffcaa0a0ca7a2f171eb762de274598d8" ], "author": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Mon Nov 11 10:46:54 2019 +0000" }, "committer": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Tue Nov 19 13:04:41 2019 +0000" }, "message": "doc: Move license file to docs folder\n\nAs in TF-A, the license file can be included in the rendered\noutput by moving it into the /docs folder.\n\nChange-Id: I0a7b9c410f6567c260cb4701148955e1273e8285\nSigned-off-by: Paul Beesley \u003cpaul.beesley@arm.com\u003e\n" }, { "commit": "5c92895dffcaa0a0ca7a2f171eb762de274598d8", "tree": "473264bf87896f653df5817e7803da14746cc0aa", "parents": [ "717bac4dca0bf204329a8cb19f52c8e30bb58502" ], "author": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Thu Oct 24 11:57:00 2019 +0000" }, "committer": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Tue Nov 19 13:03:46 2019 +0000" }, "message": "doc: Reformat RST content for Sphinx rendering\n\nSome existing RST files contain formatting errors that will cause\nSphinx to generate warnings.\n\nChange-Id: I714136d1ea5b645eaa55dd304fb56d5b5fd18ee1\nSigned-off-by: Paul Beesley \u003cpaul.beesley@arm.com\u003e\n" }, { "commit": "717bac4dca0bf204329a8cb19f52c8e30bb58502", "tree": "42f2cd4e5c79abf28278d2d0bdcdbc6cc1eff959", "parents": [ "a78c8203e8ce7b901c13ae9fb25d8863c1bcd5bc" ], "author": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Tue Oct 22 11:08:15 2019 +0000" }, "committer": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Tue Nov 19 13:02:15 2019 +0000" }, "message": "doc: Add basic Sphinx configuration and Makefile\n\nAdding the same type of Sphinx config that is used for the main\nTF-A repo. Contains the config itself, a Makefile to build the\ndocs directly under the /docs directory (not tied to top-level\nMakefile by design), an index page and the TF.org logo as used\nin TF-A.\n\nChange-Id: Ifd5c83533fbad457b448a52f42a2f12303887f4a\nSigned-off-by: Paul Beesley \u003cpaul.beesley@arm.com\u003e\n" }, { "commit": "a78c8203e8ce7b901c13ae9fb25d8863c1bcd5bc", "tree": "020a08e5301ef72cbad7a68b00304921083b2911", "parents": [ "891a3dd13b63ebf3a290a13f6c0026eb192da953", "2cb7c521285bc1d0f4d7c6841a6ad9b0823d19e0" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Nov 13 07:53:48 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Nov 13 07:53:48 2019 +0000" }, "message": "Merge \"`requested_irq_received` must be initialized for all tests\"" }, { "commit": "0f305470237c19a73979d558e740fb90f8449a59", "tree": "6aeedf76e1b3567e559b8ca88d84b1c0f0d013bb", "parents": [ "2957ff7660eb3b14ed1ee7ade14218332410e3c0" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Tue Oct 29 14:06:54 2019 +0000" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Nov 07 10:30:09 2019 +0000" }, "message": "TFTF: Add support for FVP platforms with SMT capabilities\n\nThis patch adds support for Simultaneously MultiThreaded (SMT)\ncores on FVP models. Number of threads per CPU is passed in\nFVP_MAX_PE_PER_CPU build parameter which can be set either to\n1 or 2. This option defaults to 1.\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: Ib0e2afe429e8f24b8a74ad6ee98750ed1ac121fb\n" }, { "commit": "891a3dd13b63ebf3a290a13f6c0026eb192da953", "tree": "3e9e306ba52936ca52fa73454eaa133335c5ba46", "parents": [ "2957ff7660eb3b14ed1ee7ade14218332410e3c0", "f1a45f767ad6dc31ebde044884f157a1deddbf3c" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Nov 05 14:08:38 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Nov 05 14:08:38 2019 +0000" }, "message": "Merge \"Aarch32: Secure PMU counter leak tests\"" }, { "commit": "f1a45f767ad6dc31ebde044884f157a1deddbf3c", "tree": "3e9e306ba52936ca52fa73454eaa133335c5ba46", "parents": [ "2957ff7660eb3b14ed1ee7ade14218332410e3c0" ], "author": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Tue Oct 08 16:51:45 2019 +0100" }, "committer": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Wed Oct 30 15:10:59 2019 +0000" }, "message": "Aarch32: Secure PMU counter leak tests\n\nThis patch adds Aarch32 support to the PMU counter leak tests.\n\nThese tests attempt to profile the Secure world by configuring\nEL0 system registers such that the PMU is told to increment\ncounters at Secure EL1, Secure EL2 and EL3. The tests fail if\nuseful information was leaked.\n\nThe Secure world defends against this type of attack with a\ncombination of configuring EL3 system registers and saving/restoring\nEL0 PMU registers. Exactly which defense is employed depends on the\narchitecture version.\n\nSigned-off-by: Petre-Ionut Tudor \u003cpetre-ionut.tudor@arm.com\u003e\nChange-Id: I2dcc9e786a18d9859ac089f8008b060d277bee3a\n" }, { "commit": "2957ff7660eb3b14ed1ee7ade14218332410e3c0", "tree": "0965f9ba83b7e435e7d1cdcffd4d570b909b2ad8", "parents": [ "1a18c4aa386cdcb331d7db6b0e0cb40894505927", "44ca9a955b433aa1b4baf19bc77b0758b4a172f9" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 22 14:58:56 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Oct 22 14:58:56 2019 +0000" }, "message": "Merge \"Incrementing the minor version to reflect upcoming v2.2 release\"" }, { "commit": "1a18c4aa386cdcb331d7db6b0e0cb40894505927", "tree": "80096321569c78d9ae80bdb711f5b4294b31c4d2", "parents": [ "6f97b12dac69d3a8ee51fed7af1c32ae33f987c8", "8108c9a3a7e627a7464affb5fdb169202c3012b1" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Oct 21 08:26:49 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Oct 21 08:26:49 2019 +0000" }, "message": "Merge \"Extend SYSTEM_OFF test case\"" }, { "commit": "8108c9a3a7e627a7464affb5fdb169202c3012b1", "tree": "5ef1ae7c9c8e2253744ed436cf5814206550523c", "parents": [ "0012dbc2a841abeff25be8be1113f19073ee4d2c" ], "author": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Fri Sep 06 21:48:56 2019 +0300" }, "committer": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Fri Oct 18 11:52:48 2019 -0500" }, "message": "Extend SYSTEM_OFF test case\n\nExtend SYSTEM_OFF to involve more than just the lead CPU.\n\nThe typical way to use SYSTEM_OFF is to use calls to CPU_OFF on\nall online cores except for the last one, which instead uses SYSTEM_OFF.\n\ntest_system_off_cpu_other_than_lead() case is added to turn on any\nrandom CPU other then lead CPU and perform SYSTEM_OFF from the CPU which\nwas turned ON.\n\nSigned-off-by: Deepika Bhavnani \u003cdeepika.bhavnani@arm.com\u003e\nChange-Id: Ice62d0e7ef0db63ccb030e8dc1a83d9bd55e70f2\n" }, { "commit": "44ca9a955b433aa1b4baf19bc77b0758b4a172f9", "tree": "dd9db8f085c735212f12315e97d9ee0af2cbd82b", "parents": [ "6f97b12dac69d3a8ee51fed7af1c32ae33f987c8" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Oct 15 11:13:41 2019 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Oct 15 20:32:38 2019 -0500" }, "message": "Incrementing the minor version to reflect upcoming v2.2 release\n\nAlso updated the readme.rst file with changes in v2.2 release\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I93e21473f4048867c29b6e0d9e854d07d3f71782\n" }, { "commit": "6f97b12dac69d3a8ee51fed7af1c32ae33f987c8", "tree": "acc5c0e3cd789017df4e44a18a449c8b0d9305d6", "parents": [ "5b9cc97bbeda000d2f72728320f9dc96aeb6fa46", "85926bc3d544111d412472e24cdd86668175c831" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 15 13:56:00 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Oct 15 13:56:00 2019 +0000" }, "message": "Merge \"Bugfix for PMU leakage test\"" }, { "commit": "5b9cc97bbeda000d2f72728320f9dc96aeb6fa46", "tree": "46a54dcac67d91be5be86602615593adc41d46ad", "parents": [ "6f50bd61931ad36152b2a437622593dd11633eb1", "74ccffa04103c730ae46ded11ac763554c42c9d6" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 15 07:30:03 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Oct 15 07:30:03 2019 +0000" }, "message": "Merge \"Update change log for v2.2 Release\"" }, { "commit": "2cb7c521285bc1d0f4d7c6841a6ad9b0823d19e0", "tree": "108656c2ca2165c93c802be3ef98cac2b18106eb", "parents": [ "6f50bd61931ad36152b2a437622593dd11633eb1" ], "author": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Mon Oct 14 12:48:04 2019 -0500" }, "committer": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Mon Oct 14 12:48:04 2019 -0500" }, "message": "`requested_irq_received` must be initialized for all tests\n\nrequested_irq_received is used to confirm if the CPU is\nwoken by IRQ, it is set as part of `requested_irq_handler`.\nDefault it should be cleared for all CPU\u0027s under test,\nun-intialized value resulted in random failure based on\nprevious state of variable.\n\nSigned-off-by: Deepika Bhavnani \u003cdeepika.bhavnani@arm.com\u003e\nChange-Id: Ia3af99a11f3297c2e8fc1ef52e7f18107e2fdfc8\n" }, { "commit": "85926bc3d544111d412472e24cdd86668175c831", "tree": "f6b8ef0e128d0b7a211b601855843d7d5408284d", "parents": [ "6f50bd61931ad36152b2a437622593dd11633eb1" ], "author": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Wed Oct 09 10:56:39 2019 +0100" }, "committer": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Thu Oct 10 10:06:09 2019 +0100" }, "message": "Bugfix for PMU leakage test\n\nThis patch fixes a bug where integer underflow causes the tests\nto wrongly fail.\n\nSince event counts are register values, they are unsigned in TFTF.\nWhen the event count is less on the SMC being profiled than the\nbaseline SMC event count, subtraction causes an underflow which\ngoes beyond the allowed deviation and makes the test fail.\n\nSigned-off-by: Petre-Ionut Tudor \u003cpetre-ionut.tudor@arm.com\u003e\nChange-Id: I58bc18ca4afd28b6d1b1354a9af9f70d616d2c32\n" }, { "commit": "74ccffa04103c730ae46ded11ac763554c42c9d6", "tree": "46a54dcac67d91be5be86602615593adc41d46ad", "parents": [ "6f50bd61931ad36152b2a437622593dd11633eb1" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Oct 10 02:30:40 2019 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Oct 10 03:43:27 2019 -0500" }, "message": "Update change log for v2.2 Release\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I15f881d89bcb165ab41503fdcbcc1a1abcbb36c5\n" }, { "commit": "6f50bd61931ad36152b2a437622593dd11633eb1", "tree": "1523a86b02b5349c08d546b6f3b53d47453f303b", "parents": [ "d5a9e7a17f687edd620cad1bfb702781de3cf92e", "fb003380a01843d0de71ba3374394a798289c64f" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 08 19:16:32 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Oct 08 19:16:32 2019 +0000" }, "message": "Merge \"TFTF: ARMv8.3-PAuth test code enhancements\"" }, { "commit": "fb003380a01843d0de71ba3374394a798289c64f", "tree": "47e9fd3c2ba55dea7e2488e68b11534e865464c6", "parents": [ "1ca3102141319bd514c296ddc256f92e321780a2" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Fri Oct 04 16:13:47 2019 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Tue Oct 08 16:15:59 2019 +0100" }, "message": "TFTF: ARMv8.3-PAuth test code enhancements\n\nThis patch provides the following feature and makes\nmodification listed below:\n- ARMv8.3-PAuth tests now check for all keys being in use\n (e.g. APIAKey when the test suite is built with\n `ENABLE_PAUTH\u003d1` option) and program new key values otherwise.\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: Ifa4a288274822029da585073563c68a1434f5de7\n" }, { "commit": "d5a9e7a17f687edd620cad1bfb702781de3cf92e", "tree": "05ffa6439c4713d68a8df2d4671139c531a7c751", "parents": [ "1ca3102141319bd514c296ddc256f92e321780a2", "277fb7628c270c8a891c24dea80350f9c935d4c6" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 08 11:46:53 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Oct 08 11:46:53 2019 +0000" }, "message": "Merge \"Add tests for MTE support\"" }, { "commit": "277fb7628c270c8a891c24dea80350f9c935d4c6", "tree": "05ffa6439c4713d68a8df2d4671139c531a7c751", "parents": [ "1ca3102141319bd514c296ddc256f92e321780a2" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 08 12:10:45 2019 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 08 12:23:38 2019 +0200" }, "message": "Add tests for MTE support\n\nTF-A now has support for the new Memory Tagging Extension in ARMv8.5,\nsee commit 91624b7fed52 (\"Merge changes from topic \"jc/mte_enable\"\ninto integration\").\n\nThis patch creates and enables tests to ensure that the extension is\nbeing properly enabled and that no undesired leakages occur.\n\nChange-Id: I7708fb23a12e2f35a97533f296aaa53db776ddd2\nSigned-off-by: Justin Chadwell \u003cjustin.chadwell@arm.com\u003e\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "1ca3102141319bd514c296ddc256f92e321780a2", "tree": "24f574d395c7abe26334c9b6dc25c7d7dfddfe92", "parents": [ "7d3054a7a194a43546b65b7c5d814b8212e2e01e", "807c61553fde97d41d29713b7e0159536f3ab680" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Oct 04 14:56:26 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Oct 04 14:56:26 2019 +0000" }, "message": "Merge \"Added SYSTEM_RESET test case\"" }, { "commit": "7d3054a7a194a43546b65b7c5d814b8212e2e01e", "tree": "4d9056c3d3cc86fb248ca312c6a8b75b7cd039fb", "parents": [ "7edf1a5ef3153f761c094c035da3eb10501b7247", "719714f1895399e6d64049bed3b03c2597d95402" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Oct 04 14:15:59 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Oct 04 14:15:59 2019 +0000" }, "message": "Merge \"TF-A Tests: Enable PAuth on warm boot path\"" }, { "commit": "719714f1895399e6d64049bed3b03c2597d95402", "tree": "eb40c8e9ffd2dae7a99f42a8a72254c6152a85f3", "parents": [ "e73248e004d971adb6259000d463c929f756a345" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Oct 03 10:57:53 2019 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Fri Oct 04 14:20:21 2019 +0100" }, "message": "TF-A Tests: Enable PAuth on warm boot path\n\nThis patch provides the following features and makes\nmodifications listed below:\n- `plat_init_apiakey()` function is replaced with `init_apkey()`\n which returns 128-bit value and uses Generic timer physical counter\n value to increase the randomness of the generated key.\n The new function can be used for generation of all ARMv8.3-PAuth keys.\n- Source file `pauth.c` moved from `plat/common/aarch64`\n to `lib/extensions/pauth/aarch64` folder which contains PAuth specific\n code.\n- Individual APIAKey key generation for each CPU on every warm boot.\n- Per-CPU storage of APIAKey added in `tftf_suspend_context` structure.\n- APIAKey key is saved/restored in arch context on entry/exit from\n suspended state.\n- Added `pauth_init_enable()` function which generates, programs\n and enables APIAKey in EL1/EL2.\n- Changes in documentation related to ARMv8.3-PAuth support.\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I964b8f964bb541cbb0b2f772cb0b07aed055fe36\n" }, { "commit": "7edf1a5ef3153f761c094c035da3eb10501b7247", "tree": "49fc71545c6e941eebdeb6d5601884a87a7f944a", "parents": [ "e73248e004d971adb6259000d463c929f756a345", "f68ebdb9b45cc7a58f816f153f5e626c898dc0cf" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Oct 04 10:21:36 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Oct 04 10:21:36 2019 +0000" }, "message": "Merge \"Try to leak counter values from secure world.\"" }, { "commit": "f68ebdb9b45cc7a58f816f153f5e626c898dc0cf", "tree": "8eb48a5843eb4acfa86c3066173aaa2b0f898d4b", "parents": [ "0012dbc2a841abeff25be8be1113f19073ee4d2c" ], "author": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Wed Sep 18 16:13:00 2019 +0100" }, "committer": { "name": "Petre-Ionut Tudor", "email": "petre-ionut.tudor@arm.com", "time": "Fri Oct 04 09:35:00 2019 +0100" }, "message": "Try to leak counter values from secure world.\n\nThis patch introduces a series of tests that try to leak PMU counter values\nfrom EL3 and S_EL1.\n\nPMU events used:\n\t- CPU cycles via PMU counter PMCCNTR_EL0\n\t- Retired writes to PC via PMU counter PMEVCNTR0_EL0\n\nThis AARCH64-specific patch is for security fix:\nhttps://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/1789\n\nThe AARCH32 versions of these tests will be in a future patch.\n\nSigned-off-by: Petre-Ionut Tudor \u003cpetre-ionut.tudor@arm.com\u003e\nChange-Id: Ib27948edadde30272e59a9ab208543703fa078bd\n" }, { "commit": "e73248e004d971adb6259000d463c929f756a345", "tree": "5a9e54f115fc3ae26b72016689a695fe695ddffa", "parents": [ "0012dbc2a841abeff25be8be1113f19073ee4d2c", "65c4653fb16e46d1ace12c33cbd9d2b4abd9e84b" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Oct 03 08:08:13 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Oct 03 08:08:13 2019 +0000" }, "message": "Merge \"TF-A Test Framework: Rename `ptrauth` to `pauth`\"" }, { "commit": "807c61553fde97d41d29713b7e0159536f3ab680", "tree": "ca02366b01ff30a9c6322a94645b7da43626b602", "parents": [ "0012dbc2a841abeff25be8be1113f19073ee4d2c" ], "author": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Tue Sep 10 23:24:36 2019 +0300" }, "committer": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Tue Oct 01 18:18:55 2019 +0300" }, "message": "Added SYSTEM_RESET test case\n\nSigned-off-by: Deepika Bhavnani \u003cdeepika.bhavnani@arm.com\u003e\nChange-Id: Ie946e83d4365679d6daa1d3b25142a9380cffe2f\n" }, { "commit": "65c4653fb16e46d1ace12c33cbd9d2b4abd9e84b", "tree": "5a9e54f115fc3ae26b72016689a695fe695ddffa", "parents": [ "0012dbc2a841abeff25be8be1113f19073ee4d2c" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Mon Sep 30 11:43:23 2019 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Mon Sep 30 11:43:23 2019 +0100" }, "message": "TF-A Test Framework: Rename `ptrauth` to `pauth`\n\nThis patch renames folder and source file names according to\nmatch with TF-A naming:\n- `ptrauth` folder in `tftf\\tests\\extensions\u0027 renamed to `pauth`,\n- `test_ptrauth.c` source file to `test_pauth.c`\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: Ida47e175e158e77e33270ee93ba6b3104eb0b5db\n" }, { "commit": "0012dbc2a841abeff25be8be1113f19073ee4d2c", "tree": "7ea4030213ff226769f46328b29717651d8b81ea", "parents": [ "f19b16dba6d867b71cd68bbc1b2f086b14be978c", "2129608e9ab970909c924a934a93a501099ab3bc" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Sep 30 06:47:17 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Sep 30 06:47:17 2019 +0000" }, "message": "Merge \"Separate shutdown and stats after shutdown tests\"" }, { "commit": "f19b16dba6d867b71cd68bbc1b2f086b14be978c", "tree": "6f8b8038f5ed040e7274b462df191cc77e89ce90", "parents": [ "cdba6c95f558304f77b062d58c6c398b3655ef93", "1c97f9418db19942656072435955874c83027124" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri Sep 27 15:46:41 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Sep 27 15:46:41 2019 +0000" }, "message": "Merge \"Allowing zeroes in trusted OS SMC return values\"" }, { "commit": "1c97f9418db19942656072435955874c83027124", "tree": "4289d6f078487d87f03dfd62f834f5df51cb508c", "parents": [ "2676b99a81b4f886b7b79189cbe432705843977b" ], "author": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Mon Sep 23 16:44:03 2019 +0200" }, "committer": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Thu Sep 26 22:51:20 2019 +0200" }, "message": "Allowing zeroes in trusted OS SMC return values\n\nTrusted OSes should preserve or fill by zeroes the values of x1-x3\nregisters across an SMC call in order to prevent data leakage. The\nbehaviour of OP-TEE regarding to this has changed recently from\npreserving values to filling them by zeroes. This patch utilitizes the\nnewly added allow_zeros[] parameter of the smc_check_match function to\nmake the tests compatible with OP-TEE commit 6e558fa94ab0 or later.\n\nSigned-off-by: Imre Kis \u003cimre.kis@arm.com\u003e\nChange-Id: I52ddfb69261833a3fba76c5f89d27d1ea13043b0\n" }, { "commit": "cdba6c95f558304f77b062d58c6c398b3655ef93", "tree": "8e34cf61f431a255cf7f3004d9e3cce4c6e74530", "parents": [ "2676b99a81b4f886b7b79189cbe432705843977b", "1b92611fddb4b3360ca1d6db3b91a2c3b7bf99bb" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Sep 25 06:25:59 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Sep 25 06:25:59 2019 +0000" }, "message": "Merge \"Fix a false fail for SMC WORKAROUND2 test on Cortex-A76\"" }, { "commit": "1b92611fddb4b3360ca1d6db3b91a2c3b7bf99bb", "tree": "8e34cf61f431a255cf7f3004d9e3cce4c6e74530", "parents": [ "2676b99a81b4f886b7b79189cbe432705843977b" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Sep 16 14:46:31 2019 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Sep 24 12:10:43 2019 -0500" }, "message": "Fix a false fail for SMC WORKAROUND2 test on Cortex-A76\n\nSome platforms with A76 core do not require the dynamic\nmitigation using SMCCC_ARCH_WORKAROUND_2 call. Test which\nverifies such workaround can be skipped in such scenario.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: Iacf27da7181828a2fd1166bd6eeb069ba27da0c5\n" }, { "commit": "2129608e9ab970909c924a934a93a501099ab3bc", "tree": "68fee8b5582b4ba8c366fe13e51f7f9a67ce862b", "parents": [ "2676b99a81b4f886b7b79189cbe432705843977b" ], "author": { "name": "laurenw-arm", "email": "lauren.wehrmeister@arm.com", "time": "Wed Sep 18 14:53:33 2019 -0500" }, "committer": { "name": "laurenw-arm", "email": "lauren.wehrmeister@arm.com", "time": "Mon Sep 23 14:50:12 2019 -0500" }, "message": "Separate shutdown and stats after shutdown tests\n\nCreating new test suite for System shutdown and stats after shutdown\ntests separate from the other manual tests since the others have been\nautomated for some platforms. This test suite is intended to be used\nfor manual testing for the upcoming release.\n\nSigned-off-by: Lauren Wehrmeister \u003clauren.wehrmeister@arm.com\u003e\nChange-Id: I3725b28528696fa51d4c1f3af60f8a6e61e1a702\n" }, { "commit": "2676b99a81b4f886b7b79189cbe432705843977b", "tree": "9c16d690c69f9d9cdab479da158472dd7f688e21", "parents": [ "4c213e5eb22269da1a92b53c01a91e8f36439a0e", "89391603d63fd409c18e00e45c864dc9749f2f25" ], "author": { "name": "Paul Beesley", "email": "paul.beesley@arm.com", "time": "Fri Aug 16 15:27:53 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Aug 16 15:27:53 2019 +0000" }, "message": "Merge \"Create new xml to split Juno reboot tests\"" }, { "commit": "89391603d63fd409c18e00e45c864dc9749f2f25", "tree": "f8c42818b8d0345db9f19d438597078e37e7e8bd", "parents": [ "6927d85a0429bd247cb76b7cb4201e330fc745a1" ], "author": { "name": "laurenw-arm", "email": "lauren.wehrmeister@arm.com", "time": "Wed Jul 31 15:33:07 2019 -0500" }, "committer": { "name": "laurenw-arm", "email": "lauren.wehrmeister@arm.com", "time": "Thu Aug 08 10:15:51 2019 -0500" }, "message": "Create new xml to split Juno reboot tests\n\nCreating a new xml to separate Juno TFTF reboot tests by those that are expected to pass and\nthose that aren\u0027t (2 RESET2 tests).\n\nSigned-off-by: Lauren Wehrmeister \u003clauren.wehrmeister@arm.com\u003e\nChange-Id: I101de828aeedd33e0601597b70e00056b884ceba\n" }, { "commit": "4c213e5eb22269da1a92b53c01a91e8f36439a0e", "tree": "40a8030578f1abbb33633c3783e26cdb6c94e4a3", "parents": [ "f70889bee012047998ec9fd0942eca9f99120c67", "ee3e7cd720887077ad27f48f4c8e681926c16587" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri Aug 02 06:50:04 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Aug 02 06:50:04 2019 +0000" }, "message": "Merge \"ld: Separate code and RO data sections\"" }, { "commit": "f70889bee012047998ec9fd0942eca9f99120c67", "tree": "b47d5b879a4a3ef00ed1c2fb5553d839c15f1d31", "parents": [ "6927d85a0429bd247cb76b7cb4201e330fc745a1", "38c645cbe3089e6878a75a5d3e41a7dcfdc26286" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri Aug 02 06:49:32 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Aug 02 06:49:32 2019 +0000" }, "message": "Merge \"TF-A Tests: Pick up changes from TF-A code base\"" }, { "commit": "ee3e7cd720887077ad27f48f4c8e681926c16587", "tree": "b2be6933f915effc206f73faf1ce5a73118751c7", "parents": [ "6927d85a0429bd247cb76b7cb4201e330fc745a1" ], "author": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Wed Jul 03 16:44:49 2019 +0100" }, "committer": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Thu Aug 01 11:34:18 2019 +0100" }, "message": "ld: Separate code and RO data sections\n\nThis prevents the execution of the read-only data.\n\nThis is done in a similar way in TF-A when the build flag\nSEPARATE_CODE_AND_RODATA is enabled.\n\nThe build flag is probably not needed in TF-A Tests.\n\nChange-Id: I2bdc0237c00377beb2febeb47207770c85036192\nSigned-off-by: Ambroise Vincent \u003cambroise.vincent@arm.com\u003e\n" }, { "commit": "38c645cbe3089e6878a75a5d3e41a7dcfdc26286", "tree": "b47d5b879a4a3ef00ed1c2fb5553d839c15f1d31", "parents": [ "6927d85a0429bd247cb76b7cb4201e330fc745a1" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Aug 01 11:27:20 2019 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Aug 01 11:27:20 2019 +0100" }, "message": "TF-A Tests: Pick up changes from TF-A code base\n\nThis patch pick up the following changes from TF-A:\n- Fix for SCTLR bit definitions in \u0027include/lib/aarch64/arch.h`\n- Introduction of 128-bit integer types int128_t and uint128_t\nin \u0027include/lib/libc/aarch64/stdint.h_`\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I7e7b1b6d8f79eeb6b16df2ce2bea07c5748d1216\n" }, { "commit": "6927d85a0429bd247cb76b7cb4201e330fc745a1", "tree": "1b15e54ea94905d8b3095a4137e514ddeba5911e", "parents": [ "c78987eee6cc5b9f0c02da288c3a4331429a6014", "513be4966f8a9db2fe3166efdc03843f5010cdfe" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Jul 31 14:28:11 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 31 14:28:11 2019 +0000" }, "message": "Merge \"Creating separate xml for Reboot tests\"" }, { "commit": "c78987eee6cc5b9f0c02da288c3a4331429a6014", "tree": "89f6a460b4d075671de8b4bbc9879d1722dd2f69", "parents": [ "31db80cc6d39f506fb2913c93380c2acde391094", "8dec845212bede5e127ef7293e0b20c9e02195ed" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Jul 31 12:09:50 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 31 12:09:50 2019 +0000" }, "message": "Merge \"TF-TF: Fix bug in calculation of number of CPUs\"" }, { "commit": "513be4966f8a9db2fe3166efdc03843f5010cdfe", "tree": "d775a570f1b96baed834b921b7d411c1a6a499d9", "parents": [ "7bdfa0b07a52e487a443394aad89bcd37fbc02a8" ], "author": { "name": "lauwal01", "email": "lauren.wehrmeister@arm.com", "time": "Tue Jul 09 10:58:01 2019 -0500" }, "committer": { "name": "laurenw-arm", "email": "lauren.wehrmeister@arm.com", "time": "Fri Jul 26 12:36:12 2019 -0500" }, "message": "Creating separate xml for Reboot tests\n\nSeparating the manual tests xml to only include reboot tests so these\ncan be automated.\n\nChange-Id: Ib1dfe7f215811e9ecb5b8f439965465187b3fe9b\nSigned-off-by: Lauren Wehrmeister \u003clauren.wehrmeister@arm.com\u003e\n" }, { "commit": "8dec845212bede5e127ef7293e0b20c9e02195ed", "tree": "32c429ca955deda4928c94b5bef2618ee87bb1f8", "parents": [ "7bdfa0b07a52e487a443394aad89bcd37fbc02a8" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Tue Jul 16 09:34:24 2019 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Jul 17 16:41:54 2019 +0100" }, "message": "TF-TF: Fix bug in calculation of number of CPUs\n\nThis patch fixes the bug in tftf_get_total_aff_count()\nwhich incorrectly calculates the number of CPUs for\naff_lvl \u003d 0. The function reads tftf_pd_nodes[] array\nonly based on condition\n`tftf_pd_nodes[node_idx].level \u003d\u003d aff_lvl` but\ndoesn\u0027t check for `indexes \u003c PLATFORM_NUM_AFFS`.\nThis causes reads of the array beyond its boundaries\nwhich results in incorrect calculation of number of CPUs,\nand some of the tests entering infinite loops.\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: If7b2d8eba7560126aeff29c6b8c9355198aad453\n" }, { "commit": "31db80cc6d39f506fb2913c93380c2acde391094", "tree": "ae0109aefaf241e77345d0b6f9d6432f481da693", "parents": [ "7bdfa0b07a52e487a443394aad89bcd37fbc02a8", "d1193ef6d09b94e5c5083b868371d1ace9149854" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Jul 17 15:05:42 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 17 15:05:42 2019 +0000" }, "message": "Merge \"Skip multicore spurious interrupt test\"" }, { "commit": "d1193ef6d09b94e5c5083b868371d1ace9149854", "tree": "ae0109aefaf241e77345d0b6f9d6432f481da693", "parents": [ "7bdfa0b07a52e487a443394aad89bcd37fbc02a8" ], "author": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Tue Jul 16 15:30:22 2019 +0100" }, "committer": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Tue Jul 16 15:54:21 2019 +0100" }, "message": "Skip multicore spurious interrupt test\n\nThis specific test is known to have unstable behaviour. As a temporary\nsolution we skip this test for AArch64 Juno configs.\n\nChange-Id: I7c93de0c80ad8dba47b83f0b343d868dc18b732f\nSigned-off-by: John Tsichritzis \u003cjohn.tsichritzis@arm.com\u003e\n" }, { "commit": "7bdfa0b07a52e487a443394aad89bcd37fbc02a8", "tree": "07e42b8ab8a08c40959c15f5e4a53ce93177c676", "parents": [ "39b397af7566135498e6995102698c0efb0dc90c", "e36bf03bb7ec22a463e8077aace4fda1ea90d87d" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri Jun 28 06:24:56 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 28 06:24:56 2019 +0000" }, "message": "Merge \"Add missing testsuites in extensive set of tests\"" }, { "commit": "e36bf03bb7ec22a463e8077aace4fda1ea90d87d", "tree": "07e42b8ab8a08c40959c15f5e4a53ce93177c676", "parents": [ "39b397af7566135498e6995102698c0efb0dc90c" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Jun 26 15:36:23 2019 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Jun 27 11:01:52 2019 +0200" }, "message": "Add missing testsuites in extensive set of tests\n\nThe extensive set of tests is meant to be a superset of the standard\nset. However, 2 testsuites were present in the standard set and were\nmissing from the extensive one.\n\nChange-Id: Idc5d6abd9a2bcdfcfa41421e823a88095ab4e16e\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "39b397af7566135498e6995102698c0efb0dc90c", "tree": "ee8e82f936f3008e99b80f97c487d369437f51f8", "parents": [ "11c53c86d4828b12ffa61ce180b0c4e694348ae3", "8051274dfc4dae689ba53bc3e56d320780cbd5a4" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Jun 20 11:57:17 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Jun 20 11:57:17 2019 +0000" }, "message": "Merge \"libc: fix memchr implementation\"" }, { "commit": "8051274dfc4dae689ba53bc3e56d320780cbd5a4", "tree": "ee8e82f936f3008e99b80f97c487d369437f51f8", "parents": [ "11c53c86d4828b12ffa61ce180b0c4e694348ae3" ], "author": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Thu Jun 20 10:03:17 2019 +0100" }, "committer": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Thu Jun 20 10:03:17 2019 +0100" }, "message": "libc: fix memchr implementation\n\nThe previous implementation could behave incorrectly because of the sign\nextension of the char when compared to the int.\n\nChange-Id: Id1e40ca9cfb1c271cb391e26698862726b833c8b\nSigned-off-by: Ambroise Vincent \u003cambroise.vincent@arm.com\u003e\n" }, { "commit": "11c53c86d4828b12ffa61ce180b0c4e694348ae3", "tree": "52d5d996388dc808ee73088dc1aa58cdd7f12ad6", "parents": [ "16a4773b5330d348997ae2dd3204992e590702b4", "d64e1539d505e537282f6c31e42f16474a6b5bda" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Jun 18 15:57:31 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Jun 18 15:57:31 2019 +0000" }, "message": "Merge \"Add test to measure latencies when turning ON a cluster\"" }, { "commit": "d64e1539d505e537282f6c31e42f16474a6b5bda", "tree": "7a7a86f914f48342f8b1e482195df01a2de5b95d", "parents": [ "a3ccf4b875dc5500662262a9a15a29525da04312" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jul 09 13:10:21 2018 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Jun 18 10:53:05 2019 +0100" }, "message": "Add test to measure latencies when turning ON a cluster\n\nChange-Id: If698dc76c1873fb79ffe63ac6ee0c808186310ac\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "16a4773b5330d348997ae2dd3204992e590702b4", "tree": "e9b28bc0a3b3019eb44dad2c80307bc86ef2cd14", "parents": [ "a3ccf4b875dc5500662262a9a15a29525da04312", "3fd90497faa87ef81b60aa685689bda015f2acb1" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Jun 12 06:46:19 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jun 12 06:46:19 2019 +0000" }, "message": "Merge \"Support for FVP cluster with 8 CPUs.\"" }, { "commit": "3fd90497faa87ef81b60aa685689bda015f2acb1", "tree": "24046b7a9287064cf03ee4d9e40be888367987f7", "parents": [ "c9ab1fd3b32cc3adce83b76a5a801ae492c175ff" ], "author": { "name": "Madhukar", "email": "madhukar.pappireddy@arm.com", "time": "Tue Jun 04 15:57:18 2019 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Jun 11 10:10:22 2019 -0500" }, "message": "Support for FVP cluster with 8 CPUs.\n\nFew Cortex FVPs have upto 8 CPUs in single clsuter. This patch solves\nthe issue reported in https://developer.trustedfirmware.org/T333\n\nChange-Id: I14c36b0d643a85527b7122cee0f728fddb871ec7\nSigned-off-by: Madhukar Pappireddy\u003cmadhukar.pappireddy@arm.com\u003e\n" }, { "commit": "a3ccf4b875dc5500662262a9a15a29525da04312", "tree": "7c21d4c11ab786608629cffd8ac43ba9f25069d5", "parents": [ "7a5ade85e460988fe8540066eaecde6a3f36c894", "49180a8496b41f77bbf89b4d3db3830e135ea405" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Jun 11 10:50:06 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Jun 11 10:50:06 2019 +0000" }, "message": "Merge \"Cosmetic changes to suspend_private.h\"" }, { "commit": "49180a8496b41f77bbf89b4d3db3830e135ea405", "tree": "0605865a1da94d6ce883a749d0b9195c9ff4d3d7", "parents": [ "c9ab1fd3b32cc3adce83b76a5a801ae492c175ff" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 07 16:35:48 2019 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Jun 06 13:31:56 2019 +0200" }, "message": "Cosmetic changes to suspend_private.h\n\nReword some comments, express offsets relative to one another, move the\ncompile-time assertions closer to the structure they depend on.\n\nChange-Id: Id3d61ca704321844d12c9bb25e2e6eb303a7a579\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "7a5ade85e460988fe8540066eaecde6a3f36c894", "tree": "501e62a9b578008aac0670d4241906d364d028ec", "parents": [ "c9ab1fd3b32cc3adce83b76a5a801ae492c175ff", "167fe8352a1a60df1c551ecfc86b68154da1774a" ], "author": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Wed Jun 05 16:34:30 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jun 05 16:34:30 2019 +0000" }, "message": "Merge \"doc: Update communication tools\"" }, { "commit": "167fe8352a1a60df1c551ecfc86b68154da1774a", "tree": "501e62a9b578008aac0670d4241906d364d028ec", "parents": [ "c9ab1fd3b32cc3adce83b76a5a801ae492c175ff" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Jun 03 10:56:28 2019 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Jun 04 14:03:48 2019 +0100" }, "message": "doc: Update communication tools\n\nPrefer to use the trustedfirmware.org collaboration tools (i.e. issues\ntracker and development mailing list) over the #trusted-firmware-a IRC\nchannel.\n\nChange-Id: I78aef022b00cd553e1ab6542b967dd3f0640dd52\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "c9ab1fd3b32cc3adce83b76a5a801ae492c175ff", "tree": "7bc7490da8fab528fc151eb712adc02efa5a414d", "parents": [ "16a32f7e388fc3246b1e1d06c815a0fa09cd7818", "cae91ca61cc36462c3e1b639c2725535a0c05df4" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue May 28 07:49:13 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue May 28 07:49:13 2019 +0000" }, "message": "Merge changes from topic \"jts/amu\"\n\n* changes:\n Fix AMU non-zero counters test\n Remove unexecuted code for AMU group 1 counters\n" }, { "commit": "cae91ca61cc36462c3e1b639c2725535a0c05df4", "tree": "7bc7490da8fab528fc151eb712adc02efa5a414d", "parents": [ "68759a8015fc997aeeb2fb0caf6b55bbbec73d02" ], "author": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Sun May 12 16:06:09 2019 +0100" }, "committer": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Fri May 24 14:10:51 2019 +0100" }, "message": "Fix AMU non-zero counters test\n\nThe condition checked in one of the AMU tests (AMU counters always\nnon-zero) does not always hold. The counter that counts the memory stall\ncycles, under certain circumstances, can be zero. Hence, the test is\nadjusted accordingly and, consequently, renamed.\n\nChange-Id: I8c7300481c2b45825101ee87f61c68c2ab51758a\nSigned-off-by: John Tsichritzis \u003cjohn.tsichritzis@arm.com\u003e\n" }, { "commit": "68759a8015fc997aeeb2fb0caf6b55bbbec73d02", "tree": "25fb8d86e88f96e86ed9cdfa50f717662b641ff0", "parents": [ "16a32f7e388fc3246b1e1d06c815a0fa09cd7818" ], "author": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Sun May 12 15:10:27 2019 +0100" }, "committer": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Mon May 20 12:43:55 2019 +0100" }, "message": "Remove unexecuted code for AMU group 1 counters\n\nThis patch removes from the AMU tests the part that iterates over group\n1 counters. The reasons for this are the following:\n\n1) Currently the AMU tests are executed only in FVP but FVP doesn\u0027t\nhave/expose group 1 counters.\n\n2) Even if some platform implements group 1 counters in the future, we\ndon\u0027t know what they will be counting. As such we cannot know what the\nvalid values for those counters will be. Hence, we can\u0027t establish a\nspecific test at this moment to validate the group 1 counter values.\n\n3) Even now that the loop exists in the code, the macro defining the\ngroup 1 counters is defined as zero. Which means that the loop is\nalready not executed, despite being there (dead code).\n\nHowever, the architecture defines how group 1 counters should be\nimplemented. For this reason, the assembly helper functions that access\nthe group1 counters are left intact. This will allow us to easily extend\nthe AMU tests again in the future to include group 1 counters.\n\nChange-Id: I5a6f119c7e817de9dc5e510c3fadd008820bd564\nSigned-off-by: John Tsichritzis \u003cjohn.tsichritzis@arm.com\u003e\n" }, { "commit": "16a32f7e388fc3246b1e1d06c815a0fa09cd7818", "tree": "bb892f0c8949550fcba0111186e559998a47ff0f", "parents": [ "2755ecb5dcab5fac6295245a15afaecfff8eba78", "7c5df58ddbb2c55a0ef16d1e8d9ae3f3d2f4c73e" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri May 17 07:28:22 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 17 07:28:22 2019 +0000" }, "message": "Merge changes from topic \"sb/el3-payload\"\n\n* changes:\n run_armds_script.sh: Ask user which DSTREAM to connect to\n Adapt run_ds5_script.sh for recent Arm DS versions\n" }, { "commit": "7c5df58ddbb2c55a0ef16d1e8d9ae3f3d2f4c73e", "tree": "bb892f0c8949550fcba0111186e559998a47ff0f", "parents": [ "47ab4f4fd1c650eff22844593577814a095952dd" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Aug 30 17:37:43 2018 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri May 10 14:31:07 2019 +0200" }, "message": "run_armds_script.sh: Ask user which DSTREAM to connect to\n\nPreviously the script to run the EL3 payload on Juno would connect to\nthe first DSTREAM it detected, without even asking the user\u0027s consent.\n\nChange-Id: I1586957094cc3247c1dadf0adac263af0256e03d\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "47ab4f4fd1c650eff22844593577814a095952dd", "tree": "522f39bd3f176b4d74c4eda9aaf302e61b7e9444", "parents": [ "2755ecb5dcab5fac6295245a15afaecfff8eba78" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri May 10 13:23:41 2019 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri May 10 14:31:07 2019 +0200" }, "message": "Adapt run_ds5_script.sh for recent Arm DS versions\n\nArm DS-5 has been superseded by Arm Development Studio. Do the necessary\nchanges to the EL3 payload scripts to migrate to the latter:\n\n - Rename run_ds5_script.sh into run_armds_script.sh.\n - The command-line debugger is now called armdbg.\n - The CDB entry string for Arm Juno development board has changed.\n\nChange-Id: Idc640e7fcff790d5a1bf6e938e14a0dbc88029b9\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "2755ecb5dcab5fac6295245a15afaecfff8eba78", "tree": "9805a9ad3d674ccd3d5d2f7dc83696955a1c947d", "parents": [ "1f018ba629bd534a14bbf133d4e9fa61e2f09686", "96e250320b9c1cec90946e93d87f27fdafac5092" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue May 07 13:07:13 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue May 07 13:07:13 2019 +0000" }, "message": "Merge \"Fix AArch32 build error\"" }, { "commit": "96e250320b9c1cec90946e93d87f27fdafac5092", "tree": "9805a9ad3d674ccd3d5d2f7dc83696955a1c947d", "parents": [ "1f018ba629bd534a14bbf133d4e9fa61e2f09686" ], "author": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Tue May 07 10:42:22 2019 +0100" }, "committer": { "name": "John Tsichritzis", "email": "john.tsichritzis@arm.com", "time": "Tue May 07 10:51:44 2019 +0100" }, "message": "Fix AArch32 build error\n\nPointer authentication code should be conditionally compiled only if\nTFTF is built for AArch64 since AArch32 doesn\u0027t support pointer\nauthentication. This was previously causing a compilation error.\n\nChange-Id: I97a0ea66f562cf2ebb41478b1b31a26bcaf815b2\nSigned-off-by: John Tsichritzis \u003cjohn.tsichritzis@arm.com\u003e\n" }, { "commit": "1f018ba629bd534a14bbf133d4e9fa61e2f09686", "tree": "eae0800de352250121d33417c78520ae16012291", "parents": [ "3da9cb1fcad88d5c7ca60141c067ad5559cdb399", "8d84b4c68c5f015b1315034dd1d64767ce5401e8" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue May 07 07:29:21 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue May 07 07:29:21 2019 +0000" }, "message": "Merge \"Add topology helper to get parent node\"" }, { "commit": "8d84b4c68c5f015b1315034dd1d64767ce5401e8", "tree": "eae0800de352250121d33417c78520ae16012291", "parents": [ "3da9cb1fcad88d5c7ca60141c067ad5559cdb399" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jul 09 13:07:57 2018 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Apr 29 15:36:28 2019 +0100" }, "message": "Add topology helper to get parent node\n\nIt was not possible to get a parent node given an MPIDR\nof the CPU using the current topology APIs. This patch adds\nthe `tftf_get_parent_node_from_mpidr()` API to achieve the same.\n\nChange-Id: I818f1e628689928293c1fdb85606885e851a5785\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "3da9cb1fcad88d5c7ca60141c067ad5559cdb399", "tree": "03dea16e67cb32994050580fd74a0fb5cb9c9994", "parents": [ "5394feaf2190cb0a80ff0b633d2702a9add337a2" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Tue Apr 23 10:53:45 2019 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Tue Apr 23 10:53:45 2019 +0100" }, "message": "drivers: console: pl011: Move comments to header\n\nRather than having the description of each function in the\nimplementation, move it to the header so that it isn\u0027t needed to copy\nit in each file that implements a console driver.\n\nChange-Id: I1b437ae3d3ccff10979466727353bc1fa1d5b188\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "5394feaf2190cb0a80ff0b633d2702a9add337a2", "tree": "140067e4ede341c460971103a6bb3adbec3de091", "parents": [ "26b3864c09add32f2b5a8e3798c9731fc856e9a5" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Wed Apr 17 13:12:10 2019 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Wed Apr 17 13:14:48 2019 +0100" }, "message": "quark: Introduce simple TFTF test\n\nIntroduce test to verify that Quark is present in the system.\n\nChange-Id: Ia31e65e737b8909f7caecae830fcb217e88a9b01\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "26b3864c09add32f2b5a8e3798c9731fc856e9a5", "tree": "224a51e581518b4acb6d1e8b960fee5134474cae", "parents": [ "1d03668d7ebe6286b70808097d80b72d624be0a2" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Thu Mar 28 13:16:04 2019 +0000" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Wed Apr 17 13:14:48 2019 +0100" }, "message": "quark: Introduce Quark Secure Partition\n\nTest partition designed to have a virtual address space as small as\npossible in order to test the extension ARMv8.4-TTST. This Secure\nPartition doesn\u0027t have print capabilities. The only service it provides\nis one that returns a magic number to verify that it has been loaded.\n\nChange-Id: I431f6c65f2926d486836d12ddfefe05e83b0c47f\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "1d03668d7ebe6286b70808097d80b72d624be0a2", "tree": "a883d996054c046a55984d93665acdd52c989f7f", "parents": [ "6a82072252cb14349a7d89c3eaed9204f7f01bd7" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Wed Mar 27 15:23:59 2019 +0000" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Wed Apr 17 13:14:47 2019 +0100" }, "message": "drivers: dummy_console: Add dummy console driver\n\nPlaceholder driver with empty functions.\n\nChange-Id: I50accca77995c642c7b920bdc1b7d936e7883313\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "6a82072252cb14349a7d89c3eaed9204f7f01bd7", "tree": "ee88100c271d2a19d5f7435d0bbef7745aed66f1", "parents": [ "dd842755d5567569c706ca1cd7b9416ed1caef12", "6a6f48338312f1b8e5637fa85d7942e6bb9d8bab" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Apr 15 07:25:08 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Apr 15 07:25:08 2019 +0000" }, "message": "Merge \"Makefile: Enable strict align arch minor version\"" }, { "commit": "6a6f48338312f1b8e5637fa85d7942e6bb9d8bab", "tree": "758dea2b85bfd8e97a5d86f65b73a81a7f93d15e", "parents": [ "8790f025e12065ccccfe4d19fdcc672c80aa784b" ], "author": { "name": "Joel Hutton", "email": "Joel.Hutton@Arm.com", "time": "Mon Apr 08 15:46:36 2019 +0100" }, "committer": { "name": "Joel Hutton", "email": "Joel.Hutton@arm.com", "time": "Fri Apr 12 15:43:03 2019 +0100" }, "message": "Makefile: Enable strict align arch minor version\n\nAdd -mstrict-align flag, and -march minor version. These are needed to\nprevent compilers generating unaligned accesses and enable\narchitectural features respectively.\n\nEnable the SCTLR.A and SCTLR.SA alignment checks in all images.\n\nTF test has several cases of code which enable the alignment checks.\n\nChange-Id: I9a0413786caf94d0abf376aa1b4fb54fc7f2f355\nSigned-off-by: Joel Hutton \u003cJoel.Hutton@Arm.com\u003e\n" }, { "commit": "dd842755d5567569c706ca1cd7b9416ed1caef12", "tree": "93b7b65f111add64c1f75ed6299e509ad15d67e6", "parents": [ "8790f025e12065ccccfe4d19fdcc672c80aa784b" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Apr 10 09:30:10 2019 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Apr 10 12:13:34 2019 +0000" }, "message": "Update links to TF-A documentation\n\nUpdate the links to the TF-A documentation to point to\ntrustedfirmware.org rather than Github.\n\nChange-Id: Ib49b90b6733cdf6acd17d95e6d4968ac162bd150\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "8790f025e12065ccccfe4d19fdcc672c80aa784b", "tree": "e5548628d170748a3f2d98973b4db315a76c88ef", "parents": [ "29ef1dd13dfb989008fc98f7f7c17f163e0479bf" ], "author": { "name": "Joel Hutton", "email": "Joel.Hutton@Arm.com", "time": "Fri Mar 15 14:47:02 2019 +0000" }, "committer": { "name": "Joel Hutton", "email": "Joel.Hutton@Arm.com", "time": "Mon Apr 08 14:34:42 2019 +0100" }, "message": "Add unit tests for Pointer Authentication\n\nAdd unit tests to:\n Test access to the key registers.\n Use the pointer authentication instructions.\n Call psci version and check the EL3 pointer authentication keys\n aren\u0027t leaked.\n Make a tsp call and check the secure world keys aren\u0027t leaked.\n\nChange-Id: Ic7940757e6f9fc905ccef8c035e0c22b47b35cd7\nSigned-off-by: Joel Hutton \u003cJoel.Hutton@Arm.com\u003e\n" }, { "commit": "29ef1dd13dfb989008fc98f7f7c17f163e0479bf", "tree": "8037437c8156f8fb43e26b1da5996223ed15014c", "parents": [ "cc0239947d60902a114247277523943fcf537e1d" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Thu Apr 04 11:18:49 2019 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Thu Apr 04 11:19:25 2019 +0100" }, "message": "xlat v2: Synchronize with TF-A\n\nChange-Id: Ibd277c918088cf2afdd262689fa1e1c4ad369619\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "cc0239947d60902a114247277523943fcf537e1d", "tree": "853a0aaf2182f0c563e4df8ef6266cc5462924e0", "parents": [ "372b675ac20e2addc1c13f36ce61e5f90749f40d" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Thu Apr 04 11:18:32 2019 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Thu Apr 04 11:19:19 2019 +0100" }, "message": "Partial sync of architectural headers with TF-A\n\nChange-Id: I0509065512907217dc17c0ec5ce474e2bb8d4e89\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "372b675ac20e2addc1c13f36ce61e5f90749f40d", "tree": "e788daebf2b14c2ea79f1b4763aac97b010d2203", "parents": [ "fae77720145bf50b0965b90d0055015a21923aef", "f152f8f480f36b448d1f8b02e4902ae30523cca5" ], "author": { "name": "Antonio Niño Díaz", "email": "antonio.ninodiaz@arm.com", "time": "Thu Apr 04 10:06:38 2019 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Apr 04 10:06:38 2019 +0000" }, "message": "Merge changes from topic \"an/xlat-v2-tests\"\n\n* changes:\n xlat v2: Alignment tests\n xlat v2: Stress tests\n Increase virtual address space size in AArch64\n xlat v2: Add unit tests\n" }, { "commit": "fae77720145bf50b0965b90d0055015a21923aef", "tree": "a11e91b812f0c1bd4a62fd3aa644b82947877907", "parents": [ "88e96a1d790ca47c500a254dea32426e41e4e369" ], "author": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Thu Mar 07 10:17:15 2019 +0000" }, "committer": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Mon Apr 01 11:08:40 2019 +0100" }, "message": "Introduce test for SVE support\n\nWhen SVE extension is enabled, test that it correctly performs simple\noperations.\n\nGenerating SVE instructions requires O3 compilation optimization. Since\nthe build structure does not allow compilation flag modification for\nspecific files, the function testing SVE support has been pre-compiled\nand added as an assembly file.\n\nChange-Id: Id9ba7d9e1de9bcbae3065cad2dd3e1dbe87ef03a\nSigned-off-by: Ambroise Vincent \u003cambroise.vincent@arm.com\u003e\n" }, { "commit": "f152f8f480f36b448d1f8b02e4902ae30523cca5", "tree": "76ff0aa3a6e67366fa3d4e5cc5381955788e9941", "parents": [ "402b269ccd3926feab74ba4dfb39d6f0dc703c4d" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Oct 05 15:18:45 2018 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Mar 29 13:00:08 2019 +0000" }, "message": "xlat v2: Alignment tests\n\nChange-Id: I6a689998a74f7841c668ccbb4be7b03d36b355b2\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "402b269ccd3926feab74ba4dfb39d6f0dc703c4d", "tree": "9dbcc4070eb546b9b5234b0f59f9deb6f4b6db5a", "parents": [ "f00940b6a36458d0a321e1defbe2599453f29913" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Oct 05 15:11:38 2018 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Mar 29 13:00:08 2019 +0000" }, "message": "xlat v2: Stress tests\n\nChange-Id: I2b5de1b884db78eea6d83ab8b31de32b5c23b316\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "f00940b6a36458d0a321e1defbe2599453f29913", "tree": "fa284d5dd94ca9ef81fc4124c55a3f545b718ac7", "parents": [ "54959b0c9989faccec05d420aee14ff865d60fab" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Mon Aug 13 09:54:26 2018 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Mar 29 13:00:07 2019 +0000" }, "message": "Increase virtual address space size in AArch64\n\nThis is needed to have room for xlat v2 tests.\n\nChange-Id: Ic4e39f8f964c2c41effc99f1b419cf7cdc405bbb\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "54959b0c9989faccec05d420aee14ff865d60fab", "tree": "a73e3908a4a82b89ff2d31f5cb346411305dc751", "parents": [ "88e96a1d790ca47c500a254dea32426e41e4e369" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Mar 29 12:59:35 2019 +0000" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Mar 29 12:59:35 2019 +0000" }, "message": "xlat v2: Add unit tests\n\nAdd basic unit tests for the xlat tables library v2.\n\nChange-Id: I814470d2aceec8a7d1da5190c7c5b355178b1a54\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "88e96a1d790ca47c500a254dea32426e41e4e369", "tree": "f134a85da7dfc1f3bdcefb05db514c4231651103", "parents": [ "931e057f2c56fb852dc8141912933eda3e1b12e9" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 28 09:34:55 2019 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 28 17:04:35 2019 +0100" }, "message": "Update change log for v2.1 release\n\nChange-Id: I2e593badc2c0923d292f3d55d384c8d6e1f6a0df\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "931e057f2c56fb852dc8141912933eda3e1b12e9", "tree": "521ebd5a0f0d0f20c04a2bffe673ff5ea0c60bac", "parents": [ "61667c63a548d20b0fdd230d2f2f2de37c765aca" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 21 09:32:28 2019 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 28 17:04:35 2019 +0100" }, "message": "Update readme.rst file for v2.1 release\n\n - Bump version from 2.0 to 2.1.\n - Upgrade recommended FVP version.\n\nChange-Id: I8c7bae8b8285ec6228a2e1ed1bfbe1d8ffc51587\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "61667c63a548d20b0fdd230d2f2f2de37c765aca", "tree": "d2c4e477dfb4edf57803ebcd11a0369ce804e469", "parents": [ "b1e04de8f886e81c09be639668ed449fc9c8d7bf" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Mar 20 13:58:28 2019 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 28 17:04:35 2019 +0100" }, "message": "Upgrade version string displayed on startup\n\nChange-Id: I0b319f9724d540b46c5d8ded3cb37f686871ec95\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "b1e04de8f886e81c09be639668ed449fc9c8d7bf", "tree": "8c16bfcc72bd087412e30ebaf3348253d43196da", "parents": [ "9f5a2e3ba0503404152098e9d5884d5502f7b48f" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 21 09:35:01 2019 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Mar 28 17:03:44 2019 +0100" }, "message": "Add missing link to issues tracker in readme file\n\nChange-Id: I69cb86be54bf84a3e42a498382f373b193737d8a\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" } ], "next": "9f5a2e3ba0503404152098e9d5884d5502f7b48f" }