)]}' { "log": [ { "commit": "cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849", "tree": "8be9469773b3f15614ee27ae9539cc29f8692c3c", "parents": [ "68ecce15bcd5db2449700d122f4e8f32cce91ae9" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu May 22 11:08:46 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 15:58:15 2025 +0000" }, "message": "refactor: replace in-tree Event Log Lib w/ submodule\n\nThe Event Log Library has been relocated to a separate repository and is\nnow integrated as a submodule, eliminating the need for in-tree files\nand reducing maintenance efforts for TFTF.\n\nChange-Id: I29694f8b3b08bb1d57dd685f6e42dc9f69d241bb\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "68ecce15bcd5db2449700d122f4e8f32cce91ae9", "tree": "4e7a4c0d34ab7cb3c0039bbd3b59431f646c531c", "parents": [ "550d5104ffe85f2f6994ef04a7172627cd76770e" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Mon May 12 12:38:24 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 15:58:13 2025 +0000" }, "message": "feat(libtl): integrate Transfer List Library as submodule\n\nReplaces in-tree transfer_list implementation with LibTL submodule.\nRemoves legacy source and headers, updates includes and makefiles\nto use the standalone library. Adds architecture-specific inttypes\nheaders for compatibility.\n\nChange-Id: Iff8272a6417983b9fb8e7f6bde6db44c2a6020f5\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "550d5104ffe85f2f6994ef04a7172627cd76770e", "tree": "f6b0848eb24c2ee151dea1aaf859bf8de038a4e0", "parents": [ "e1a53a699649c263860560a5ac784599c3b289ca" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu May 22 13:09:27 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 15:58:13 2025 +0000" }, "message": "refactor: remove dead make command\n\nLibFDT sources are built directly and not via the `MAKE_LIB` utility\nwhich isn\u0027t actually defined in TFTF.\n\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\nChange-Id: Ieed18abeade617e741743187fcffa65481b73ed1\n" }, { "commit": "e1a53a699649c263860560a5ac784599c3b289ca", "tree": "ae40d0ba75e4fec2b1a193e99114facb551f11bc", "parents": [ "1356594a91dad701720d4c30357bc2f64f268dbf", "a494e31d805b2ea60e1b154cdf70eba5b8239e31" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 20 12:41:57 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 20 12:41:57 2025 +0000" }, "message": "Merge changes If9d778a7,I8f6f0d32\n\n* changes:\n chore(rme): get device memory regions for map/unmap\n chore(rme): dev granules delegation tests\n" }, { "commit": "a494e31d805b2ea60e1b154cdf70eba5b8239e31", "tree": "ae40d0ba75e4fec2b1a193e99114facb551f11bc", "parents": [ "f25ff9bdacb9b355935486a0b41bcd07789cac38" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Jun 19 16:27:45 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 20 11:36:59 2025 +0000" }, "message": "chore(rme): get device memory regions for map/unmap\n\nSet device memory map/unmap test structures based on\nretrieved platform PCIe memory regions and remove\ndependency on the second region.\n\nChange-Id: If9d778a7d922eaf1ead3193d2916756fd74d77df\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "f25ff9bdacb9b355935486a0b41bcd07789cac38", "tree": "c2473e6292ac1463ef08f61e95f13f7c4485c297", "parents": [ "1356594a91dad701720d4c30357bc2f64f268dbf" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Jun 18 13:51:07 2025 +0100" }, "committer": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Jun 18 14:22:48 2025 +0100" }, "message": "chore(rme): dev granules delegation tests\n\nModify device granules delegatation tests to use\nall existing PCIe memory regions.\nSeed the random number generator by reading RNDR register.\n\nChange-Id: I8f6f0d321a71f1913c63dbab50b2085b308ded58\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "1356594a91dad701720d4c30357bc2f64f268dbf", "tree": "3b1967ddeb8b1e77f9b92072ed2ed26dd8c5b70d", "parents": [ "41684ab1b6655ddeddbd13cff6d3a2938aa1cf2d", "295721e357657995da7e5ee41528a5f14bff497a" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jun 16 06:09:17 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jun 16 06:09:17 2025 +0000" }, "message": "Merge changes from topic \"da_alp12\"\n\n* changes:\n fix: allow partial success for DA test case\n fix(realm): cleanup pdev after setup\n chore(realm): rename rsi_ripas_respose_type to rsi_response_type\n chore(real_da): move realm DA support functions\n chore(host_da): move host RME DA related functions\n feat(realm): added support to invoke RSI RDEV ABIs\n feat(realm): align RSI ABIs with RMM spec 1.1-alp12\n feat(realm_host_mgmt): added support to call RMI VDEV ABIs\n feat(host_realm_mgmt): align DA RMI ABIs RMM spec 1.1-alp12\n chore(include/runtime_services): update SMC RMI commands\n" }, { "commit": "41684ab1b6655ddeddbd13cff6d3a2938aa1cf2d", "tree": "a29b300157e93b11a9b38e831959f64172ebb326", "parents": [ "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa", "5fdb3bff1892596ae023876e62097df70cb0bb37" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jun 16 06:04:36 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jun 16 06:04:36 2025 +0000" }, "message": "Merge \"fix: correct the check for MbedTLS makefile\"" }, { "commit": "5fdb3bff1892596ae023876e62097df70cb0bb37", "tree": "a29b300157e93b11a9b38e831959f64172ebb326", "parents": [ "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 22:59:55 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Sat Jun 14 08:07:02 2025 +0000" }, "message": "fix: correct the check for MbedTLS makefile\n\nThis patch addresses an issue introduced in a previous\ncommit where the inclusion of the MbedTLS makefile was\nincorrect.\n\nChange-Id: Icdae1d85e4bc5663f68b12a9087084ce667f38f4\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "295721e357657995da7e5ee41528a5f14bff497a", "tree": "9f2feff5677fc194200d30d143f6afdbea032e8d", "parents": [ "d0d1710183402ef819629c61f1e311ef645148d0" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 00:07:23 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "fix: allow partial success for DA test case\n\nThis patch returns a SUCCESS error code on partial success of DA\ntestcase so that TF-RMM can progress with partial merge of DA\npatch stack. This will be reverted when the entire DA\nflow is implemented in TF-RMM.\n\nChange-Id: Ia28da05efd93d8290c2cfc879e09ff796a5797d6\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "d0d1710183402ef819629c61f1e311ef645148d0", "tree": "b54047ef37f85f9e7215db14726368703dd56a5d", "parents": [ "08a5f16c322b75a5ed7a1b16da2bb2fc6755ca16" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 06 17:20:59 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "fix(realm): cleanup pdev after setup\n\nChange-Id: Ia2f47fef71ce7336cece5f14b50e0ea4631c0358\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "08a5f16c322b75a5ed7a1b16da2bb2fc6755ca16", "tree": "148d48459acd68d174f5e4dfb7f33b0488a2b3b2", "parents": [ "b8851a7ef8aca4385c42f63d74ac709456c8af1d" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Fri May 09 17:29:13 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "chore(realm): rename rsi_ripas_respose_type to rsi_response_type\n\nRSI_RDEV_VALIDATE_MAPPING command\u0027s output value in X2 has RsiResponse\ntype. Rename \u0027rsi_ripas_respose_type\u0027 to \u0027rsi_response_type\u0027 and fix\ntypo.\n\nChange-Id: I7af258f67c6f18eed9443bfb922dad3a2fdfb0a9\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "b8851a7ef8aca4385c42f63d74ac709456c8af1d", "tree": "faa9bc10b3090fd1745b0190bfe8281e26065294", "parents": [ "19ad61740ec71f886473c3f4d125ad062ce6c9f4" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Apr 24 11:40:28 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "chore(real_da): move realm DA support functions\n\nMove realm DA support functions from realm_da.c\nto realm_da_helpers.c.\n\nChange-Id: I53f3d8bbcaa77d5d17a9b435c0e0484af64adbd7\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "19ad61740ec71f886473c3f4d125ad062ce6c9f4", "tree": "5f707d4e0cbfd1136312c33f02576745a9bf689d", "parents": [ "c58e4697c2df3d1b9d3a7d2e3da2294a13c27449" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Apr 24 10:39:53 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "chore(host_da): move host RME DA related functions\n\nMove host RME DA related functions from host_rmi_da_flow.c\nto host_da_helper.c.\n\nChange-Id: Ib5c5ba3440ba1fa26b6f25a8bfab002183252627\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "c58e4697c2df3d1b9d3a7d2e3da2294a13c27449", "tree": "8b0e4d94ab522130322b4a260f7114efa418abd4", "parents": [ "51135c80730b1ce8faf30ee53a3797bdf342661c" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jan 28 12:28:59 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "feat(realm): added support to invoke RSI RDEV ABIs\n\n- Updated DA RSI data types with RMM spec 1.1-alp11.1.\n- Added support to call DA RSI RDEV ABIs like\n SMC_RSI_RDEV_CONTINUE\n SMC_RSI_RDEV_STOP\n SMC_RSI_RDEV_START\n SMC_RSI_RDEV_GET_INTERFACE_REPORT\n SMC_RSI_RDEV_LOCK\n SMC_RSI_RDEV_GET_INFO\n SMC_RSI_RDEV_GET_MEASUREMENTS\n SMC_RSI_RDEV_GET_STATE\n SMC_RSI_RDEV_GET_INSTANCE_ID\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I60664262c24f287637e91d53ecab0c8b980e58b7\n" }, { "commit": "51135c80730b1ce8faf30ee53a3797bdf342661c", "tree": "b1f1864a8d8666ae08ca534bf3ea53f76e30c97e", "parents": [ "c4ef92bd075d41d7d1ae03b9c5484881547946e7" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Mon Jan 27 11:17:32 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:53:10 2025 +0100" }, "message": "feat(realm): align RSI ABIs with RMM spec 1.1-alp12\n\nThis syncs the naming of SMC RSI commands with TF-RMM.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I7905f0f3788c0c659ba6f787fb002d1c5997d289\n" }, { "commit": "c4ef92bd075d41d7d1ae03b9c5484881547946e7", "tree": "3471ac534950b9cde8059ed320aa4a1d4d797595", "parents": [ "ec4249f483a9ca6e5d65db7ae9c65a69b1d22a96" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Fri Jan 24 11:55:02 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:53:06 2025 +0100" }, "message": "feat(realm_host_mgmt): added support to call RMI VDEV ABIs\n\nThis change creates a Realm witn RMI_FEAT_DA feature and assigns\na VDEV to the Realm using RMI_VDEV_CREATE and calls various VDEV\nmanagement ABIs like:\n SMC_RMI_VDEV_DESTROY\n SMC_RMI_VDEV_STOP\n SMC_RMI_VDEV_GET_STATE\n SMC_RMI_VDEV_COMMUNICATE\n\nOnce the VDEV is assigned to a Realm. A REC enter is done to invoke\nDA RSIs calls.\n\nA common dev_communicate is implemented that is used by both PDEV\nand VDEV communicate.\n\nRenamed testcase host_test_rmi_pdev_calls to host_invoke_rmi_da_flow.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Iefe6f6ee4c0810479d20319851cd8a6590c1e4d7\n" }, { "commit": "ec4249f483a9ca6e5d65db7ae9c65a69b1d22a96", "tree": "04bb12194f885577d0ddbe29aba3008dc9c84660", "parents": [ "5dac5b087067ac7c726ba6eef13538e84d330f43" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jan 07 15:13:09 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:52:09 2025 +0100" }, "message": "feat(host_realm_mgmt): align DA RMI ABIs RMM spec 1.1-alp12\n\nThe DA RMI ABIs related to PDEV, VDEV are aligned to RMM specification\n1.1-alp12\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I6ac86bd2d574f93c7f7b29095b242e4cbf73a071\n" }, { "commit": "5dac5b087067ac7c726ba6eef13538e84d330f43", "tree": "6e951e9d7e671c439d7fbce6bf8554b76f9124c2", "parents": [ "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jan 07 14:51:50 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:52:09 2025 +0100" }, "message": "chore(include/runtime_services): update SMC RMI commands\n\nThis syncs the naming of SMC RMI commands with TF-RMM. This change helps\nto update SMC RMI commands and data types easily whenever it gets\nupdated in TF-RMM.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I8acc96d5326ad0656df0f6c7822adefe87a275c3\n" }, { "commit": "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa", "tree": "1c688ebf6673563fdd5871dd3eda45457454cc47", "parents": [ "42c4a61e973a8d2a50f6e606ac1fc61157fa4e85", "8307c3367e29b068cd3e65b5bd05aa28f8fee0f8" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 15:36:34 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 15:36:34 2025 +0000" }, "message": "Merge \"feat(rmm): add tests for FEAT_TCR2 on RMM\"" }, { "commit": "8307c3367e29b068cd3e65b5bd05aa28f8fee0f8", "tree": "b19d216065c9af2c129b5e692024acc836b70662", "parents": [ "d1cf6dc75ffa489f3055b2c453ad57893214b6bc" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Jun 12 10:30:46 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 15:35:48 2025 +0000" }, "message": "feat(rmm): add tests for FEAT_TCR2 on RMM\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I4dc16c5c6edcabf993ea30fe53eff5993b5af651\n" }, { "commit": "42c4a61e973a8d2a50f6e606ac1fc61157fa4e85", "tree": "55e2cc735d7d1f1b931c1b3e1c69c689f81d0e5c", "parents": [ "d1cf6dc75ffa489f3055b2c453ad57893214b6bc", "ea34abf73d6405cd870fe1f1ff46268b635f51d6" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Jun 13 13:59:30 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 13:59:30 2025 +0000" }, "message": "Merge \"fix(realm): add missing size definitions for Juno\"" }, { "commit": "d1cf6dc75ffa489f3055b2c453ad57893214b6bc", "tree": "c3be96dc6a3cf24de7b5d778004a4e76d97dbbc5", "parents": [ "d479a125cbb07b63c85daf42a36215008168fd37", "a1fe738b1fd6212d92e20a408a0110778276732b" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 10:53:51 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 10:53:51 2025 +0000" }, "message": "Merge \"feat(rme): test access outside PAR from Plane N\"" }, { "commit": "d479a125cbb07b63c85daf42a36215008168fd37", "tree": "56be81714e31b82397012a6203f28a17bbb203d4", "parents": [ "5032d7bc760128a07ace8c9d4d91f7c3e9011cda", "1b16dc85e01ac96b02a384a307925005a471b2e2" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 08:57:58 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 08:57:58 2025 +0000" }, "message": "Merge changes Ieecc41dd,Ie59361dd\n\n* changes:\n feat(rme): add dev mem map/unmap tests\n feat(rme): add dev granules tests\n" }, { "commit": "1b16dc85e01ac96b02a384a307925005a471b2e2", "tree": "56be81714e31b82397012a6203f28a17bbb203d4", "parents": [ "718fd7902c015a64b49b12dcb6005d1aa50fd72e" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Tue Jan 14 11:40:18 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Jun 12 23:30:01 2025 +0100" }, "message": "feat(rme): add dev mem map/unmap tests\n\n- Add tests for RMI_DEV_MEM_MAP and\nRMI_DEV_MEM_UNMAP commands as per RMM Specification 1.1-alp12.\n- Add RNDR and RNDRRS registers\u0027 definitions.\n- Redefine RNDR and RNDRRS read functions as:\nDEFINE_RENAME_SYSREG_READ_FUNC(rndr, RNDR)\nDEFINE_RENAME_SYSREG_READ_FUNC(rndrrs, RNDRRS)\n\nChange-Id: Ieecc41dd6d3011bb63101bc38d527a8f57e0ef4a\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "718fd7902c015a64b49b12dcb6005d1aa50fd72e", "tree": "6be817fbd9b1073bdd876b527e31e06e45b8a782", "parents": [ "5032d7bc760128a07ace8c9d4d91f7c3e9011cda" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Fri Nov 08 14:55:20 2024 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Jun 12 22:45:11 2025 +0100" }, "message": "feat(rme): add dev granules tests\n\nAdd tests for RMI_GRANULE_DELEGATE and\nRMI_GRANULE_UNDELEGATE commands using\ndevice granules.\nAdd plat_get_dev_region() function to\nretrieve platform PCIe memory region info.\n\nChange-Id: Ie59361dd28e11db348c30b033c156de044aa0ffc\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "ea34abf73d6405cd870fe1f1ff46268b635f51d6", "tree": "2daf50e3f07248fad9165858eab605c46fff20b7", "parents": [ "5032d7bc760128a07ace8c9d4d91f7c3e9011cda" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu Jun 12 10:11:03 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu Jun 12 14:01:28 2025 +0000" }, "message": "fix(realm): add missing size definitions for Juno\n\nFixes compilation failure for Juno targets by ensuring the necessary\nsize definitions from `common_def.h` are included. This resolves build\nerrors even when the tests are not executed. These tests dynamically\ncheck whether RME is enabled on a platform and run conditionally. As\npart of the standard test suite, the source files cannot be excluded\nfrom the TFTF build due to their automatic generation in the test list.\nThis change ensures that the tests compile successfully for Juno.\n\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\nChange-Id: I001a89108c6962a37b24bd3f17e68010a161aaca\n" }, { "commit": "a1fe738b1fd6212d92e20a408a0110778276732b", "tree": "ad9028b4524278c1b14628871964c46a72e564b8", "parents": [ "5032d7bc760128a07ace8c9d4d91f7c3e9011cda" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Fri Apr 25 20:45:17 2025 +0100" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Fri Jun 06 17:53:31 2025 +0100" }, "message": "feat(rme): test access outside PAR from Plane N\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I3c5069e14fdf27e6c36bd1e0651ceff4ee7396ef\n" }, { "commit": "5032d7bc760128a07ace8c9d4d91f7c3e9011cda", "tree": "71bc4e65a7e7823c5380086a31cb9ba5cd25e575", "parents": [ "5f1c41402b7afbd6de4979981124d5e1e76ecb32", "d5d19aec170e5eb931d1bf71ece212814181df1a" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Jun 05 20:23:12 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Jun 05 20:23:12 2025 +0000" }, "message": "Merge \"docs(fuzz): Adding fuzzing documentation\"" }, { "commit": "5f1c41402b7afbd6de4979981124d5e1e76ecb32", "tree": "c9dd553669e6432c4b35fee67ecd59a0fbda3876", "parents": [ "bb64f248781aeb51b5b628298241dd5750fedf6c", "ba6ef4f4426da1aa17f76a1b8f914b53aaeb6d34" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Tue Jun 03 21:36:22 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Jun 03 21:36:22 2025 +0000" }, "message": "Merge \"test(fwu): validate scenario of invalid FWU IMAGE SIZE\"" }, { "commit": "ba6ef4f4426da1aa17f76a1b8f914b53aaeb6d34", "tree": "f9c5c334b18e4bc1ddd30b2d03c0053d17906103", "parents": [ "0c8bf6445cdd41d08d1b926160d2f66b3312f12b" ], "author": { "name": "Thaddeus Gonzalez-Serna", "email": "Thaddeus.Gonzalez-Serna@arm.com", "time": "Tue May 13 14:54:41 2025 -0500" }, "committer": { "name": "Thaddeus Gonzalez-Serna", "email": "Thaddeus.Gonzalez-Serna@arm.com", "time": "Mon Jun 02 09:46:51 2025 -0500" }, "message": "test(fwu): validate scenario of invalid FWU IMAGE SIZE\n\nTest to increase code coverage in bl1 directory where\nbl2 and bl2u are both corrupt with invalid image sizes\n\nbl1_fwu.c cc% improved by 10%\nbl1_main.c cc% imporved by 1%\n\nChange-Id: I4637a9e566e4edda8474da37ea4f3511fa32b6a7\nSigned-off-by: Thaddeus Gonzalez-Serna \u003cThaddeus.Gonzalez-Serna@arm.com\u003e\n" }, { "commit": "bb64f248781aeb51b5b628298241dd5750fedf6c", "tree": "07f928898eb9fc855b85015fcc64b01554dd8937", "parents": [ "0c8bf6445cdd41d08d1b926160d2f66b3312f12b", "6150f5ff0687d4ee35f1e69b9ac33c5e98f047d0" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jun 02 11:30:36 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jun 02 11:30:36 2025 +0000" }, "message": "Merge \"fix(realm_payload): skip test setting invalid SVE VL\"" }, { "commit": "d5d19aec170e5eb931d1bf71ece212814181df1a", "tree": "32e354ad1d0fe581bad8ad050f6d2b0b489a1201", "parents": [ "9d84ad1ceb8256e942213537602c6434577b7bc0" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Wed Apr 23 15:13:28 2025 -0500" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu May 29 17:27:05 2025 -0500" }, "message": "docs(fuzz): Adding fuzzing documentation\n\nInitial fuzzing documentation added. Demonstrates the concept\nand usage of the SMC fuzzing tool incorporated into TF-A tests.\n\nChange-Id: Iefda90c108ded205edcd7665d40855ab19b4d475\nSigned-off-by: Mark Dykes \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "0c8bf6445cdd41d08d1b926160d2f66b3312f12b", "tree": "bb4eeb428aeab6f88ea1aaeaa64fbc44ef28d9c9", "parents": [ "86cb7f1297450971b484db64e025ea273981371f", "f44772a0fd26dd270f69650dc5775ca4c00da446" ], "author": { "name": "Sandrine Afsa", "email": "sandrine.afsa@arm.com", "time": "Wed May 28 07:34:42 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed May 28 07:34:42 2025 +0000" }, "message": "Merge \"fix(smc): update vendor el3 minor version\"" }, { "commit": "f44772a0fd26dd270f69650dc5775ca4c00da446", "tree": "bb4eeb428aeab6f88ea1aaeaa64fbc44ef28d9c9", "parents": [ "86cb7f1297450971b484db64e025ea273981371f" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed May 28 00:39:17 2025 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed May 28 01:11:30 2025 -0500" }, "message": "fix(smc): update vendor el3 minor version\n\nWith addition of acs handler to TF-A vendor el3 minor version\nwas updated.\n\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\nChange-Id: Ic03e25d1a45fdf2e701b4b11db6a456435a227e5\n" }, { "commit": "6150f5ff0687d4ee35f1e69b9ac33c5e98f047d0", "tree": "e9f474b713cf42a582fe13a4c4078c8bb348896d", "parents": [ "20cf8511436b51d6ad4d0db246d23c470391c1ba" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed May 21 13:11:35 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu May 22 15:05:20 2025 +0000" }, "message": "fix(realm_payload): skip test setting invalid SVE VL\n\nSkip host_sve_realm_test_invalid_vl() test which creates\nRealm with invalid SVE VL in case when RMM reports maximum\narchitecturally supported value.\n\nChange-Id: I9ab1d4d500db03027917d4a2769e91260cc00d44\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "86cb7f1297450971b484db64e025ea273981371f", "tree": "c3fab88bcddb573a4a9465dc593a36e585b624c8", "parents": [ "fa267c12f9aa790b43b38d171273cf63892e8d51", "20cf8511436b51d6ad4d0db246d23c470391c1ba" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu May 22 15:03:36 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu May 22 15:03:36 2025 +0000" }, "message": "Merge changes I005a85aa,Iee195836\n\n* changes:\n fix(realm): add missing realm_printf() parameters\n fix(realm_payload): correct error messages\n" }, { "commit": "20cf8511436b51d6ad4d0db246d23c470391c1ba", "tree": "c3fab88bcddb573a4a9465dc593a36e585b624c8", "parents": [ "37fa6b9d4f0f059ec81f163bc230fa3598ef43c1" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Tue May 20 14:37:22 2025 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed May 21 16:31:17 2025 +0000" }, "message": "fix(realm): add missing realm_printf() parameters\n\nAdd missing parameters in test_realm_reject_set_ripas()\nfor realm_printf() call.\n\nChange-Id: I005a85aaa60253fcd1c2e47bf34cf4c80083411f\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "37fa6b9d4f0f059ec81f163bc230fa3598ef43c1", "tree": "f0acef78bd6752927910c90bb397e2694b8c206e", "parents": [ "fa267c12f9aa790b43b38d171273cf63892e8d51" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Mon May 19 14:54:12 2025 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed May 21 16:31:11 2025 +0000" }, "message": "fix(realm_payload): correct error messages\n\nCorrect messages for host_realm_fold_rtt()\nand host_rmi_rtt_readentry() functions in\ncase of errors.\n\nChange-Id: Iee19583698fe93bafb66d6b7ccf7ec938585560f\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "fa267c12f9aa790b43b38d171273cf63892e8d51", "tree": "923258b2252c15b5761c58d8efb1416aaa9c001c", "parents": [ "8a1865cbea3d8fe8bcfcabf1d0c6f3ce3fe38888", "0ed12509aff10b80a4f4092f4a44be81f645a48b" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed May 21 09:46:44 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed May 21 09:46:44 2025 +0000" }, "message": "Merge \"docs(release): changelog for v2.13 release\"" }, { "commit": "0ed12509aff10b80a4f4092f4a44be81f645a48b", "tree": "923258b2252c15b5761c58d8efb1416aaa9c001c", "parents": [ "8a1865cbea3d8fe8bcfcabf1d0c6f3ce3fe38888" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri May 09 08:51:02 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu May 15 10:23:15 2025 +0000" }, "message": "docs(release): changelog for v2.13 release\n\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\nChange-Id: I7247f50f336dfcfbe62308bd4b6721bc8f9a9fd4\n" }, { "commit": "8a1865cbea3d8fe8bcfcabf1d0c6f3ce3fe38888", "tree": "9a2de9f397be327092dbbf17e6ab1a86ff4b2678", "parents": [ "5ab09e8174e1ec17d6b1c35483f268e0775a5b67", "d72394d0965829a319701247ac8522c365f9e55d" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Fri May 02 12:09:20 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 02 12:09:20 2025 +0000" }, "message": "Merge changes from topic \"xlnx_versal2_tftf_base\"\n\n* changes:\n fix(versal2): update test skip list\n fix(versal2): update tftf and uart base address\n" }, { "commit": "5ab09e8174e1ec17d6b1c35483f268e0775a5b67", "tree": "3be81b31149a1c413293061bd39d41c94d2416e6", "parents": [ "060efe97ff6c31b7dbec96af9fde0b169db4183d", "089c9ad705c1f393d95dd911c76a6772af45d1fd" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Mon Apr 28 17:47:34 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Apr 28 17:47:34 2025 +0200" }, "message": "Merge changes from topic \"hm/handoff-mb\"\n\n* changes:\n feat(handoff): add event log test\n feat(measured-boot): add measured boot drivers\n" }, { "commit": "d72394d0965829a319701247ac8522c365f9e55d", "tree": "506d71bf4de98babd4f0a3ee9ac8d2528814d2f8", "parents": [ "7692564d4e05affc177c245884ca160fca57a3ef" ], "author": { "name": "Maheedhar Bollapalli", "email": "maheedharsai.bollapalli@amd.com", "time": "Wed Apr 23 10:51:15 2025 +0530" }, "committer": { "name": "Maheedhar Bollapalli", "email": "maheedharsai.bollapalli@amd.com", "time": "Mon Apr 28 08:20:26 2025 +0000" }, "message": "fix(versal2): update test skip list\n\nSkipping tests related to invalid entry addresses and system suspend\nwith cores suspended. This will continue until the implementation in\nTF-A is completed to properly handle invalid entry addresses and\nresolve system suspend failures.\nAdditionally, skipping tests for FFA Group0 in the normal world since\nFFA support is not available.\n\nChange-Id: Icc62f563ffb0321f7cdc2e7399a3c3b6c908d778\nSigned-off-by: Maheedhar Bollapalli \u003cmaheedharsai.bollapalli@amd.com\u003e\n" }, { "commit": "7692564d4e05affc177c245884ca160fca57a3ef", "tree": "4efc4526184a55be45988545ff43e6dc0ba70865", "parents": [ "060efe97ff6c31b7dbec96af9fde0b169db4183d" ], "author": { "name": "Maheedhar Bollapalli", "email": "maheedharsai.bollapalli@amd.com", "time": "Wed Apr 23 10:37:01 2025 +0530" }, "committer": { "name": "Maheedhar Bollapalli", "email": "maheedharsai.bollapalli@amd.com", "time": "Mon Apr 28 08:20:22 2025 +0000" }, "message": "fix(versal2): update tftf and uart base address\n\nUpdate TFTF base address as per new DDR address map along\nwith default console base address set to Uart1.\n\nChange-Id: I4dddee2e01984a4fcef1d86ad9a92aff3baaa961\nSigned-off-by: Maheedhar Bollapalli \u003cmaheedharsai.bollapalli@amd.com\u003e\n" }, { "commit": "089c9ad705c1f393d95dd911c76a6772af45d1fd", "tree": "1842ee9a2fabfe773b56c98a76bb7e831b26b5a0", "parents": [ "b674809e4d937d44f85ef53aa2bdbb9f74b569b2" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri Apr 25 16:03:54 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri Apr 25 16:09:37 2025 +0000" }, "message": "feat(handoff): add event log test\n\nAdds a new TFTF test to validate presence and correctness of the TPM\nevent log in the transfer list received from EL3. Uses event_log_dump to\nparse and output log data.\n\nChange-Id: I0b1f782429e4bfe3d1760fce52d40a9836dc27a2\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "b674809e4d937d44f85ef53aa2bdbb9f74b569b2", "tree": "3192a0624448d4503cb3679f0d939cb7c169ac22", "parents": [ "19620adc7cbcae26cc432a28a9c3b0944957cf13" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri Apr 25 16:03:03 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri Apr 25 16:09:25 2025 +0000" }, "message": "feat(measured-boot): add measured boot drivers\n\nIntroduces core measured boot support, including TPM event log handling,\nhashing infrastructure, and event formatting per TCG spec. The driver is\nimported from the existing implementation in TF-A.\n\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\nChange-Id: Ib2e6a88c86f110f9a6907c3e6dbb0dc736486de9\n" }, { "commit": "060efe97ff6c31b7dbec96af9fde0b169db4183d", "tree": "bc0e18f218d5facba2ae30222dad21bc7f5f3bbd", "parents": [ "336f1c20beba190b912a83756ca91626b2860c14", "2230a5955d328b4a018e72163482690892f5ff59" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Apr 25 16:18:55 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 25 16:18:55 2025 +0200" }, "message": "Merge changes from topic \"fix_pmuv3p9_test\"\n\n* changes:\n feat(ras): add RAS system registers access test\n fix(smccc): availability test: add two features and fix TRNDR\n" }, { "commit": "336f1c20beba190b912a83756ca91626b2860c14", "tree": "9e8bc8ed7479036cf408fa4e88ea354a007ca817", "parents": [ "19620adc7cbcae26cc432a28a9c3b0944957cf13", "06de4bf32ac7a605946ed6af1ea2c51756fc43c4" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Apr 25 16:17:17 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 25 16:17:17 2025 +0200" }, "message": "Merge \"fix(pauth): test an actual ARMv8.3 PointerAuth instruction\"" }, { "commit": "19620adc7cbcae26cc432a28a9c3b0944957cf13", "tree": "aab0fcf5b25e67b5873ec6b69b479aae7a998c3c", "parents": [ "6186cf96b9713be1a7cb7badd7166203b6145793", "2373cbb8ace3d400d2bd0f336507219ae926ae36" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Wed Apr 23 11:58:13 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Apr 23 11:58:13 2025 +0200" }, "message": "Merge \"fix(versal-net): check ttc irq status\"" }, { "commit": "6186cf96b9713be1a7cb7badd7166203b6145793", "tree": "b003e74f5d98b31f0581a3d85f7babcad255aedd", "parents": [ "aeb5c5ccb10a569c258d2b3e24841da4d234d3df", "6cd8b7d4a7d4d2177f5b51827e9d75321e2a9f90" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Apr 22 17:45:33 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 22 17:45:33 2025 +0200" }, "message": "Merge \"test(trp): test el3-rmm ide km interface\"" }, { "commit": "2373cbb8ace3d400d2bd0f336507219ae926ae36", "tree": "63bc19ed2f7bca762ae165804feba211391d3697", "parents": [ "aeb5c5ccb10a569c258d2b3e24841da4d234d3df" ], "author": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Tue Apr 01 15:18:18 2025 +0530" }, "committer": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Mon Apr 21 12:16:51 2025 +0530" }, "message": "fix(versal-net): check ttc irq status\n\nContinuous interrupts are observed after cancel timer operation\nas proper cleanup is not done in cancel timer routine.\nProvide proper cleanup in cancel timer routine by reading the\nttc interrupt status register for cause of interrupt and disabling\nthe ttc counter by setting bit 0 in ttc counter control register.\nValue of per-cpu hypervisor timer interrupt id is set to 26 in\naccordance with arm documentation and reference for same is present in\narm juno and nvidia settings.\n\nChange-Id: I4f19314deaec9fa05b6fcbe04d0192e3c2a1a772\nSigned-off-by: Amit Nagal \u003camit.nagal@amd.com\u003e\n" }, { "commit": "aeb5c5ccb10a569c258d2b3e24841da4d234d3df", "tree": "6d08225409590233f1757d2c32d08220df9300a3", "parents": [ "d06a6f50017d79d67be8c8742ad578963a089024", "b319e455fb8cdaf24d5623cb0617dd496839bb95" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Wed Apr 16 12:26:41 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Apr 16 12:26:41 2025 +0200" }, "message": "Merge changes from topic \"shewan01/tftf-nrd1-deprecation\"\n\n* changes:\n feat(neoverse_rd): deprecate and remove NRD1 platform includes\n feat(neoverse_rd): deprecate and remove RD-V1 platform variants\n feat(neoverse_rd): deprecate and remove RD-N1-Edge platform variants\n feat(neoverse_rd): deprecate and remove SGI-575 platform\n" }, { "commit": "b319e455fb8cdaf24d5623cb0617dd496839bb95", "tree": "6d08225409590233f1757d2c32d08220df9300a3", "parents": [ "5179144894ba1c30dfa6befc90eaac8b93839840" ], "author": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Tue Apr 15 11:36:56 2025 +0100" }, "committer": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Wed Apr 16 09:53:05 2025 +0100" }, "message": "feat(neoverse_rd): deprecate and remove NRD1 platform includes\n\nAs NRD1 platforms have been removed, remove common includes for\nNRD1 platforms.\n\nChange-Id: I0805fc135837b2257b51d9a21dd678178b5df8e2\nSigned-off-by: Jerry Wang \u003cJerry.Wang4@arm.com\u003e\n" }, { "commit": "5179144894ba1c30dfa6befc90eaac8b93839840", "tree": "aeacb613100d73dd07d647398ca0cb6d520af6ff", "parents": [ "dc4235a917f6e7b4981a5de027e05f2bc8875d4d" ], "author": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Tue Apr 15 11:34:50 2025 +0100" }, "committer": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Wed Apr 16 09:52:57 2025 +0100" }, "message": "feat(neoverse_rd): deprecate and remove RD-V1 platform variants\n\ndeprecate and remove support for RD-V1 and RD-V1-MC platform variants.\n\nSigned-off-by: Jerry Wang \u003cJerry.Wang4@arm.com\u003e\nChange-Id: I59003ae3a6b3ea0f603f3282c31efc37d312e1fd\n" }, { "commit": "dc4235a917f6e7b4981a5de027e05f2bc8875d4d", "tree": "2c99e6ab6fe0d92af43331cb79ec58b36355fbfb", "parents": [ "d685f8cfd3cf66a64e2afa0f36a217f7f1a461e0" ], "author": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Tue Apr 15 11:34:22 2025 +0100" }, "committer": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Wed Apr 16 09:52:48 2025 +0100" }, "message": "feat(neoverse_rd): deprecate and remove RD-N1-Edge platform variants\n\ndeprecate and remove support for RD-N1-Edge and RD-N1-Edgex2 platform\nvariants.\n\nSigned-off-by: Jerry Wang \u003cJerry.Wang4@arm.com\u003e\nChange-Id: I2b00f3550c8ef0f4d80236d856d644762881eba3\n" }, { "commit": "d685f8cfd3cf66a64e2afa0f36a217f7f1a461e0", "tree": "e91b03d14edc19304132d85ded19ea1aad2087df", "parents": [ "d06a6f50017d79d67be8c8742ad578963a089024" ], "author": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Tue Apr 15 11:30:08 2025 +0100" }, "committer": { "name": "Jerry Wang", "email": "Jerry.Wang4@arm.com", "time": "Wed Apr 16 09:52:38 2025 +0100" }, "message": "feat(neoverse_rd): deprecate and remove SGI-575 platform\n\ndeprecate and remove support for SGI-575 platform.\n\nSigned-off-by: Jerry Wang \u003cJerry.Wang4@arm.com\u003e\nChange-Id: Ia86236155c3185991841ebd05851ac0bfb84ada2\n" }, { "commit": "d06a6f50017d79d67be8c8742ad578963a089024", "tree": "51a91085b7eaabda482d15ae21b9f3e8f846d89d", "parents": [ "caafd5d6e5f6ac5e8760da20ec9d44bfbc016c90", "b33efce3672b335803a1a2ed4a279640b6deb00f" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Fri Apr 11 19:20:11 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 11 19:20:11 2025 +0200" }, "message": "Merge \"docs: update toolchain requirements to 14.2.Rel1\"" }, { "commit": "caafd5d6e5f6ac5e8760da20ec9d44bfbc016c90", "tree": "e46a2cbaba245a68f17c37e32af0df852c331705", "parents": [ "f6f797b92f41b6850a8289e279c55c6f30563ec4", "112498c703d48dceea63fe7ab88a8b243513e7e8" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Thu Apr 10 18:28:26 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Apr 10 18:28:26 2025 +0200" }, "message": "Merge \"feat(handoff): add AArch32 handoff support\"" }, { "commit": "6cd8b7d4a7d4d2177f5b51827e9d75321e2a9f90", "tree": "8f0136a08fbd66642f159d206ac71c65ea6b2bb4", "parents": [ "118652bf8a430b3085b9b79c589e12d8f80c1113" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Mon Mar 31 17:14:46 2025 -0500" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Apr 10 14:54:10 2025 +0200" }, "message": "test(trp): test el3-rmm ide km interface\n\nThis patch introduces a new test function that invokes\nPDEV_CREATE on TRP and tests the RMM-EL3 IDE KM interface\nimplemented in EL3.\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: Ib7e9e769191f94927b55b099a8c80d40ffc2a756\n" }, { "commit": "112498c703d48dceea63fe7ab88a8b243513e7e8", "tree": "e46a2cbaba245a68f17c37e32af0df852c331705", "parents": [ "f6f797b92f41b6850a8289e279c55c6f30563ec4" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Feb 18 11:52:12 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu Apr 10 09:56:36 2025 +0000" }, "message": "feat(handoff): add AArch32 handoff support\n\nAdd support for testing firmware handoff in AArch32 mode. This requires\nsome tweaks to enable the boot args from TF-A to be stashed for later\nuse.\n\nChange-Id: Ib1b88688b6229b10020c936319605c7ed6307ca2\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "f6f797b92f41b6850a8289e279c55c6f30563ec4", "tree": "52c27c14788dcd39671f0643f7ea92d107adeb7d", "parents": [ "118652bf8a430b3085b9b79c589e12d8f80c1113", "a1709e0063b271f723790ce9f74a6b2afd2760c4" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Thu Apr 10 09:50:52 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Apr 10 09:50:52 2025 +0200" }, "message": "Merge \"fix(sme): synchronize context before using it\"" }, { "commit": "118652bf8a430b3085b9b79c589e12d8f80c1113", "tree": "bcd5345a199468d52c44de61e38b43c6e675664b", "parents": [ "6d9e106780746a3248901b93f9a334d28eef4e5e", "69a9c4027085d4331f54aa1cc753626749812168" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Tue Apr 08 20:50:56 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 08 20:50:56 2025 +0200" }, "message": "Merge \"feat(mbedtls): update mbedtls to version 3.6.3\"" }, { "commit": "69a9c4027085d4331f54aa1cc753626749812168", "tree": "bcd5345a199468d52c44de61e38b43c6e675664b", "parents": [ "6d9e106780746a3248901b93f9a334d28eef4e5e" ], "author": { "name": "Lauren Wehrmeister", "email": "lauren.wehrmeister@arm.com", "time": "Mon Apr 07 13:18:19 2025 -0500" }, "committer": { "name": "Lauren Wehrmeister", "email": "lauren.wehrmeister@arm.com", "time": "Mon Apr 07 13:20:33 2025 -0500" }, "message": "feat(mbedtls): update mbedtls to version 3.6.3\n\nUpdate additional mbedtls submodule to version 3.6.3.\n\nSigned-off-by: Lauren Wehrmeister \u003clauren.wehrmeister@arm.com\u003e\nChange-Id: I69814f9a5e7e0c260169111a7ec1dd42dbc3679c\n" }, { "commit": "a1709e0063b271f723790ce9f74a6b2afd2760c4", "tree": "a695a04db22a4bbf49be39a4ba665f893d73f3ad", "parents": [ "6d9e106780746a3248901b93f9a334d28eef4e5e" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Apr 07 09:41:26 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Apr 07 16:00:17 2025 +0100" }, "message": "fix(sme): synchronize context before using it\n\nWe need to wait for the write to cptr_el2 to take effect to consider SME\nenabled. Otherwise, the write to smcr_el2 may fault. Add an isb() to\nsynchronize this.\n\nChange-Id: Ib1fb1803bad2d4fb9e89bc4861e2e611b9882b2e\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "6d9e106780746a3248901b93f9a334d28eef4e5e", "tree": "f94fbed4d910a3688fa888f5452a337c38b0fb3b", "parents": [ "0de678ef3e7136af91b314c893030311741a7f80", "d5bb5f6c82f7ebcf28dccbbfad058e27e207c14f" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Fri Apr 04 20:16:58 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 04 20:16:58 2025 +0200" }, "message": "Merge \"feat(mbedtls): update mbedtls to version 3.6.3\"" }, { "commit": "06de4bf32ac7a605946ed6af1ea2c51756fc43c4", "tree": "237951fe262707336610b6d026fea666360df891", "parents": [ "0de678ef3e7136af91b314c893030311741a7f80" ], "author": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Fri Apr 04 13:29:35 2025 +0100" }, "committer": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Fri Apr 04 17:27:06 2025 +0100" }, "message": "fix(pauth): test an actual ARMv8.3 PointerAuth instruction\n\nThe PAuth instruction test promises to test instructions associated with\nFEAT_PAUTH, though actually just issues those that are located in the\nNOP space, so would always execute, even on machines without FEAT_PAUTH.\n\nReplace them with one instruction that is newly defined by FEAY_PAUTH,\nand that would trigger an UNDEF abort if not implemented or would trap\nto EL3 unless SCR_EL3.API is set.\n\nChange-Id: Iece2c60af40800450dadf5b2db609c35cfa6cf95\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\n" }, { "commit": "b33efce3672b335803a1a2ed4a279640b6deb00f", "tree": "c066ccd58e5e45c4367333b61fc7b2d55cc0c0f5", "parents": [ "0de678ef3e7136af91b314c893030311741a7f80" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Fri Apr 04 15:55:24 2025 +0100" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Fri Apr 04 15:56:16 2025 +0100" }, "message": "docs: update toolchain requirements to 14.2.Rel1\n\nTF-A tests have been validated with toolchain version 14.2.Rel1.\nUpdate documentation to reflect this as the current supported version.\n\nChange-Id: I304a0ce11cab23c5047c9ed772fd53af58a21ac7\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\n" }, { "commit": "0de678ef3e7136af91b314c893030311741a7f80", "tree": "03cc016c0059ab0d53ba9880a008a78634a0febe", "parents": [ "a864222f08cc068d6659fa3bedbe322578513d60", "11e574835b289bc3c9742d76ea697a53023527bc" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Apr 04 15:40:59 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 04 15:40:59 2025 +0200" }, "message": "Merge changes from topic \"mp/cpu_off_broadcast\"\n\n* changes:\n test: deny prohibited ABIs while handling CPU_OFF psci msg\n feat: add build flag to control support for CPU_OFF psci msg\n feat(cactus): receive psci msg through direct req framework msg\n" }, { "commit": "a864222f08cc068d6659fa3bedbe322578513d60", "tree": "c1db5fe9b4ca52ca86fcaf77ac45c89e404187bd", "parents": [ "78fb528d0e2ecb53c533f6accf0da1f90d289353", "de873bbd54a58f751553ebd42b302a348ca342a7" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Apr 04 11:57:53 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 04 11:57:53 2025 +0200" }, "message": "Merge \"fix(rme): fix position of RTT_S2AP_INDIRECT bit in RmiFeatureRegister0\"" }, { "commit": "d5bb5f6c82f7ebcf28dccbbfad058e27e207c14f", "tree": "16cd4e4315d2b0f0599a93746efee17eddba924e", "parents": [ "78fb528d0e2ecb53c533f6accf0da1f90d289353" ], "author": { "name": "Lauren Wehrmeister", "email": "lauren.wehrmeister@arm.com", "time": "Thu Apr 03 12:49:06 2025 -0500" }, "committer": { "name": "Lauren Wehrmeister", "email": "lauren.wehrmeister@arm.com", "time": "Thu Apr 03 14:10:06 2025 -0500" }, "message": "feat(mbedtls): update mbedtls to version 3.6.3\n\nSigned-off-by: Lauren Wehrmeister \u003clauren.wehrmeister@arm.com\u003e\nChange-Id: I4bfb546c351c30a6fc4d22f29bc03efad316df7d\n" }, { "commit": "de873bbd54a58f751553ebd42b302a348ca342a7", "tree": "c1db5fe9b4ca52ca86fcaf77ac45c89e404187bd", "parents": [ "78fb528d0e2ecb53c533f6accf0da1f90d289353" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Apr 03 11:02:36 2025 +0100" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Apr 03 11:02:36 2025 +0100" }, "message": "fix(rme): fix position of RTT_S2AP_INDIRECT bit in RmiFeatureRegister0\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I514368fe64834324fd4ea2b98e9b175dba20288c\n" }, { "commit": "11e574835b289bc3c9742d76ea697a53023527bc", "tree": "4671e58c1aef29334f69dec38de3b4ded5aa05ed", "parents": [ "a2b6b37ed6eaf7d0f9dfc12a04499863b25cf559" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Mar 28 11:46:16 2025 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Apr 01 13:19:18 2025 -0500" }, "message": "test: deny prohibited ABIs while handling CPU_OFF psci msg\n\nFF-A spec states that SPs are prohibited from invoking Direct request,\nFFA_RUN and FFA_YIELD interfaces while handling power management\nframework message. Make the Cactus SP intentionally invoke prohibited\ninterfaces and attest that SPMC should deny such invocations.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I0a823bf950e3895cb4aff7320c6a0ef7fdec634b\n" }, { "commit": "a2b6b37ed6eaf7d0f9dfc12a04499863b25cf559", "tree": "0aed9c7638a65d443bdfaf6c38639184085d1d55", "parents": [ "611d095453cf001e436f795ac8209b27f46a2fdb" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Feb 11 15:39:32 2025 -0600" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Apr 01 13:19:15 2025 -0500" }, "message": "feat: add build flag to control support for CPU_OFF psci msg\n\nPlease check the inline comments for detailed description of the\nnew build flag. This flag will help us to create a negative test\nscenario where we can exercise sending DENIED response to SPMC,\nultimately leading to a panic by SPMD.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I30d2ea7f3fbf09e4e4febceb85f045e25f3e6035\n" }, { "commit": "611d095453cf001e436f795ac8209b27f46a2fdb", "tree": "2435b48f94395c106adc5529e5031ccd92ca3197", "parents": [ "78fb528d0e2ecb53c533f6accf0da1f90d289353" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Jan 31 16:07:08 2025 -0600" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Apr 01 13:07:09 2025 -0500" }, "message": "feat(cactus): receive psci msg through direct req framework msg\n\nCactus receives PSCI CPU_OFF power management operation message\nthrough framework direct request message and it will respond back\nwith framework direct message if all conditions are met.\n\nCactus SP1 and SP2 explicitly subscribe to CPU_OFF power management\nmessage through their respective manifests.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I790a8698d238e29847e376b4fa9447a6241ef17e\n" }, { "commit": "78fb528d0e2ecb53c533f6accf0da1f90d289353", "tree": "c95b395d55d04f234c968909d6483fb356c8f251", "parents": [ "677708401f13bfa0c9d974aff8e3db3f67b77c5a", "a35c1db92b51bb785acef300975919bbb0a69aca" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Apr 01 14:51:10 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 01 14:51:10 2025 +0200" }, "message": "Merge \"fix(tests): undelegate pdev granules if DA ABI fails\"" }, { "commit": "a35c1db92b51bb785acef300975919bbb0a69aca", "tree": "c95b395d55d04f234c968909d6483fb356c8f251", "parents": [ "677708401f13bfa0c9d974aff8e3db3f67b77c5a" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Apr 01 12:14:25 2025 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Apr 01 12:14:25 2025 +0100" }, "message": "fix(tests): undelegate pdev granules if DA ABI fails\n\nIn host_tdi_pdev_setup undelegate pdev and aux granules upon error\nso that the next testcase in the list doesn\u0027t encounter failure.\n\nThis issue is seen when RMM is build with RMM_V1_1\u003dON and DA ABI\nSMC_RMI_PDEV_AUX_COUNT fails.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I97614dbe7c41b89ff8b72db8cfb178d3c6067249\n" }, { "commit": "677708401f13bfa0c9d974aff8e3db3f67b77c5a", "tree": "9aa226627feb27c793ecb2894519550e18dadfd5", "parents": [ "41567dc5c36eb7cb0c621cc801e99543e95093b3", "8205a64846d581937e77919a9fe858db53324a84" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Mon Mar 31 16:28:02 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Mar 31 16:28:02 2025 +0200" }, "message": "Merge changes from topic \"km/ffa_features\"\n\n* changes:\n refactor: refactor `get_ffa_feature_test_target`\n refactor: use an enum for FF-A errors\n" }, { "commit": "8205a64846d581937e77919a9fe858db53324a84", "tree": "77b786526b95ab4219225966828b847eaf2546ab", "parents": [ "af77b16df26371cf954fd410359f55981683d1ea" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Jun 19 15:05:19 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Mar 31 11:43:01 2025 +0100" }, "message": "refactor: refactor `get_ffa_feature_test_target`\n\nChange `get_ffa_feature_test_target` to return a `size_t` instead of an\n`unsigned int`, because `size_t` is the return type of operators like\n`sizeof()`.\n\nChange `get_ffa_feature_test_target` to require its argument to be\nnon-null (and assert that it is). This function is only used for getting\nthe array of features to test, so there is no use case where passing a\nnon-null pointer would make sense.\n\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\nChange-Id: I33597f1a2f7681eda59ece08062e48c28752c111\n" }, { "commit": "af77b16df26371cf954fd410359f55981683d1ea", "tree": "620d8dae4e9d64c4001962eb05ee89b677b08ca8", "parents": [ "e3d37e5ce098a4fa5561cdbeb4c702c5164c39a6" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Jun 19 10:44:54 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Mar 31 11:43:01 2025 +0100" }, "message": "refactor: use an enum for FF-A errors\n\nChange-Id: Id30f36840e0668daa152ab90a2559fade7883c5f\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "41567dc5c36eb7cb0c621cc801e99543e95093b3", "tree": "1d0620e5b07b525e656d82ea22e7aefedba7f6a7", "parents": [ "8993e8ec7c66a849dad48f7b57e866cc40de3191", "43ad50d798007af9d607898597d30bf215d3aa05" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Mar 31 11:35:55 2025 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Mar 31 11:35:55 2025 +0200" }, "message": "Merge \"feat(rme): update FEAT_MPAM tests on Realms\"" }, { "commit": "43ad50d798007af9d607898597d30bf215d3aa05", "tree": "1d0620e5b07b525e656d82ea22e7aefedba7f6a7", "parents": [ "8993e8ec7c66a849dad48f7b57e866cc40de3191" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Fri Mar 28 17:37:04 2025 +0000" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Fri Mar 28 17:47:36 2025 +0000" }, "message": "feat(rme): update FEAT_MPAM tests on Realms\n\nCurrently, to test that accessing a FEAT_MPAM register from a Realm\ncauses an undefined abort injected back to the Realm, we only test\nby accessing a single register.\n\nThis patches updates the test by trying to access all MPAM registers\nfrom the Realm to validate that an undefined abort is taken to the\nRealm for all the registers.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I16c88d467eb2a49342694536a1c7b6358416dc34\n" }, { "commit": "8993e8ec7c66a849dad48f7b57e866cc40de3191", "tree": "891b504323eff7bb91489d10ae33ed84613a15c3", "parents": [ "ab680e816552ea29184084482fdf63e2f94cd46a", "2ba1e7812b494abdfb8f440a161f0ded24bee72a" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Mar 27 09:40:19 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Mar 27 09:40:19 2025 +0100" }, "message": "Merge \"fix(errata_abi): update Cortex-A710 errata list\"" }, { "commit": "2ba1e7812b494abdfb8f440a161f0ded24bee72a", "tree": "891b504323eff7bb91489d10ae33ed84613a15c3", "parents": [ "ab680e816552ea29184084482fdf63e2f94cd46a" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Wed Mar 26 16:50:18 2025 -0500" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Wed Mar 26 17:15:06 2025 -0500" }, "message": "fix(errata_abi): update Cortex-A710 errata list\n\nThis patch updates the out-of-date parameter of Cortex-A710\u0027s\n2058056 erratum in Errata ABI test.\n\nChange-Id: I194eb7fea0504b532c2e15710fbe4b455b7e631b\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "ab680e816552ea29184084482fdf63e2f94cd46a", "tree": "8e10eed6f9d1169da2c006f4d017ebe4dcafa4ea", "parents": [ "9d84ad1ceb8256e942213537602c6434577b7bc0", "2bd104e2fc8bdf1355ae88ad3e16af9773c1541f" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Mar 25 05:17:06 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Mar 25 05:17:06 2025 +0100" }, "message": "Merge \"fix(realm): Fix the LPA2 flag setting for BRBE test\"" }, { "commit": "2bd104e2fc8bdf1355ae88ad3e16af9773c1541f", "tree": "8e10eed6f9d1169da2c006f4d017ebe4dcafa4ea", "parents": [ "9d84ad1ceb8256e942213537602c6434577b7bc0" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Fri Mar 21 15:35:27 2025 -0500" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Mar 25 04:49:16 2025 +0100" }, "message": "fix(realm): Fix the LPA2 flag setting for BRBE test\n\nThis patch fixes the LPA2 flag setting for BRBE test.\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: Id7c53739cc92275a7018a44c2a3b8fdcf74ec25e\n" }, { "commit": "9d84ad1ceb8256e942213537602c6434577b7bc0", "tree": "f1069ac2c0ef008601b2892cae5960fba6665787", "parents": [ "e3d37e5ce098a4fa5561cdbeb4c702c5164c39a6", "fb96b980c85d916b55c78b7d22e5b6d8e086ca54" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Mar 12 14:54:30 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Mar 12 14:54:30 2025 +0100" }, "message": "Merge changes from topic \"kc/fuzz\"\n\n* changes:\n test(fuzz): add FF-A fuzzing\n test(fuzz): Fix single feature testing\n" }, { "commit": "fb96b980c85d916b55c78b7d22e5b6d8e086ca54", "tree": "2a4c319dd3761099924e160acca59d4075bf749d", "parents": [ "2b6c140b52790beebbb921dd0311efefb0bb0c5c" ], "author": { "name": "Kathleen Capella", "email": "katcap01@u203721.austin.arm.com", "time": "Thu Apr 25 17:09:33 2024 -0500" }, "committer": { "name": "Kathleen Capella", "email": "kathleen.capella@arm.com", "time": "Tue Mar 11 12:10:59 2025 -0500" }, "message": "test(fuzz): add FF-A fuzzing\n\nAdd necessary components for FF-A calls to be used in fuzzing framework\nincluding bias tree, `run_ffa_fuzz` helper function, makefile additions,\nand initial SMC description file with FF-A smc calls.\n\nCan use ffa_smc_calls.txt to generate necessary header files.\n\nSigned-off-by: Kathleen Capella \u003ckathleen.capella@arm.com\u003e\nChange-Id: Ib19714342d31cacd818471686a7e4c8910fed5c3\n" }, { "commit": "2230a5955d328b4a018e72163482690892f5ff59", "tree": "7ac3698bb9d614af35f74999fc42f4ffee5d7ee3", "parents": [ "37e3f3e1d237b6e8289fbc0a090b2b4dd2d4b9ec" ], "author": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Mon Mar 10 17:19:34 2025 +0000" }, "committer": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Mon Mar 10 17:30:44 2025 +0000" }, "message": "feat(ras): add RAS system registers access test\n\nFEAT_RAS introduces EL1 system registers to query error records, those\nCPU specific parts of the RAS extension can be accessed independently of\nany FFH/KFH handling setup or any system specific RAS implementation.\n\nAdd a test to verify that those registers can be read, when the CPUID\nfield advertises the MPAM (CPU) extension.\n\nChange-Id: I7429fc815e7e0ee0cd736603966969b2cfb5f469\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\n" }, { "commit": "37e3f3e1d237b6e8289fbc0a090b2b4dd2d4b9ec", "tree": "43448a6e0d637e635d482b1abf2144f0d7dda046", "parents": [ "e3d37e5ce098a4fa5561cdbeb4c702c5164c39a6" ], "author": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Fri Mar 07 17:25:24 2025 +0000" }, "committer": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Mon Mar 10 15:04:03 2025 +0000" }, "message": "fix(smccc): availability test: add two features and fix TRNDR\n\nThe SMCCC_ARCH_FEATURE_AVAILABILITY test was not up-to-date and was\nmissing two features: FEAT_TWED and FEAT_PMUV3P9. Connect the SCR_EL3\nand MDCR_EL3 bits to their corresponding ID register fields, so that\nthey can be tested.\n\nAt the same time the FEAT_RNG_TRAP test was slightly off: the SMCCC spec\nsays it should report accessibility of the RNDR and RNDRRS registers, so\nwe should look at FEAT_RNG, not FEAT_RNG_TRAP when checking the TRNDR\nbit.\n\nThis fixes the tf-a-tests run on an FVP with ARMv9.4 enabled, which was\nreporting the following issues before:\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\n\u003e Executing \u0027SMCCC_ARCH_FEATURE_AVAILABILITY test\u0027\n TEST COMPLETE Failed\nis_feat_rng_trap_present says feature is supported but SCR_TRNDR_BIT was\n\tnot set!\nSCR_EL3 still has values set: 0x20000000. Test needs to be updated\nMDCR_EL3 still has values set: 0x80. Test needs to be updated\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\n\nChange-Id: I73a0d240b2cd1a16e1c64d3d66ee30e658c9c946\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\n" }, { "commit": "e3d37e5ce098a4fa5561cdbeb4c702c5164c39a6", "tree": "a0ec5b6bff32d2fa1294f33af597c0d54558306e", "parents": [ "4dc4a8eff548674eb9074bf86ed4007b07ce3150", "c8f5a2ee90f2b376da910f08170af4c4dc7396ae" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Mar 10 14:56:43 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Mar 10 14:56:43 2025 +0100" }, "message": "Merge \"test: test the save restore logic for brbcr_el1\"" }, { "commit": "4dc4a8eff548674eb9074bf86ed4007b07ce3150", "tree": "62adf8c4bbb438943acb6e46b52170803509a17b", "parents": [ "3d43731d485b1405c5a224f65a7c2d381d46b093", "43980f9070347622ec9b9ff1b360357a954e96f2" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Sun Mar 09 01:28:21 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Sun Mar 09 01:28:21 2025 +0100" }, "message": "Merge \"test(realm): Fix Realm tests marking all memory as RAM\"" }, { "commit": "2b6c140b52790beebbb921dd0311efefb0bb0c5c", "tree": "333ef24bffd0e8a85ea998f3ae2da4c3b8c83047", "parents": [ "3d43731d485b1405c5a224f65a7c2d381d46b093" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Mar 06 10:01:19 2025 -0600" }, "committer": { "name": "Kathleen Capella", "email": "kathleen.capella@arm.com", "time": "Fri Mar 07 15:57:39 2025 -0600" }, "message": "test(fuzz): Fix single feature testing\n\n This change fixes an issue where a user provides a new feature\nthat can be fuzzed independently of the current setup of fuzzing.\nCurrently compile fails will cause issues if single feature fuzzing\nis desired and the automated flow will disable sets that are not in\nthe SMC description file. There are some small changes to the source\nfiles to enable this behavior for both SDEI and Vendor. There is also\na change to the automated scripting.\n\nChange-Id: Ic768e9f1b285225f12f23c1e36acb668088ad129\nSigned-off-by: Mark Dykes \u003cmark.dykes@arm.com\u003e\nSigned-off-by: Kathleen Capella \u003ckathleen.capella@arm.com\u003e\n" }, { "commit": "43980f9070347622ec9b9ff1b360357a954e96f2", "tree": "64495265719ce7b62c47bc5f720d88eec5ee15e9", "parents": [ "90506fbda56864b578980bc2d433f2ba38207e61" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Mar 07 20:35:21 2025 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Mar 07 20:35:21 2025 +0000" }, "message": "test(realm): Fix Realm tests marking all memory as RAM\n\nRealm tests only need access to part of DRAM.\nChange only required region RIPAS to RAM.\n\nChange-Id: Ia0120841e51726785062992e8a32dcd8a924a325\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "3d43731d485b1405c5a224f65a7c2d381d46b093", "tree": "c8d15de87f5a5155e57a145d43cbeb18c118f33f", "parents": [ "9b63fa56b4e21ecb87d409c6a95d1d3d5ee06376", "5668f34a89dfcee72c2a8e6aa443c7436f341d61" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Mar 07 17:50:31 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 07 17:50:31 2025 +0100" }, "message": "Merge \"fix: add split workaround check in Errata ABI test\"" }, { "commit": "9b63fa56b4e21ecb87d409c6a95d1d3d5ee06376", "tree": "7fc7ec71d57eec9732f6793a5ed15d3e2b354824", "parents": [ "90506fbda56864b578980bc2d433f2ba38207e61", "55d5db87b83b6a073ed3c954d455b862e7b2e7fe" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 07 11:06:37 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 07 11:06:37 2025 +0100" }, "message": "Merge changes Ic57f049d,Ifc98b8c6,I7e34a007,I20cbb9d0\n\n* changes:\n test(realm): extend ripas tests for planes\n test(realm): enhance realm memory exception tests for planes\n test(realm): add test for multi rec planes\n test(realm): validate NS EL1/EL2 context is preserved by RMM\n" }, { "commit": "c8f5a2ee90f2b376da910f08170af4c4dc7396ae", "tree": "625509a3d6d8838e0c31c9e89fbf23ed9361d15f", "parents": [ "992c62b427ad7fc425ec3c02e6c2f5e98e94d120" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Tue Feb 04 15:22:01 2025 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 06 16:55:05 2025 -0600" }, "message": "test: test the save restore logic for brbcr_el1\n\nThis patch tests the save/restore logic by enabling\nbranch recording at NS-EL2. Additionally this\npatch also tests the trap logic when FEAT_FGT is enabled\nand a Realm tries to access any FEAT_BRBE related registers.\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I176ea6feaf01d42cfd6231dc65a9470da8d1e37c\n" }, { "commit": "55d5db87b83b6a073ed3c954d455b862e7b2e7fe", "tree": "0019d75c61f3cbac06bc2f1e25d5944c8f9f3880", "parents": [ "7d3b999376c7416584639411f36bdadf877060d3" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Mar 03 12:56:04 2025 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Mar 06 21:08:59 2025 +0000" }, "message": "test(realm): extend ripas tests for planes\n\nTest that accessing page with RIPAS\u003dEMPTY from\nPlane N causes plane exit to P0.\n\nChange-Id: Ic57f049d0fa0140630aa7bfc0702a2dc729967a8\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "90506fbda56864b578980bc2d433f2ba38207e61", "tree": "b77200b91f6f52038c3754cc14fc2896d407f149", "parents": [ "992c62b427ad7fc425ec3c02e6c2f5e98e94d120", "b3d451c3bb4b3b6c6a03aaaa8e1a785c5a4ca0a5" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Mar 06 21:39:06 2025 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Mar 06 21:39:06 2025 +0100" }, "message": "Merge \"fix: add xpaci instruction to exception report\"" }, { "commit": "7d3b999376c7416584639411f36bdadf877060d3", "tree": "c22c6390ab2ec7977af1483c1d4dbf56bd2d388f", "parents": [ "bd729193dcdb19a5f5fa9b259770f1d1f365bad0" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 25 15:39:55 2025 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Mar 06 19:50:15 2025 +0000" }, "message": "test(realm): enhance realm memory exception tests for planes\n\nExtend memory exception tests for planes.\n\nChange-Id: Ifc98b8c67e85b04b36a78f16971d17f05d6a87d2\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" } ], "next": "5668f34a89dfcee72c2a8e6aa443c7436f341d61" }