)]}' { "log": [ { "commit": "c83b17bcd0cfcb2dff8b64c8895bc9684f468b71", "tree": "05cfb8d43bf7ecbe2c254c9bf4ef4dccfe3dffb9", "parents": [ "ffdfafbd49bbe0c6212c00ca4fd910574cac538d" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Apr 09 12:09:12 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "test(indirect message): aborted send from vm to sp\n\nThe SPMC shall copy the message from the VM\u0027s buffer into\nthe SP\u0027s when VM sends indirect message.\nTest that if TX buffer of the VM is added to the realm\nPAS, the operation fails smoothly with FFA_ERROR_ABORTED.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I375d1987429ed38349c25764262f386b6a4cde57\n" }, { "commit": "ffdfafbd49bbe0c6212c00ca4fd910574cac538d", "tree": "d09165edc985faeeaa800aca2570d9a03843fa26", "parents": [ "807822927033f07e272eae2222f78a878a23bbb0" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Apr 09 12:07:11 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "feat(ff-a): FFA_MSG_SEND2 helper with sender ID\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Idaf866a342f2127172b46f7a7a44a599723db7cf\n" }, { "commit": "807822927033f07e272eae2222f78a878a23bbb0", "tree": "7742e64211e9d61a03a34eb2c66edc660a073400", "parents": [ "df2deb36bc477d46e70704e771061dedd64ae996" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 08 18:04:20 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "test(indirect message): aborted send from SP to VM\n\nTest that if the RX buffer of VM is put on the realm\nPAS and an SP attempts to send a message to it, the\noperation terminates smoothly.\n\nChange-Id: Ie7fd316a6256b1c3445dfb7cb8fe1bbd09fffb6e\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\n" }, { "commit": "df2deb36bc477d46e70704e771061dedd64ae996", "tree": "2b5e7872bf9a7a094b19c13e413150357290b381", "parents": [ "cd779f49d89524f5236f4f671e3d566c7d333166" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 22 15:17:45 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "fix(notifications): destroy VM\u0027s bitmap\n\nThe last test in the notifications test suite was not\ncleaning up after itself. This change makes the test destroy\nthe bitmap for the receiver VM in the SPMC.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ia96b8d6e680dd0af99a2c767cd35efe38cf10011\n" }, { "commit": "cd779f49d89524f5236f4f671e3d566c7d333166", "tree": "a132844b98b4c5a8865f9d621b01507446026058", "parents": [ "58cc4dad0451ab4669072c654dbc0603932baa94" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 22 14:31:06 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "test(indirect message): request SP to message VM\n\nAdd test for SP to message a normal world VM.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4c2f3e8995163024453b6f51900599a5f6e60b19\n" }, { "commit": "58cc4dad0451ab4669072c654dbc0603932baa94", "tree": "71869e4f65f6e4f504a56a844205222a80e482ed", "parents": [ "907fcef5cc7b2c09679f7ebf99fd92426c544efc" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 05 14:17:35 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "feat(cactus): ability to send indirect messages\n\nAdd cactus test command for it to send indirect message\nvia FFA_MSG_SEND2 to a designated target FF-A endpoint.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: If519c19dd0ff86252fdd1d749baa2308bf64b936\n" }, { "commit": "907fcef5cc7b2c09679f7ebf99fd92426c544efc", "tree": "f33cc7fda4a2cd7fb4992e2956062ee474624691", "parents": [ "c6b92d5e73a19a9aeeb28d7ac8103cd2dc5adca8" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 08 17:32:58 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "feat(indirect message): send and receive messages\n\nAdded helpers to receive and send indirect messages, respectively:\n- `receive_indirect_message`;\n- `send_indirect_message`;\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I396870f15172f841167627b14c18b1504e0efbee\n" }, { "commit": "c6b92d5e73a19a9aeeb28d7ac8103cd2dc5adca8", "tree": "ee1d3de9d246f6d5abc62170a7b01b656cad09aa", "parents": [ "779fba660d61c8d95adbc66cb5b7086d681e1eaf" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 05 14:16:00 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "feat(ff-a): define framework notification helpers\n\nDefined the helpers to process framework notifiactions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I979162363898b4f9bf1a3d57327078364883b896\n" }, { "commit": "779fba660d61c8d95adbc66cb5b7086d681e1eaf", "tree": "09298958223dd797fff83fb116e1c76557001137", "parents": [ "2921fba58bd4535f8e944620273ade51f69db63f" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 05 14:14:40 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:34 2024 +0100" }, "message": "feat(ff-a): add helpers for indirect message\n\nAdd the header structures for the rxtx buffers, other\nhelper macros, and the FFA_MSG_SEND2 ABI caller.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ie5c735aa0b33dbf0288b6494362b6e7dc84c6db7\n" }, { "commit": "2921fba58bd4535f8e944620273ade51f69db63f", "tree": "5cc656109e7ba43327e00da2b4b34e7658b8bbd2", "parents": [ "a23b8ffefeafc1b5dab19fa2fc78e9596739cbc1" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Apr 24 10:30:35 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 08 16:30:21 2024 +0100" }, "message": "chore: move test from xml file\n\nMove test suite \"SP exceptions\" from \u0027tests-spm.xml\u0027\ninto \u0027tests-memory-access.xml\u0027.\n\nChange-Id: Ia312007cd3c6c6b98ac62cdd7e2b762669fa8e71\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\n" }, { "commit": "a23b8ffefeafc1b5dab19fa2fc78e9596739cbc1", "tree": "7cabe04b2079369f331677c84fe442b71408b707", "parents": [ "067daca6eea89d0ac95fcedc12750521ea09b952" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Feb 23 14:50:14 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 08 16:30:16 2024 +0100" }, "message": "test(rme): rxtx buffers are in the realm PAS\n\nAdded a test for which the SPMC attempts to use the RXTX\nbuffers, in an RME enabled platform and in which the buffers\nwere changed to realm PAS.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Idb29f8687fbe5885c00e61155a5ebbdd8908d688\n" }, { "commit": "067daca6eea89d0ac95fcedc12750521ea09b952", "tree": "3372bfa2adc9c32b54417f547de0a78cb141909e", "parents": [ "dfc4d7f46fb95441443066f60d1b855f7ef9c364" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 08 17:31:54 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue May 07 15:46:16 2024 +0100" }, "message": "feat(ff-a): add helper FFA_RX_RELEASE with ID\n\nAdd the helper `ffa_rx_release_with_id` for TFTF\nto mimic the releasing of RX buffer from a hypervisor.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I1edcc1568fd84af72454f3b755ccf16eca321a17\n" }, { "commit": "dfc4d7f46fb95441443066f60d1b855f7ef9c364", "tree": "d476fff8d3bc87d11f8b132b4b55698638792f4a", "parents": [ "3eb25fb886ece03d872eaba4bbd31cf80edda6af", "dd8025c73f9c2f73c663629b30508b96f04194e1" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Tue May 07 10:56:07 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue May 07 10:56:07 2024 +0200" }, "message": "Merge changes from topic \"gr/smccc-updates\"\n\n* changes:\n feat(smc): add test for vendor-specific service\n refactor(smc): group all smc tests\n refactor: make debugfs and pmf as vendor el3 services\n" }, { "commit": "dd8025c73f9c2f73c663629b30508b96f04194e1", "tree": "d476fff8d3bc87d11f8b132b4b55698638792f4a", "parents": [ "951d5fbe6641ed58747fed557e462dd3f3508ce4" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Mar 14 09:47:24 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "feat(smc): add test for vendor-specific service\n\nAdd test to check vendor-specific el3 service calls.\n\nChange-Id: I981d1cacec8690f57e51a5f05d51b6e437d1eb6a\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "951d5fbe6641ed58747fed557e462dd3f3508ce4", "tree": "b086b0ade6129b8294017dcaba03c0ebc5b4da9a", "parents": [ "f33112d50b18143421d3f3eac02a615f821ec284" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Mar 14 09:50:37 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "refactor(smc): group all smc tests\n\nMove and group all smccc related tests to tests-smc*\nfile.\n\nChange-Id: I34eb4dc906b558badab2c9356bb316d92f40914a\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "f33112d50b18143421d3f3eac02a615f821ec284", "tree": "eacae716d87f7883d56bbdf8b533a8c068a0c00a", "parents": [ "3eb25fb886ece03d872eaba4bbd31cf80edda6af" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Mon Feb 26 09:44:36 2024 -0600" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "refactor: make debugfs and pmf as vendor el3 services\n\nMove Debugfs and PMF support to vendor-specific el3 space.\nSMCCC 1.5 introduces vendor-specific el3 space.\n\nRef: https://developer.arm.com/docs/den0028/latest\n\nChange-Id: Ie6679dbb2ca2434ebd4fc19c2cc21cf5a84f97ab\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "3eb25fb886ece03d872eaba4bbd31cf80edda6af", "tree": "5de8b9d866ae31762bec44e6d2264ed47bc59d1e", "parents": [ "bbd609b99b23da41b997415980065be5849aeea9", "f2bb5d0f502955caf58192c6d9c9e0a051817b5d" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Apr 23 14:48:41 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 23 14:48:41 2024 +0200" }, "message": "Merge \"test(ff-a): FFA_FEATURES returns max RXTX buffer size\"" }, { "commit": "bbd609b99b23da41b997415980065be5849aeea9", "tree": "498f16d32751659b2b3f5b1b51842faffd58fb38", "parents": [ "42487ce271ed8de49625bcec731661b6b790953d", "e9943644a66b8e508d6f39dee7257b578fc5d12e" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Apr 16 13:57:56 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 16 13:57:56 2024 +0200" }, "message": "Merge \"docs: update toolchain requirements\"" }, { "commit": "42487ce271ed8de49625bcec731661b6b790953d", "tree": "9dbccf61a20c85ca92fbf81fbfef005ebb67519d", "parents": [ "eaf60b4cad7d34afedb3259a4dd6164b39cb9c0e", "bff9b3ca375d40753a3212dbf178bcdfc7784841" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Apr 15 15:56:34 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Apr 15 15:56:34 2024 +0200" }, "message": "Merge changes from topic \"km/rxtx_map_unmap\"\n\n* changes:\n test(spm): tests for RXTX_MAP/RXTX_UNMAP\n feat(ffa-svc): add `ffa_func_name` and `ffa_error_name`\n" }, { "commit": "bff9b3ca375d40753a3212dbf178bcdfc7784841", "tree": "d46e017d6c35e04582c340fbd1c433680fbc22c9", "parents": [ "e3e570653471af3506846f06b5fe0421970adce4" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 18 16:08:35 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Apr 12 17:24:23 2024 +0100" }, "message": "test(spm): tests for RXTX_MAP/RXTX_UNMAP\n\nTests to check that RXTX_MAP and RXTX_UNMAP properly unmap/map the RX\nand TX pages from the NWd stage 2 page tables.\nSpecifically:\n* RXTX_MAP should fail when using secure memory\n* RXTX_MAP should fail when using non-secure memory outside the regions\n specified in SPMC nodes\n* Memory sharing functions (lend, share, donate) should fail when using\n memory that has been mapped by RXTX_MAP\n* RXTX_UNMAP should fail when using different VM IDs\n* Forwarded RXTX_MAP should succeed when the region is not mapped\n* Two consecutive forwarded RXTX_MAPs should succeed when the regions\n don\u0027t overlap and the endpoint IDs are different\n* Forwarded RXTX_MAP should fail when the region is already mapped\n* Memory sharing functions (lend, share, donate) should fail when using\n memory that has been mapped by forwarded RXTX_MAP\n\nChange-Id: I006681ab54f5ff602e862ae09438d0d174c8d0b0\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "e3e570653471af3506846f06b5fe0421970adce4", "tree": "f1a6c8a23f0a06e442d058b2ad22034f6e0febb5", "parents": [ "52f0b0ac70de3701d642cd59044aa70ffa342e40" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 18 14:28:36 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Apr 12 17:16:00 2024 +0100" }, "message": "feat(ffa-svc): add `ffa_func_name` and `ffa_error_name`\n\nAdds helper functions for getting string representations of function\nidentifiers and error codes. This makes debug logs more readable than\nprinting the integer value.\n\nChange-Id: I9e74c197686dc08e0c71886f641c60829587bad6\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "eaf60b4cad7d34afedb3259a4dd6164b39cb9c0e", "tree": "4c109838a31cfe3375936a4685973af32d39a30b", "parents": [ "52f0b0ac70de3701d642cd59044aa70ffa342e40", "b21ee3e7c8e796f918e59205dd4184aa7732a3e6" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Apr 11 22:07:45 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Apr 11 22:07:45 2024 +0200" }, "message": "Merge \"test: ensure mte registers are restored upon context switch\"" }, { "commit": "b21ee3e7c8e796f918e59205dd4184aa7732a3e6", "tree": "4c109838a31cfe3375936a4685973af32d39a30b", "parents": [ "52f0b0ac70de3701d642cd59044aa70ffa342e40" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Mar 20 16:32:56 2024 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Apr 05 11:25:54 2024 -0500" }, "message": "test: ensure mte registers are restored upon context switch\n\nThis test aims to validate MTE system registers are restored to\ncorrect values upon world switch triggered by an FF-A direct message\nrequest to an SP.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I9b01d349a0cf0ce557e74cfc70ed5208468e7919\n" }, { "commit": "52f0b0ac70de3701d642cd59044aa70ffa342e40", "tree": "e3baf81a8084b08cae4cd8bef0146b6de6b54dfc", "parents": [ "88f91b7257d2b2a03ec5f78f45c06f39695b7833", "4dec1db7a8bb285fb5f2c39fa5b2d5ec005526b9" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Apr 05 17:33:23 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 05 17:33:23 2024 +0200" }, "message": "Merge \"fix(ff-a): return FFA_ERROR_BUSY\"" }, { "commit": "4dec1db7a8bb285fb5f2c39fa5b2d5ec005526b9", "tree": "e3baf81a8084b08cae4cd8bef0146b6de6b54dfc", "parents": [ "88f91b7257d2b2a03ec5f78f45c06f39695b7833" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 05 11:39:07 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 05 13:51:06 2024 +0100" }, "message": "fix(ff-a): return FFA_ERROR_BUSY\n\nIn case of cyclic depencies establish via direct messaging,\nthe SPMC should return FFA_ERROR_BUSY.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I1a0eb23cb989c49da46b1027e2004b5fd86e9388\n" }, { "commit": "e9943644a66b8e508d6f39dee7257b578fc5d12e", "tree": "ce05ff70511707902f042acba9613397036a3527", "parents": [ "88f91b7257d2b2a03ec5f78f45c06f39695b7833" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Fri Apr 05 12:59:07 2024 +0100" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Fri Apr 05 12:59:07 2024 +0100" }, "message": "docs: update toolchain requirements\n\nTF-A tests have been verified with the latest toolchain verison\n13.2.Rel1. Henceforth the requirements are updated.\n\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\nChange-Id: I076c2d6ac177d7436b460dcb39cfe383f5687f28\n" }, { "commit": "88f91b7257d2b2a03ec5f78f45c06f39695b7833", "tree": "41baf3e3f7d6ab325f673bb5bababe955713663f", "parents": [ "e3ee6e0a40b73baffd26563adb9cf49b040cbc30", "b1b37926917b265ef8a3f6caf59b6a20fe8b636c" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 29 12:27:43 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 29 12:27:43 2024 +0100" }, "message": "Merge \"test(realm): add test for enabling pmu with multiple rec\"" }, { "commit": "b1b37926917b265ef8a3f6caf59b6a20fe8b636c", "tree": "41baf3e3f7d6ab325f673bb5bababe955713663f", "parents": [ "e3ee6e0a40b73baffd26563adb9cf49b040cbc30" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Sat Jan 13 21:49:04 2024 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 29 09:22:09 2024 +0100" }, "message": "test(realm): add test for enabling pmu with multiple rec\n\nTest creates realm with less number of pmu counters than available\nTest verifies that only programmed num of pmu counters are available in realm\n\nChange-Id: I479dd8949950357b9814576b1b6cef142d21c75f\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "e3ee6e0a40b73baffd26563adb9cf49b040cbc30", "tree": "b4f9c6193b7c624f588164232cb10e633ced5621", "parents": [ "733f88170011df029477656c66b6959fdb91cf35", "462b07dc17b74e12a02c66f8135b849e7aea0d52" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Mar 28 12:45:39 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Mar 28 12:45:39 2024 +0100" }, "message": "Merge changes I81c49bac,I33afd590,I0ad13d69\n\n* changes:\n test(realm): add testcase for access outside realm IPA space\n test(realm): add ability to overwrite s2sz for creating realm\n test(realm) : add tests for PAS transitions\n" }, { "commit": "f2bb5d0f502955caf58192c6d9c9e0a051817b5d", "tree": "578f200539be531f599a6d3989cc5894f2280f6f", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Feb 13 17:23:17 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Mar 27 12:48:46 2024 +0000" }, "message": "test(ff-a): FFA_FEATURES returns max RXTX buffer size\n\nAdd testcase to check that a call to `FFA_FEATURES` with\n`FFA_RXTX_MAP_SMC64` returns a parameter explaining the maximum and\nminimum buffer size on v1.2 or greater.\n\nChange-Id: I03efc89655daf9f7c2eb9cf35d26c5a68690036a\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "462b07dc17b74e12a02c66f8135b849e7aea0d52", "tree": "b4f9c6193b7c624f588164232cb10e633ced5621", "parents": [ "faee961c7c3a17ba0eb25f5c90486a38e681c83c" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Feb 08 02:16:25 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm): add testcase for access outside realm IPA space\n\nAdd testcase for accessing addr with IPA outside realm IPA space.\n* If IPA is larger than implemented PA size expect adr size fault,\n* If IPA is larger than realm IPA space but less than implemented\n PA size expect SEA taken to realm.\n\nChange-Id: I81c49bac5b8b869b24b81f6af3cdb3f093eb9f64\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "faee961c7c3a17ba0eb25f5c90486a38e681c83c", "tree": "ac9e3fb9edd777093ea918200a1f649e9377d0f4", "parents": [ "f733a781ab7fdcb4e775a74005b2f23a313094ef" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 14:26:36 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm): add ability to overwrite s2sz for creating realm\n\nAdd capability to check and overwrite s2sz via feature flag\nwhile creating realm.\n\nChange-Id: I33afd5903cf4de546aba1c17c988b32a6e1b05a5\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f733a781ab7fdcb4e775a74005b2f23a313094ef", "tree": "3de60d072408b473bfdbb0ca912eccfafa6be9a9", "parents": [ "733f88170011df029477656c66b6959fdb91cf35" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Jan 03 22:33:10 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm) : add tests for PAS transitions\n\nadd tests for HIPAS and RIPAS changes at a\nProtected IPA which can occur when the\nRealm state is New and Active\n\nChange-Id: I0ad13d697e8b69e71e58197878d1d58a2f6ebff7\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "733f88170011df029477656c66b6959fdb91cf35", "tree": "4d1fb9155bfc0155c5f05b0ba25827a486729838", "parents": [ "248284e7c05a0c80c2d8399759686a1357a58cc9", "7e99cb0e172932b2ce5957a552747d85bc89dca0" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Mar 22 09:19:13 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 22 09:19:13 2024 +0100" }, "message": "Merge \"fix(printf): increase TESTCASE_OUTPUT_MAX_SIZE\"" }, { "commit": "248284e7c05a0c80c2d8399759686a1357a58cc9", "tree": "f6552943f25141e317637e9bf6aa495f0ea2fa94", "parents": [ "4b67249600e466b4f4758ee19fc13e2b0a54118f", "31b91f4c51656adf5fe9e8319272d95fa1a2ecdf" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Mar 20 18:13:00 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Mar 20 18:13:00 2024 +0100" }, "message": "Merge \"refactor: trim down extensive test list\"" }, { "commit": "31b91f4c51656adf5fe9e8319272d95fa1a2ecdf", "tree": "dca102360884f383515beb942623029e1960bc4f", "parents": [ "e39d55ab48b30c610859c277551b97c65cbe82bf" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Mar 20 12:57:10 2024 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Mar 20 12:57:10 2024 +0000" }, "message": "refactor: trim down extensive test list\n\nExtensive tests are meant to do stress testing but currently the list\nincludes most of the tests from standard test and two extensive ones\nrelated with PSCI and timer.\nSince we do standard tests in quite a few configurations, no need to\ntest them again in extensive.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I0be868e1e781fd95e95908b82bd138dc7c6d32aa\n" }, { "commit": "4b67249600e466b4f4758ee19fc13e2b0a54118f", "tree": "d423972a4eb55957e93855a7862466fcade22cd5", "parents": [ "6d5ee5b9d7030780c7b19e6694554e69c17bbed6", "aa68c6cdf4ac0d13162df4e2221f90c5062fb963" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Mon Mar 18 18:03:26 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Mar 18 18:03:26 2024 +0100" }, "message": "Merge \"fix(arm): check for null before calling I/O policy callback\"" }, { "commit": "6d5ee5b9d7030780c7b19e6694554e69c17bbed6", "tree": "25fcc9e9f03973351598deaae6d10bccce6eb84a", "parents": [ "44115698f07b73ce83fdcce4e26aafe701c49b1c", "e42a620bfceaf6723cba4871a662054cdb622fe4" ], "author": { "name": "Bipin Ravi", "email": "bipin.ravi@arm.com", "time": "Fri Mar 15 15:32:22 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 15 15:32:22 2024 +0100" }, "message": "Merge changes from topic \"sm/framework_optimize\"\n\n* changes:\n refactor(errata_abi): add Cortex-A520 cpu struct for errata ABI\n refactor(errata_abi): add Cortex-X3 cpu struct for errata ABI\n refactor(errata_abi): update the cpu structs for errata ABI\n" }, { "commit": "e42a620bfceaf6723cba4871a662054cdb622fe4", "tree": "25fcc9e9f03973351598deaae6d10bccce6eb84a", "parents": [ "68f022f84d501985d0be5d5b497d91938539efe0" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 16:37:17 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): add Cortex-A520 cpu struct for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: Ia0533991cc0489fc67c1c69917e5d343410c3a29\n" }, { "commit": "68f022f84d501985d0be5d5b497d91938539efe0", "tree": "58cb3213925bd292c1eea987561182211252d095", "parents": [ "7bb1c84eca3a7dc46051b75b6b1cf13046b88c92" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 16:33:13 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): add Cortex-X3 cpu struct for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I8b3bad451b6c29dedff6cdf310a1bdb3b20c6f4c\n" }, { "commit": "7bb1c84eca3a7dc46051b75b6b1cf13046b88c92", "tree": "1be17aeca48b145e8814b08be48637483268afe7", "parents": [ "44115698f07b73ce83fdcce4e26aafe701c49b1c" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 15 14:14:59 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): update the cpu structs for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I4650a88003db2ded9277b35c7fc521026fe4a5d7\n" }, { "commit": "44115698f07b73ce83fdcce4e26aafe701c49b1c", "tree": "7238e95f8a1d9f79fbc8314b146b12e7e1a3761e", "parents": [ "5c5f7bdf581348dc8e483b2e4fc3b34b8bae56d2", "df754458af72ab6a30db822cf7c3fe5b42d5c885" ], "author": { "name": "Lauren Wehrmeister", "email": "lauren.wehrmeister@arm.com", "time": "Thu Mar 14 21:18:47 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Mar 14 21:18:47 2024 +0100" }, "message": "Merge \"refactor(sdei): refactor SDEI test to align with new SPSR config\"" }, { "commit": "df754458af72ab6a30db822cf7c3fe5b42d5c885", "tree": "7238e95f8a1d9f79fbc8314b146b12e7e1a3761e", "parents": [ "5c5f7bdf581348dc8e483b2e4fc3b34b8bae56d2" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Mon Mar 04 15:46:05 2024 -0600" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Mar 14 10:56:21 2024 -0500" }, "message": "refactor(sdei): refactor SDEI test to align with new SPSR config\n\nModified sdei_event_check_pstate() to align with the updated\nSPSR configuration procedure which uses the create_spsr()\nAPI.\n\nChange-Id: I7723657117a8c64762acdbb410ad535058c97e9d\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "aa68c6cdf4ac0d13162df4e2221f90c5062fb963", "tree": "cd7895e6968a490adce5303dfbc388e51e755b7f", "parents": [ "5c5f7bdf581348dc8e483b2e4fc3b34b8bae56d2" ], "author": { "name": "Jimmy Brisson", "email": "jimmy.brisson@arm.com", "time": "Wed Feb 07 09:42:28 2024 -0600" }, "committer": { "name": "Jimmy Brisson", "email": "jimmy.brisson@arm.com", "time": "Mon Mar 11 13:41:38 2024 -0500" }, "message": "fix(arm): check for null before calling I/O policy callback\n\nI stumbled across this when passing a non-present image id into\nthe plat_get_image_source function, which caused it to jump\ninto nowhere, and fault. The image id was less than the maximum\nsize of the policy array, but was an empty entry.\nThis check prevents the jump into nowhere.\n\nChange-Id: If5861f0e09b6b2244aee1ec52ce7c91bb7d62ec8\nSigned-off-by: Jimmy Brisson \u003cjimmy.brisson@arm.com\u003e\n" }, { "commit": "5c5f7bdf581348dc8e483b2e4fc3b34b8bae56d2", "tree": "2e547e822e5decb80e3a8b6262c52c2af574b31a", "parents": [ "95f5b30baa661da046d3364daf44851673000ce9", "f86d2d3a8af0084f63d8012a899c9e4eb128c0df" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Fri Mar 08 11:50:09 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 08 11:50:09 2024 +0100" }, "message": "Merge changes from topic \"xlnx_versal_net_test_skip\"\n\n* changes:\n fix(versal-net): update test skip list\n fix(versal): update test skip list\n" }, { "commit": "95f5b30baa661da046d3364daf44851673000ce9", "tree": "0e76a908c93028f7abd6fd7a7e9cb44ffc865106", "parents": [ "1f099ddf7ac01f8e01627fd251b743e8f2d49f5a", "ef77a0975d997cda216671b8e26b72544c6f86b2" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Fri Mar 08 10:11:33 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 08 10:11:33 2024 +0100" }, "message": "Merge changes from topic \"xlnx_zynqmp_intro\"\n\n* changes:\n docs(zynqmp): add zynqmp documentation\n feat(zynqmp): introduce platform support\n" }, { "commit": "ef77a0975d997cda216671b8e26b72544c6f86b2", "tree": "0e76a908c93028f7abd6fd7a7e9cb44ffc865106", "parents": [ "7c9f2fc8f6bf5768c5643c10df8ab434129f811f" ], "author": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Thu Feb 15 12:53:46 2024 +0530" }, "committer": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Fri Mar 08 10:30:31 2024 +0530" }, "message": "docs(zynqmp): add zynqmp documentation\n\nAdd information about ZynqMP platform for TF-A Tests and provide\nthe build commands.\n\nChange-Id: I508d062d2ce16201b578e95d14d70e137ad709bf\nSigned-off-by: Amit Nagal \u003camit.nagal@amd.com\u003e\n" }, { "commit": "7c9f2fc8f6bf5768c5643c10df8ab434129f811f", "tree": "57fb964c332bf561d604736c5e2f286961c85963", "parents": [ "1f099ddf7ac01f8e01627fd251b743e8f2d49f5a" ], "author": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Thu Feb 08 16:35:08 2024 +0530" }, "committer": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Fri Mar 08 10:29:07 2024 +0530" }, "message": "feat(zynqmp): introduce platform support\n\nIntroduce platform support for AMD-Xilinx zynqmp, an adaptive\ncompute acceleration platform (ACAP).\n\n- TF-A cadence driver is used for console.\n- TTC is used for Timers.\n\nsummary:\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\nTests Skipped : 193\nTests Passed : 29\nTests Failed : 0\nTests Crashed : 0\nTotal tests : 222\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\nNOTICE: Exiting tests.\n\nChange-Id: Ia63df682f8e97cc3a5d88468bf0df71f6bb3fc26\nSigned-off-by: Akshay Belsare \u003cakshay.belsare@amd.com\u003e\nSigned-off-by: Amit Nagal \u003camit.nagal@amd.com\u003e\n" }, { "commit": "1f099ddf7ac01f8e01627fd251b743e8f2d49f5a", "tree": "8fc71d62d3a84528c74c35fb383208129a741a38", "parents": [ "e39d55ab48b30c610859c277551b97c65cbe82bf", "cd6128d479033c7ac4cff8e932415b5c04bbde67" ], "author": { "name": "Bipin Ravi", "email": "bipin.ravi@arm.com", "time": "Thu Mar 07 16:16:33 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Mar 07 16:16:33 2024 +0100" }, "message": "Merge \"refactor(errata_abi): add the Cortex-X4 cpu struct\"" }, { "commit": "cd6128d479033c7ac4cff8e932415b5c04bbde67", "tree": "8fc71d62d3a84528c74c35fb383208129a741a38", "parents": [ "e39d55ab48b30c610859c277551b97c65cbe82bf" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 15:18:50 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Tue Mar 05 11:34:15 2024 -0600" }, "message": "refactor(errata_abi): add the Cortex-X4 cpu struct\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I8421dcc98eea85d038070f90e819e91bb2652727\n" }, { "commit": "e39d55ab48b30c610859c277551b97c65cbe82bf", "tree": "e57adfb2e031af25a9f67d68ed6f06e35065890e", "parents": [ "296fab081902f787e2cac464fe4d019b490c495b", "b5154bcc110747a4bfdb605b7a346377a55643a2" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Sat Mar 02 12:30:04 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Sat Mar 02 12:30:04 2024 +0100" }, "message": "Merge changes from topic \"sgi_to_nrd\"\n\n* changes:\n fix(arm): fix comments referencing \"SGI platform\"\n refactor(sgi): replace references to \"SGI\"/\"sgi\" for neoverse_rd\n refactor(sgi): rename \"CSS_SGI\" macro prefixes to \"NRD\"\n refactor(sgi): move apis and types to \"nrd\" prefix\n refactor(sgi): replace build-option prefix to \"NRD\"\n refactor(sgi): regroup \"sgi\" and \"rdinfra\" to \"neoverse_rd\"\n" }, { "commit": "296fab081902f787e2cac464fe4d019b490c495b", "tree": "72bfa719bf67c096ff879a9c7fda10ffac2a224f", "parents": [ "4ccf3b9a5e6eb7c87b588158ec33d30355dcfa27", "9c73678243bd8c27cd50b8fc097559444025cf40" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Thu Feb 29 11:28:29 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 29 11:28:29 2024 +0100" }, "message": "Merge \"refactor(xilinx): mark ttc clock select platform specific\"" }, { "commit": "4ccf3b9a5e6eb7c87b588158ec33d30355dcfa27", "tree": "5ad502bb1c75c908b7d7e3f4f897e93539beadd5", "parents": [ "f6328f67e4e87639b48e00d842192122360e1c89", "8ba06f324d4a1047aed7bc584e4c2ae635e197cc" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Thu Feb 29 11:27:28 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 29 11:27:28 2024 +0100" }, "message": "Merge \"fix(xilinx): wire Xilinx platforms in docs\"" }, { "commit": "f6328f67e4e87639b48e00d842192122360e1c89", "tree": "fa8e1d90237ac255382b19b74da650f55b9c6faa", "parents": [ "8c2ca7ec7e312f48486c75c42ffad9dc1401d563", "d72ab0984a2318cfa5b74a2dff5b708734d4d402" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Wed Feb 28 14:51:13 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 28 14:51:13 2024 +0100" }, "message": "Merge \"feat: introduce UNDEF injection test\"" }, { "commit": "f86d2d3a8af0084f63d8012a899c9e4eb128c0df", "tree": "ee02cdd8d7357f3bf1edcda5ba7eb7180a7e8b00", "parents": [ "60b7f91b9009c2dee19b0e66b8833bfbdbe97df2" ], "author": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Fri Feb 16 11:05:41 2024 +0530" }, "committer": { "name": "Kummari Prasad", "email": "prasad.kummari@amd.com", "time": "Tue Feb 27 07:23:51 2024 +0100" }, "message": "fix(versal-net): update test skip list\n\nThe test case \"PSCI CPU Suspend in OSI mode\" is failing due to failure\nlogs from other firmware. Once the errors are resolved, the test cases\nwill be enabled.\n\nSigned-off-by: Prasad Kummari \u003cprasad.kummari@amd.com\u003e\nChange-Id: I014965cb0e406ee4ec4a9d49b83e67d24ff0993b\n" }, { "commit": "60b7f91b9009c2dee19b0e66b8833bfbdbe97df2", "tree": "ea89cfe88523d6e997ec8e7754ba7872c18d0f05", "parents": [ "a8deec5c0b51719b1f268e4f106c3a095a387074" ], "author": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Fri Feb 16 09:42:55 2024 +0530" }, "committer": { "name": "Kummari Prasad", "email": "prasad.kummari@amd.com", "time": "Tue Feb 27 07:21:50 2024 +0100" }, "message": "fix(versal): update test skip list\n\nIn Versal, the SCNTR and SCNTRS registers are inaccessible from NS EL1.\nInstead of using the SCNTR register, using TTC timers. The test case\nCNTFRQ compare test compares the values of cntfrq_el0 and ns_cntfrq.\nThe cntfrq_el0 value is obtained by reading the cntfrq_el0 register,\nwhile the ns_cntfrq value is obtained by reading from the mmio address\nSYS_CNT_BASE1 + CNTBASEN_CNTFRQ (0x10), where SYS_CNT_BASE1 represents\nthe TTC base register, CNTBASEN_CNTFRQ is the counter Frequency register\noffset, is not applicable for Versal platform. The test case fails because\ncntfrq_el0 and ns_cntfrq are not equal.\n\nThe test case \"PSCI CPU Suspend in OSI mode\" is failing due to failure\nlogs from other firmware. Once the errors are resolved, the test cases\nwill be enabled.\n\nSigned-off-by: Prasad Kummari \u003cprasad.kummari@amd.com\u003e\nChange-Id: I0598c6886dd18bcf2caa47c36c9a0d1fbd7a2ab7\n" }, { "commit": "7e99cb0e172932b2ce5957a552747d85bc89dca0", "tree": "6119b183a19eed54fc34dc7263cc00eaf03cce33", "parents": [ "a8deec5c0b51719b1f268e4f106c3a095a387074" ], "author": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Thu Feb 22 11:46:00 2024 +0530" }, "committer": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Mon Feb 26 22:11:07 2024 +0530" }, "message": "fix(printf): increase TESTCASE_OUTPUT_MAX_SIZE\n\nThe SMCCC_ARCH_WORKAROUND_2 test tftf_testcase_printf\nencountered a string truncation error on multi clusters.\nThe value of 512 bytes was insufficient for a system with\n16 cores, therefore, it has been increased to 1024 bytes\nto address the issue.\n\nSigned-off-by: Prasad Kummari \u003cprasad.kummari@amd.com\u003e\nChange-Id: I15875c67137bf0491aa2da3fa1517ce789abacd8\n" }, { "commit": "8c2ca7ec7e312f48486c75c42ffad9dc1401d563", "tree": "452393e32b8e1ee9bbc99bd104d4386c82e7ed6b", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553", "4aaccc671a4750c72e30e282eff0c4c863eb57a9" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Feb 22 16:30:56 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 22 16:30:56 2024 +0100" }, "message": "Merge \"feat(rmi): force max IPA size on Realms to 48 bits\"" }, { "commit": "d72ab0984a2318cfa5b74a2dff5b708734d4d402", "tree": "7eb71791a47bcbea2491ddacfb27f65fe5406f4b", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Dec 11 17:43:53 2023 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Feb 22 14:21:33 2024 +0000" }, "message": "feat: introduce UNDEF injection test\n\nTest to verify UNDEF injection support in TF-A by trapping FGT register\naccess from tftf into EL3.\n\nTo trap FGT register access to EL3, run the test on model with FEAT_FGT\npresent but the traps from EL3 are not enabled (ENABLE_FEAT_FGT \u003d 0).\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: Ic58ef797c64aad6d17ea33d9fc34e14b4e1a7055\n" }, { "commit": "4aaccc671a4750c72e30e282eff0c4c863eb57a9", "tree": "452393e32b8e1ee9bbc99bd104d4386c82e7ed6b", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Feb 22 12:26:57 2024 +0000" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Feb 22 12:51:48 2024 +0000" }, "message": "feat(rmi): force max IPA size on Realms to 48 bits\n\nCurrently, RMM might be able to support FEAT_LPA2 and 52 bits address\nsize, however as TFTF tests does not support FEAT_LPA2 yet, we need to\nlimit the maximum IPA space size for realm creation on RMI tests, as\nTFTF uses the maximum size supported reported by RMM as the IPA\nsize when creating new realms, which can cause an inconsistency if\nFEAT_LPA2 is disabled.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I3b77cbbb41a8a1353c7a35decc35d080fd3ad9f3\n" }, { "commit": "b5154bcc110747a4bfdb605b7a346377a55643a2", "tree": "f1527b16cec5b8eb497a6531c3c100e8d21428fe", "parents": [ "381d3912cedb1c257d9829933d723b117949e1e7" ], "author": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Thu Feb 15 11:32:56 2024 +0000" }, "committer": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Mon Feb 19 09:58:44 2024 +0000" }, "message": "fix(arm): fix comments referencing \"SGI platform\"\n\nCurrently, both N1SDP and TC platforms have references to \"SGI\" within\na comment in their respective source files. Fix this by replacing it\nwith the appropriate platform name.\n\nSigned-off-by: Rohit Mathew \u003cRohit.Mathew@arm.com\u003e\nChange-Id: I523c3ef0bfa76d35819a8f776a08820ffd197c44\n" }, { "commit": "381d3912cedb1c257d9829933d723b117949e1e7", "tree": "e002d32e202aeb6ded5d9795a2914e4de6db5259", "parents": [ "5b113e102a86fbf61137c9f700c696609cfd503b" ], "author": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Thu Feb 15 11:28:31 2024 +0000" }, "committer": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Mon Feb 19 09:58:07 2024 +0000" }, "message": "refactor(sgi): replace references to \"SGI\"/\"sgi\" for neoverse_rd\n\nCurrently, there are several reference to \"SGI\" or \"sgi\" in comments or\nas macro prefix within the neoverse_rd directory. As part of the\nmigration to neoverse_rd, rename all occurences of \"SGI/sgi\" to\n\"Neoverse-RD\" or the \"NRD\" prefix accordingly. All references in\ncomments are rephrased as \"Neoverse RD platforms\". References in code\nare renamed as \"NRD\"/\"nrd\" accordingly.\n\nSigned-off-by: Rohit Mathew \u003cRohit.Mathew@arm.com\u003e\nChange-Id: I55bdab01051974b3ddb2dae3bc4c0e253fb85fc3\n" }, { "commit": "5b113e102a86fbf61137c9f700c696609cfd503b", "tree": "9d35921dfa15afd1826bbe55cd02b5db6d77745a", "parents": [ "3f3f3e9e4ce8de3d6737d4ae9e2dd77fea11fb9c" ], "author": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Wed Feb 14 12:49:55 2024 +0000" }, "committer": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Mon Feb 19 09:57:40 2024 +0000" }, "message": "refactor(sgi): rename \"CSS_SGI\" macro prefixes to \"NRD\"\n\nAs of now, several internal macros utilize \"CSS_SGI\" as their prefix.\nGiven the change to neoverse_rd, the prefix \"CSS_SGI\" is no longer\nappropriate. Therefore, update the macro prefixes to \"NRD\" for\nconsistency and clarity.\n\nSigned-off-by: Rohit Mathew \u003cRohit.Mathew@arm.com\u003e\nChange-Id: I252a5ece6c82a0a5a3b451238ed0da07f8a0c81e\n" }, { "commit": "3f3f3e9e4ce8de3d6737d4ae9e2dd77fea11fb9c", "tree": "e7913a36e9f110b29da39c1a557791ee2620b0a5", "parents": [ "8836f620855c8a7ed650b262e7704c54be5d2c0a" ], "author": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Wed Feb 14 12:47:42 2024 +0000" }, "committer": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Mon Feb 19 09:57:13 2024 +0000" }, "message": "refactor(sgi): move apis and types to \"nrd\" prefix\n\nCurrently, functions and types internal to neoverse_rd platforms are\nnamed with \"sgi\" as the prefix. Since common code and platforms are no\nlonger under the \"sgi\" umbrella, move the prefix to \"nrd\". This change\nwould amend the prefixes for functions, types and objects.\n\nSigned-off-by: Rohit Mathew \u003cRohit.Mathew@arm.com\u003e\nChange-Id: I1080259b661081c535ab46f61df9e4563420bdb0\n" }, { "commit": "8836f620855c8a7ed650b262e7704c54be5d2c0a", "tree": "5dbb309edfeefc98c057bbe5a055b66edcb2e450", "parents": [ "cac32e9262ee8e0e23d2e3b6551227767297717f" ], "author": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Wed Feb 14 12:43:21 2024 +0000" }, "committer": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Mon Feb 19 09:56:24 2024 +0000" }, "message": "refactor(sgi): replace build-option prefix to \"NRD\"\n\nAs of now, CSS_SGI_PLATFORM_VARIANT and CSS_SGI_CHIP_COUNT are the\nexternal build option that sgi platforms support. As \"sgi\" has been\nrenamed to \"neoverse_rd\", replace the prefix \"CSS_SGI\" with \"NRD\".\n\nSigned-off-by: Rohit Mathew \u003cRohit.Mathew@arm.com\u003e\nChange-Id: I585575788c14d1c3b26ab336672ef149771dab98\n" }, { "commit": "cac32e9262ee8e0e23d2e3b6551227767297717f", "tree": "495fd75302643a9a4097fe2c75b30b8de3a7fbe9", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Tue Feb 13 22:02:45 2024 +0000" }, "committer": { "name": "Rohit Mathew", "email": "Rohit.Mathew@arm.com", "time": "Sun Feb 18 15:33:02 2024 +0000" }, "message": "refactor(sgi): regroup \"sgi\" and \"rdinfra\" to \"neoverse_rd\"\n\nCurrently, reference design platforms such as RD-N2, RD-N1-Edge, RD-V1,\nand SGI-575 utilize \"sgi/common\" as the common source directory. The\n\"sgi\" prefix originated from the System Guidance Infrastructure (SGI)\nand was initially associated with the SGI-575 platform. However,\nsubsequent platforms released were under the Neoverse reference design\nproduct name.\n\nTo align with the Neoverse reference design nomenclature, regroup all\ncommon and board files within neoverse_rd directory. Consolidate common\nsources and headers under neoverse_rd/common. Board files for RD-V1,\nRD-N2, RD-N1-Edge and SGI-575 are moved to neoverse_rd/platform. With\nthe changes in this commit, the tree view would look as follows:\n\n├── neoverse_rd\n│   ├── common\n│   │   ├── arch\n│   │   └── include\n│   └── platform\n│   ├── rdn1edge\n│   ├── rdn2\n│   ├── rdv1\n│   └── sgi575\n\nAdditionally, update all file prefixes from \"sgi\" to \"nrd.\"\n\nSigned-off-by: Rohit Mathew \u003cRohit.Mathew@arm.com\u003e\nChange-Id: I07e2af143fad82e48172612fe0e28db6464fa901\n" }, { "commit": "9c73678243bd8c27cd50b8fc097559444025cf40", "tree": "5f0f6c2eceeabb6c430740b6aa9cd4e3ae38e469", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Fri Feb 16 12:29:16 2024 +0530" }, "committer": { "name": "Amit Nagal", "email": "amit.nagal@amd.com", "time": "Fri Feb 16 15:03:53 2024 +0530" }, "message": "refactor(xilinx): mark ttc clock select platform specific\n\nTTC clock select register(TTC_CLK_SEL) is used to select\nTTC reference clock.\nThe offset for TTC_CLK_SEL in LPD_IOU_SLCR register module\ndiffers on various AMD xilinx platforms.\nOffset is 0x380 for zynqmp platform and is 0x360 for versal\nand versal-net platforms.\nAccording define offset for TTC clock select in platform\nspecific files.\n\nChange-Id: I479f655704fcc515068425eedc5d73d24a32dde0\nSigned-off-by: Amit Nagal \u003camit.nagal@amd.com\u003e\n" }, { "commit": "90d61cd1e36634597a71b86fcb9701b94741a553", "tree": "2b617dacfc9f35422f55b82cd0280148f4494c51", "parents": [ "8cea7c5af9c2a300c4f5d143480d04c84cd5b21b", "2a5abadb8e841eedeaa1ff78b6f0da5f957b2ab8" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Feb 15 17:11:34 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 15 17:11:34 2024 +0100" }, "message": "Merge changes I26cbaaf6,Ibb393b41\n\n* changes:\n test(realm): add test for FEAT_DIT\n test(realm): test realm pauth state is preserved\n" }, { "commit": "8cea7c5af9c2a300c4f5d143480d04c84cd5b21b", "tree": "57c461b3762b34758df91774cbbcec09e0eb4e27", "parents": [ "a8deec5c0b51719b1f268e4f106c3a095a387074", "4f35ce6fcbb68fc1f2fb48df7f66ad0fd494a061" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Feb 15 16:57:40 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 15 16:57:40 2024 +0100" }, "message": "Merge \"tc: update UART base for TFTF\"" }, { "commit": "2a5abadb8e841eedeaa1ff78b6f0da5f957b2ab8", "tree": "42755e1512d2cf0d6abf3f0baa01a289d2a69e46", "parents": [ "21a30ed1ae35a8b32d23e96cdc143702a27bda90" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Jan 17 13:48:44 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Feb 14 12:51:31 2024 +0100" }, "message": "test(realm): add test for FEAT_DIT\n\nAdd testcase to enable FEAT_DIT in realm.\nTest if DIT Bit is preserved across context switch RL/NS.\n\nChange-Id: I26cbaaf669b53ecba14a451955b6f847c45e0575\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "21a30ed1ae35a8b32d23e96cdc143702a27bda90", "tree": "bd1d61a86ff59e96c33a98a036e542f43ce185df", "parents": [ "a8deec5c0b51719b1f268e4f106c3a095a387074" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Sat Jan 13 23:07:43 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Feb 14 12:51:31 2024 +0100" }, "message": "test(realm): test realm pauth state is preserved\n\nModify Pauth lib to work for multiple CPU\nTest if Realm pauth state is preserved for all RECs\non context switch to RMM/NS.\n\nChange-Id: Ibb393b415bab27066289b560be49e02d0c8f58ba\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "4f35ce6fcbb68fc1f2fb48df7f66ad0fd494a061", "tree": "18660e8c58860af4ed31186704b908c918c7201e", "parents": [ "1abd0d2332d79ef7e2889d648cd093bb90e10bf3" ], "author": { "name": "Manish V Badarkhe", "email": "Manish.Badarkhe@arm.com", "time": "Wed Jan 17 13:05:48 2024 +0000" }, "committer": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Tue Feb 13 15:14:34 2024 +0100" }, "message": "tc: update UART base for TFTF\n\nUpdated UART base for TFTF as per the TC memory map.\n\nSigned-off-by: Manish V Badarkhe \u003cManish.Badarkhe@arm.com\u003e\nChange-Id: I98cf5318edcd793cf69ead5e940718e42f25e3c9\n" }, { "commit": "a8deec5c0b51719b1f268e4f106c3a095a387074", "tree": "ba834cd8cd46a432215cc09f6fb8886fc196e8c4", "parents": [ "a3ec1f1762236914d129dd8155d19b149b2c6570", "5d4936a7baed58a73cdf2a2a117e5d0501527237" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Feb 13 09:34:17 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Feb 13 09:34:17 2024 +0100" }, "message": "Merge \"fix: map ns buffer only if needed for SMMU tests\"" }, { "commit": "5d4936a7baed58a73cdf2a2a117e5d0501527237", "tree": "ba834cd8cd46a432215cc09f6fb8886fc196e8c4", "parents": [ "a3ec1f1762236914d129dd8155d19b149b2c6570" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Feb 12 18:49:21 2024 -0600" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Feb 12 18:57:04 2024 -0600" }, "message": "fix: map ns buffer only if needed for SMMU tests\n\nSince SMMU based tests are only supported for FVP platform at the\nmoment, the non-secure memory region used as work buffer for\nSMMU test need not be mapped in the page tables for other platforms.\n\nThis patch helps to fix a hang noticed for TC based spm test.\n\nChange-Id: I137eeea684250f9620b4e6d585018ad3d62178b4\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\n" }, { "commit": "a3ec1f1762236914d129dd8155d19b149b2c6570", "tree": "932c808a0ca57770ecff5fd831ba2eddb0b25f9d", "parents": [ "8e3f5662031f785930f997d713fc1730b101e5bb", "a08c7195558726a2c3abd3bf9167ff4deae7d9e1" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Mon Feb 12 17:31:14 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Feb 12 17:31:14 2024 +0100" }, "message": "Merge changes from topic \"mp/dma_isolation\"\n\n* changes:\n test: exercise DMA isolation for secure access to ns memory\n fix: specify properties to corresponding memory region nodes\n" }, { "commit": "8e3f5662031f785930f997d713fc1730b101e5bb", "tree": "ee4e3153b8563f3a46e0e845fdce0492307645d0", "parents": [ "51e153663b5b31c3d4f7dcdef266a431111d4bad", "7b51dbe9d4739f622f332fd232a3068b99c2bb50" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Feb 08 17:08:05 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 08 17:08:05 2024 +0100" }, "message": "Merge \"refactor(smc_fuzz): performance enhancement\"" }, { "commit": "51e153663b5b31c3d4f7dcdef266a431111d4bad", "tree": "3a05dab054068d29e8b242f8f82daa4a864468e9", "parents": [ "fd35f0a4d6125bb1fa69a671a6d2d42628229609", "b027f5706308502152b5aade0ad509ba27370c42" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Feb 08 16:23:30 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 08 16:23:30 2024 +0100" }, "message": "Merge \"test(realm): add testcase for Synchronous external aborts\"" }, { "commit": "b027f5706308502152b5aade0ad509ba27370c42", "tree": "3a05dab054068d29e8b242f8f82daa4a864468e9", "parents": [ "fd35f0a4d6125bb1fa69a671a6d2d42628229609" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Jan 02 22:00:29 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Feb 08 12:14:31 2024 +0100" }, "message": "test(realm): add testcase for Synchronous external aborts\n\nAdd testcase to cause instruction or data abort in Realm by\naccessing addr with\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dEMPTY\n* HIPAS\u003dASSIGNED and RIPAS\u003dEMPTY\n* Unprotected IPA\n* Host injected SEA after Data abort\n\nChange-Id: I6be546c042b4983670fb7c27fca74649c68787be\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "a08c7195558726a2c3abd3bf9167ff4deae7d9e1", "tree": "3701dcb74085676d356e05b92f201e2e6800860b", "parents": [ "9fd0a9a2342668fa12cf2b15bc83be907899b8a4" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Oct 18 17:49:32 2023 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Feb 07 17:03:56 2024 -0600" }, "message": "test: exercise DMA isolation for secure access to ns memory\n\nThis test helps to validate a scenario where a secure stream\nbelonging to Cactus SP accesses non-secure IPA space.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I8085f2974d53b9cec9b3ae4a17fd328607b76e2b\n" }, { "commit": "9fd0a9a2342668fa12cf2b15bc83be907899b8a4", "tree": "83b8c02ba5029512d08168440629cf6ac7adceb0", "parents": [ "fd35f0a4d6125bb1fa69a671a6d2d42628229609" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Sep 11 15:46:50 2023 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Feb 07 17:03:56 2024 -0600" }, "message": "fix: specify properties to corresponding memory region nodes\n\nThe following properties must be specified in the memory region\nnodes for the corresponding address space to be visible to the\nupstream DMA device:\n1) stream-ids: identity of the streams generated by the device.\n2) smmu-id: identity of the SMMU IP that the device is upstream of.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: Iaa894a0b0ac9b564bd2c822af6630f3207bf8e8c\n" }, { "commit": "fd35f0a4d6125bb1fa69a671a6d2d42628229609", "tree": "bf1c92d316299405b3751e62e904616f2f81e0a3", "parents": [ "69c9f363cb172788ef7e8d3fd711f56ddf481bf8", "e742ba89effefc4298fb4e406e0515a83db9c7e0" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed Feb 07 17:22:13 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 07 17:22:13 2024 +0100" }, "message": "Merge changes from topic \"ja/spm_rme\"\n\n* changes:\n refactor: cactus to handle expect exception\n test(memory share): memory contents checks\n refactor(spm): clean-up after failed memory share\n test(spm): lend/donate realm memory\n test(spm): use all constituents of memory share\n test(spm): validate GPC with memory sharing\n test(memory share): leverage rme for lend/donate\n" }, { "commit": "69c9f363cb172788ef7e8d3fd711f56ddf481bf8", "tree": "e6c01f0aef5f40fb28fce239d095d9236e7fa762", "parents": [ "4984ea7561a8bc3daefb2971594e3ff59fa3177a", "8ea96f636ebc984f6f69144a6b6ca1f84aa03900" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Wed Feb 07 14:14:51 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 07 14:14:51 2024 +0100" }, "message": "Merge changes from topic \"xlnx_versal_net_fix\"\n\n* changes:\n feat(versal-net): remove TSP tests from skip list\n fix(versal-net): correct core position function\n" }, { "commit": "4984ea7561a8bc3daefb2971594e3ff59fa3177a", "tree": "1c2b20b14f9bf6a1b43bbee538bcaf852e3d3e8b", "parents": [ "8469257f30b94e749c339d193a2f680ef701b380", "e68494eb130e2c8021ca4af626a9cb1df8d67dbd" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Wed Feb 07 11:16:36 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 07 11:16:36 2024 +0100" }, "message": "Merge changes Ic04c0dda,I350957ac,Idb838bd8\n\n* changes:\n test(realm): add testcase for REC exit due to Data/Instr abort\n fix(realm): fix realm destroy api\n test(realm): remove unwanted host_rmi_rtt_init_ripas\n" }, { "commit": "e742ba89effefc4298fb4e406e0515a83db9c7e0", "tree": "c3d9688ea07be06ac244e757faebdb1c76bb329b", "parents": [ "c2e32ed038aa54ae9c5d35362dc3c2fffc55fdb3" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 11 10:38:29 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "refactor: cactus to handle expect exception\n\nIn the test \u0027rl_memory_cannot_be_accessed_in_s\u0027, tftf\nshares memory to the SP that it changed to realm PAS.\n\nThe access from the SP should result in an exception.\nCactus receives an indication it should expect an\nexception on memory access via the arguments of the\n\u0027cactus_mem_send_cmd\u0027 request. This is used to avoid\nthe reads to check memory, which could return in an error\nresponse, which would make the test falsely fail.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ie220d4bab04c052a73e8b04c8667c9973b95a9e0\n" }, { "commit": "c2e32ed038aa54ae9c5d35362dc3c2fffc55fdb3", "tree": "449fb0a27b10806227d86762b9d27f53a8e35402", "parents": [ "b122eea5195b23c3e27fc8a28bc7dccf3623894a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Dec 04 13:22:44 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(memory share): memory contents checks\n\nIn RME enabled systems, the memory is expected to be\nscrubbed on PAS updates from S to NS. As well, it is likely\nthat the memory addresses are shadowed, and the contents are not\nvisible accross updates from the different address spaces.\nAs such, the SP shall not rely on memory content to be\nin any form. FFA_MEM_LEND/FFA_MEM_DONATE are thus considered\nfor memory allocation purposes.\n\nThis patch changes the memory sharing tests, to cater\nfor the correct assumptions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I78ed47df789dda1d695e2e52b0df8c28b12658da\n" }, { "commit": "b122eea5195b23c3e27fc8a28bc7dccf3623894a", "tree": "e891429587f817ef4eae9329f5063466824bd886", "parents": [ "3be0efa1d92003476d89f448502927660d747b1a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Oct 11 16:59:46 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "refactor(spm): clean-up after failed memory share\n\nClean-up after failed memory share test, to allow for subsequent\ntests to still provide meaningful test results.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ic763fb64c0948c19e6b7d7f99119b20cc05fc83b\n" }, { "commit": "3be0efa1d92003476d89f448502927660d747b1a", "tree": "1822e848bd7dd29c2213d9955249686df23c8969", "parents": [ "72f002936b6978078674dd1ed69c622220c90196" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Oct 02 19:11:11 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): lend/donate realm memory\n\nValidate if memory gets delegated to a realm PAS, it can\u0027t be used\nin FF-A memory lend/donate from NS to SWd.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I16c9b7193b4ae8f56b1182e3b28d13a742bfcd4e\n" }, { "commit": "72f002936b6978078674dd1ed69c622220c90196", "tree": "8a4c1f8adead9f77e0703a8e4c421d7b309919d5", "parents": [ "8083db2a0878011f16c549c7546331f255aa4658" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jan 08 11:31:45 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): use all constituents of memory share\n\nOn memory sharing operation use all the constituents within the\ncomposite.\n\nExtended memory lend operation test to include multiple scattered\npages to make sure the update to security state is happening\nto all memory regions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I2179df12ca63636bdb6489eea77e809422f95430\n" }, { "commit": "8083db2a0878011f16c549c7546331f255aa4658", "tree": "e9698ebfcb4185f174e05eaf57ff3721ceaf6074", "parents": [ "d39aa5b579411c1481efaf637ef44869831f7b7b" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jun 27 17:22:58 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): validate GPC with memory sharing\n\nValidate during the lend/donate with the SWd, when RME\nis in the platform of test, if the NWd attempts to access\nthe memory it will trigger a fault due to Granule Protection\nChecks (GPC).\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ibab25e7e56abaa28ae077d8b8c2c7cd377ccf515\n" }, { "commit": "d39aa5b579411c1481efaf637ef44869831f7b7b", "tree": "bc3ed3c9b3ae43b5accb744060ac28d3f8907c0d", "parents": [ "8469257f30b94e749c339d193a2f680ef701b380" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 24 10:21:46 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(memory share): leverage rme for lend/donate\n\nAdd the memory sharing test suite to invalid-access, and rename\nit to memory-access.\nIn such configuration the TF-A is meant to provide services\naccessible via SMC, to update the security state of the memory\nlent/donated between NWd to SWd.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4a6f2de612dbd9de2db757e3baf2613c47b8a09b\n" }, { "commit": "8469257f30b94e749c339d193a2f680ef701b380", "tree": "ef9fa2fa0f5db326312038d139822180486524d3", "parents": [ "bca7a3ab0f23de5b4c135eb21fa4b80209d86118", "1abd0d2332d79ef7e2889d648cd093bb90e10bf3" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Tue Feb 06 14:59:48 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Feb 06 14:59:48 2024 +0100" }, "message": "Merge changes from topic \"ja/cactus_ffa_console\"\n\n* changes:\n fix(spm): logs with errors in verbose builds\n refactor: first cactus SP to drop uart\n" }, { "commit": "8ea96f636ebc984f6f69144a6b6ca1f84aa03900", "tree": "a069544769f52840ff5d0a018bdde6a8da45a23b", "parents": [ "0137d4b08486ebb979ff0dfa5a41f25ef422f933" ], "author": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Mon Feb 05 14:10:53 2024 +0530" }, "committer": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Tue Feb 06 15:58:49 2024 +0530" }, "message": "feat(versal-net): remove TSP tests from skip list\n\nAll of these tests are passing on the target, so removing\nthem from the skip list.\n\nSigned-off-by: Prasad Kummari \u003cprasad.kummari@amd.com\u003e\nChange-Id: Ieaba2634f0501e3815c1d6ef1503a37908bcfcc1\n" }, { "commit": "0137d4b08486ebb979ff0dfa5a41f25ef422f933", "tree": "6a189e1e18e9e025a62f93f43aaac0babfef219e", "parents": [ "bca7a3ab0f23de5b4c135eb21fa4b80209d86118" ], "author": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Thu Feb 01 09:55:56 2024 +0530" }, "committer": { "name": "Prasad Kummari", "email": "prasad.kummari@amd.com", "time": "Tue Feb 06 15:49:18 2024 +0530" }, "message": "fix(versal-net): correct core position function\n\nThe corrected calculation of core positions involves utilizing the\nlinear core and cluster IDs from an MPID register. The MPID register\ncomprises three affinity levels: Aff0 (bits 0 to 7), Aff1 (bits 8 to 15),\nand Aff2 (bits 16 to 23).\n\nIn the current implementation of platform_get_core_pos(), the function\nreads the MPIDR_AFF0_SHIFT (0 to 7 bits) for the core ID and\nMPIDR_AFF1_SHIFT (8 to 15 bits) for the cluster ID. For example, in\nthe output \"CPU #10 [MPID: 0x1020200],\" it incorrectly returns the\ncore position as 8 instead of the expected core position 10.\n\nIn the updated implementation of the platform_get_core_pos() function,\nthe core ID is determined by reading the bits corresponding to Affinity\nlevel 1 (MPIDR_AFF1_SHIFT), and the cluster ID is determined by reading\nthe bits corresponding to Affinity level 2 (MPIDR_AFF2_SHIFT).\n\nTo address this issue and obtain the correct core ID, it is necessary\nto read affinity level 1 bits. Additionally, affinity level 2 should\nbe read to determine the cluster ID. A check has been incorporated to\nverify the MT bit in MPIDR for enabled status, leading to a modification\nin cluster/core calculation. Additionally, it is necessary to define\nPLAT_MAX_PE_PER_CPU for the affinity test.\n\nSigned-off-by: Prasad Kummari \u003cprasad.kummari@amd.com\u003e\nChange-Id: I07573e82908ec6f2404423d61639646d411502cd\n" }, { "commit": "e68494eb130e2c8021ca4af626a9cb1df8d67dbd", "tree": "894c262fc0aa78dcbe3b28cc6b731df068a404b6", "parents": [ "daa6c795847b78692f522fd96f783a6d419aaec2" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Nov 06 11:04:57 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "test(realm): add testcase for REC exit due to Data/Instr abort\n\nAdd testcase to cause instruction or data abort in Realm by\naccessing addr with\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dDESTROYED\n* HIPAS\u003dASSIGNED and RIPAS\u003dDESTROYED\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dRAM\nVerify rec exit due to abort\n\nChange-Id: Ic04c0ddaf1b18ec0cfd71c28753c4ed7298302da\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "daa6c795847b78692f522fd96f783a6d419aaec2", "tree": "34ac7b861c0b9f264f21c1eeae2cdfc7cf8e52fd", "parents": [ "f33e3a6f851ef61d4271be6446278123bc6633a2" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Jan 11 15:06:29 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "fix(realm): fix realm destroy api\n\nAPI failed to destroy realms in new state,\nfix the assumption that no recs were created if realm is in new state\nDestroys all rec and realm properly.\n\nChange-Id: I350957acfa1ba1446a3028e6c277625ca76486b0\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f33e3a6f851ef61d4271be6446278123bc6633a2", "tree": "206b6e67ebd432ff5383c8a8cabb14abb3536478", "parents": [ "bca7a3ab0f23de5b4c135eb21fa4b80209d86118" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Dec 22 13:52:37 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "test(realm): remove unwanted host_rmi_rtt_init_ripas\n\nRemove unwanted host_rmi_rtt_init_ripas\nfrom host_realm_map_protected_data API\n\nChange-Id: Idb838bd824ab663ded5d08ca08211e0116daa64d\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "bca7a3ab0f23de5b4c135eb21fa4b80209d86118", "tree": "93f5f0e23bdd2d023e518fcccff135b73ef01c4a", "parents": [ "7c38019d7272c296cba1f97316f296cb86e058b7", "d655d58c0c4791c10ad811a5f8bd66e0c1a8d989" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Feb 05 23:33:56 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Feb 05 23:33:56 2024 +0100" }, "message": "Merge \"feat(cactus): add support for fake RAS handler command\"" }, { "commit": "7c38019d7272c296cba1f97316f296cb86e058b7", "tree": "0e7dd99555063ff7bf2d99a177d2e8a8587863cd", "parents": [ "0945e23153c06ed196756ac094c81ab8627d9a95", "a404b851f4fc008d3dde50bc872449e3e4489e29" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Feb 05 10:40:50 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Feb 05 10:40:50 2024 +0100" }, "message": "Merge \"docs: update links to TF-A Tests issues tracker\"" }, { "commit": "7b51dbe9d4739f622f332fd232a3068b99c2bb50", "tree": "ec009a4479242e55a6a863d2dc6fb5b10966796b", "parents": [ "6eec0b422131e94e9c602e5560a432b36b97f703" ], "author": { "name": "mardyk01", "email": "mark.dykes@arm.com", "time": "Wed Jan 17 15:25:36 2024 -0600" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Fri Feb 02 13:50:12 2024 -0600" }, "message": "refactor(smc_fuzz): performance enhancement\n\nAdd the ability to return integer rather than string from fuzzer\nfunction. This will improve performance especially for larger fuzz\nbased testing. This will work in tandem with the changes to the CI where\nthe script flows provide additional support for the change. Modifications\nto the device tree files have been made to prevent name clashes with\nthe function names.\n\nChange-Id: I95aaf23c95943f944d5837e2a8440514aafd6dde\nSigned-off-by: mardyk01 \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "1abd0d2332d79ef7e2889d648cd093bb90e10bf3", "tree": "720447f478c9e5ae6b5c1720419fed5c63da4b73", "parents": [ "f3ea1a8a01aa7e6181677c7d94654891903de9e4" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jan 17 11:31:57 2024 +0000" }, "committer": { "name": "Manish V Badarkhe", "email": "Manish.Badarkhe@arm.com", "time": "Wed Jan 31 19:18:57 2024 +0000" }, "message": "fix(spm): logs with errors in verbose builds\n\nFix few instances with verbose logs that contained\nbuild errors.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I08a2c23d831e5882939efce655c9c95485e2c9b9\n" } ], "next": "f3ea1a8a01aa7e6181677c7d94654891903de9e4" }