)]}' { "log": [ { "commit": "c1136a849fc21470313e4e852a22ae4b9db50440", "tree": "b6b5e8854589497f4e2d2c159f0bd2e590dcd8c5", "parents": [ "d179ddcc64cac3b319b301cfe6c1bc32c1ea0eaf" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Wed Apr 12 15:24:44 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Wed May 24 13:40:42 2023 +0100" }, "message": "tftf(rme): intermittently switch to Realm while doing NS SVE ops\n\nInterleave NS SVE operations with Realm SVE operations and check whether\nSVE vectors are not affected.\n\nThis test also configures SVE op array and SVE vector length with random\nvalue in NS and Realm for test each iteration.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I7a9ba4bd0d298f187baa3048ec622eb97ec3d99f\n" }, { "commit": "d179ddcc64cac3b319b301cfe6c1bc32c1ea0eaf", "tree": "f7ff4f156a0bf64c0f186e057dea7243ecc3ab8c", "parents": [ "0bbdc2dff449036aa65e4c53cd351d01484e0d23" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Wed Apr 12 10:41:42 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Wed May 24 13:40:39 2023 +0100" }, "message": "refactor(sve): move sve operations to a lib routine\n\nThis patch moves the SVE subtract operation to a common sve library\nroutine and takes a callback function that does the world switch while\nSVE operations are done in a loop.\n\nThe callback is invoked after z0, z1 vectors are loaded and before\nthe calculated results are stored back in the vector registers.\n\nThis refactoring later helps to use this function to do context switch\nfrom NS to Secure world or from NS to Realm world based on the\ncallback type.\n\nThis patch also moves the SVE fill vector registers, read vector\nregisters to a common sve library routine.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Iceb34b96fa85597be63a50c429ae0eb29f8fcaf8\n" }, { "commit": "0bbdc2dff449036aa65e4c53cd351d01484e0d23", "tree": "60f35abe7f72ade6409b3ffcd46262502a9b6885", "parents": [ "ed7cdc8b28137ab15d9f263825674d156b3c2b30" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Wed Apr 05 15:30:18 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Thu May 18 16:08:39 2023 +0100" }, "message": "feat(rme): add SVE Realm tests\n\nVerifies Realm with SVE support. Below tests are added\n- Check whether RMI features reports proper SVE VL\n- Create SVE Realm and check rdvl result\n- Create SVE Realm with invalid VL and check if it fails\n- Create SVE Realm and test ID registers\n- Create non SVE Realm and test ID registers\n- Create SVE Realm and probe all supported VLs\n- Check RMM preserves NS ZCR_EL2 register\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I98a20f34ce72c7c1a353ed13678870168fa27c48\n" }, { "commit": "ed7cdc8b28137ab15d9f263825674d156b3c2b30", "tree": "4e18407b2b2676f0ccddfc3aec4397981484c6ed", "parents": [ "8b2e34659a9c44a24c116a30c379aa93a007dff6", "5eceaa38c11f77c20f2a8c3e784512a41a2c4905" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue May 16 16:25:13 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue May 16 16:25:13 2023 +0200" }, "message": "Merge \"docs: update ubuntu version used\"" }, { "commit": "5eceaa38c11f77c20f2a8c3e784512a41a2c4905", "tree": "4e18407b2b2676f0ccddfc3aec4397981484c6ed", "parents": [ "8b2e34659a9c44a24c116a30c379aa93a007dff6" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri May 12 15:03:02 2023 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Mon May 15 21:22:15 2023 +0100" }, "message": "docs: update ubuntu version used\n\nIn CI we have moved to jammy docker images based out of ubuntu 22.04,\nupdating docs to reflect that.\n\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\nChange-Id: I9fc2eeb29ca6d677f640cbe1c4caa09842e12aa4\n" }, { "commit": "8b2e34659a9c44a24c116a30c379aa93a007dff6", "tree": "cbfcf151e985e83a2168144c3458f6d3f3eeb129", "parents": [ "dd2d2228c3c6867b1b29d9b0a4323685980e4093", "ae1bd6f29d62f0b0b3bdc637a7b80d776220cb33" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri May 12 13:10:06 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 12 13:10:06 2023 +0200" }, "message": "Merge \"Revert \"test(interrupts): add tests for interrupt routing\"\"" }, { "commit": "ae1bd6f29d62f0b0b3bdc637a7b80d776220cb33", "tree": "cbfcf151e985e83a2168144c3458f6d3f3eeb129", "parents": [ "dd2d2228c3c6867b1b29d9b0a4323685980e4093" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri May 12 11:42:21 2023 +0100" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri May 12 12:02:35 2023 +0100" }, "message": "Revert \"test(interrupts): add tests for interrupt routing\"\n\nThis reverts commit 353a6cebde2586a866142f7dfbc6b8df644d03cd.\n\nReverting due to failure in Arm internal RMM CI which stops tagging of\nrc0 for v2.9 release, Once the proper fix is found it will be taken\nback either in next tag or after v2.9 release.\n\nFailure log:\nSMC_RMM_VERSION \u003e 380000\nRMM version is: 56.0\n\u003e Executing \u0027Realm payload multi CPU request\u0027\nSMC_RMM_VERSION \u003e 380000\nINFO: Booting\nSMC_RMM_VERSION \u003e 380000\nINFO: Powering off\nINFO: Booting\nSMC_RMM_VERSION \u003e 380000\nINFO: Powering off\nINFO: Booting\nSMC_RMM_VERSION \u003e 380000\nINFO: Powering off\nINFO: Booting\nSMC_RMM_VERSION \u003e 380000\nINFO: Powering off\nSMC_RMM_VERSION \u003e 380000\nINFO: Powering off\nINFO: Booting\nSMC_RMM_VERSION \u003e 380000\nINFO: Powering off\nERROR: Error: fffffffa\nPANIC in file: spm/cactus/cactus_main.c line: 108\n\nChange-Id: Id5179deb5324c1bd2fac41c7a030bf7e09a1c222\n" }, { "commit": "dd2d2228c3c6867b1b29d9b0a4323685980e4093", "tree": "c498aead8680c2807f0a716c681ced2f9f011cfb", "parents": [ "c61a188e932400ab599e0a4d4b07c2df532f3590", "353a6cebde2586a866142f7dfbc6b8df644d03cd" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu May 11 05:42:05 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu May 11 05:42:05 2023 +0200" }, "message": "Merge \"test(interrupts): add tests for interrupt routing\"" }, { "commit": "353a6cebde2586a866142f7dfbc6b8df644d03cd", "tree": "c498aead8680c2807f0a716c681ced2f9f011cfb", "parents": [ "c61a188e932400ab599e0a4d4b07c2df532f3590" ], "author": { "name": "Raghu Krishnamurthy", "email": "raghu.ncstate@gmail.com", "time": "Mon Jan 16 19:44:03 2023 -0800" }, "committer": { "name": "Raghu Krishnamurthy", "email": "raghu.ncstate@gmail.com", "time": "Wed May 10 15:21:18 2023 -0700" }, "message": "test(interrupts): add tests for interrupt routing\n\nThis patch modifies existing secure interrupt tests to test interrupt\nrouting to particular cores/mpidr. Hafnium added a new field\n\"interrupts-target\" to enable targeting interrupts to cores that are NOT\nthe boot core. This change modifies the cactus manifest to target the\nsecure watchdog timer (existing secure interrupt on fvp) to a particular\nmpidr. To test interrupt handling, it converts the existing tests that\nuse the secure watchdog timer to test interrupt handling, to multi\ncore tests, such that the same test runs on the appropriate mpidr as\nopposed to the boot core. Since the interrupt may be targeted to a\nsecondary PE, the corresponding secondary vcpus of cactus need a round\nof ffa_run to function, which has also been added.\nThe mpidr to target to is platform specific and is defined as a platform\nspecific macro.\n\nSigned-off-by: Raghu Krishnamurthy \u003craghu.ncstate@gmail.com\u003e\nChange-Id: I27f48cde68945e59fb2ce84625ca145048eaffd1\n" }, { "commit": "c61a188e932400ab599e0a4d4b07c2df532f3590", "tree": "cbfcf151e985e83a2168144c3458f6d3f3eeb129", "parents": [ "308ef009fd9ab3126f4aa3c4caa1ea75f5f9c589", "073842171ae9d91b3bdc2031905faafabc7abe57" ], "author": { "name": "Bipin Ravi", "email": "bipin.ravi@arm.com", "time": "Wed May 10 22:16:15 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed May 10 22:16:15 2023 +0200" }, "message": "Merge \"Add tests for Errata management firmware interface.\"" }, { "commit": "308ef009fd9ab3126f4aa3c4caa1ea75f5f9c589", "tree": "a7a71bd96eb9aca4560dd96bca65071df3792bc3", "parents": [ "545ec4644c46285598b01413e6006819cceb7af4", "1421d7775f0af3e2bb443647e0ebe43659211cc6" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Tue May 09 14:35:58 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue May 09 14:35:58 2023 +0200" }, "message": "Merge \"fix(build): allow lower address access with gcc-12\"" }, { "commit": "1421d7775f0af3e2bb443647e0ebe43659211cc6", "tree": "a7a71bd96eb9aca4560dd96bca65071df3792bc3", "parents": [ "545ec4644c46285598b01413e6006819cceb7af4" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri May 05 09:15:43 2023 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Tue May 09 01:59:08 2023 +0100" }, "message": "fix(build): allow lower address access with gcc-12\n\nWith gcc-12 any lower address access can trigger a warning/error\nthis would be useful in other parts of system but in TFTF\nthere are various reasons to access to the lower address ranges for\ntests, example using mmio_read_*/writes_*\n\nSo setup to allow access to lower addresses while using gcc-12\n\nChange-Id: I3153fd4545e79d14151249fcb5a395c9e61a771a\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "073842171ae9d91b3bdc2031905faafabc7abe57", "tree": "d1b64e32752d2bd8ca31004cb2ee7955f4b7d6ad", "parents": [ "83fe74900c440b2728c458efd8b1c57be20ba039" ], "author": { "name": "Sona Mathew", "email": "SonaRebecca.Mathew@arm.com", "time": "Mon Nov 28 13:19:11 2022 -0600" }, "committer": { "name": "Sona Mathew", "email": "SonaRebecca.Mathew@arm.com", "time": "Mon May 08 18:19:04 2023 -0500" }, "message": "Add tests for Errata management firmware interface.\n\nAdd tests to confirm that the em_version, em_features and\nem_cpu_erratum_features calls conform to the errata abi spec.\n\nSigned-off-by: Sona Mathew \u003cSonaRebecca.Mathew@arm.com\u003e\nChange-Id: I8395026acc004a10d8c2c17ec689f4e0752143d8\n" }, { "commit": "545ec4644c46285598b01413e6006819cceb7af4", "tree": "8b1bbbce2ce2ae4c59c8af1b249c96bd3435e42b", "parents": [ "83fe74900c440b2728c458efd8b1c57be20ba039", "cbd8989c93c56bd992cf4998226ed6b247d32954" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon May 08 20:31:29 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon May 08 20:31:29 2023 +0200" }, "message": "Merge \"test: group0 interrupt triggers while VM/SP is running\"" }, { "commit": "cbd8989c93c56bd992cf4998226ed6b247d32954", "tree": "8b1bbbce2ce2ae4c59c8af1b249c96bd3435e42b", "parents": [ "83fe74900c440b2728c458efd8b1c57be20ba039" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Feb 17 14:56:02 2023 -0600" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon May 08 08:41:38 2023 -0500" }, "message": "test: group0 interrupt triggers while VM/SP is running\n\nThis patch introduces two tests for TC platform to ensure the\nplatform firmware handles Group0 secure interrupt and resumes the\nexecution of preempted endpoint context(a VM in normal world as well\nas an SP in secure world).\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I8c4b23497eab143773dd7ab9372a05760ce78881\n" }, { "commit": "83fe74900c440b2728c458efd8b1c57be20ba039", "tree": "65a7c9ba3c70edd635a43d4aa869508a4bee6a07", "parents": [ "2dfb70fe3614b818bc86b247cf84230ec4c93afc", "6c6bc8ab7d93014fc6b3c7ee0c23c0afdebabf9c" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri May 05 21:49:25 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 05 21:49:25 2023 +0200" }, "message": "Merge \"fix(tftf) : add alignment to FPU state structure\"" }, { "commit": "6c6bc8ab7d93014fc6b3c7ee0c23c0afdebabf9c", "tree": "65a7c9ba3c70edd635a43d4aa869508a4bee6a07", "parents": [ "2dfb70fe3614b818bc86b247cf84230ec4c93afc" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri May 05 17:34:05 2023 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri May 05 17:49:56 2023 +0100" }, "message": "fix(tftf) : add alignment to FPU state structure\n\nThis patch adds 16 byte alignment to FPU structure.\nWithout this change, the load/str instruction for\nFPU might fail depending on compiler.\n\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\nChange-Id: If41f1625218c47f7801be80a3532ff782525d5ad\n" }, { "commit": "2dfb70fe3614b818bc86b247cf84230ec4c93afc", "tree": "18ad9319cf8ada31c08e0223b8a6279466d62a99", "parents": [ "31d4a43c70eb262e8bd76de5a0e794cf1ada6960", "369955abac0a083f57bfb787eeda82a511eb8fc0" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri May 05 17:14:28 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 05 17:14:28 2023 +0200" }, "message": "Merge changes I6da5fd33,I88f0a9f7\n\n* changes:\n test(tftf): test FPU state registers context is preserved in RL/SE/NS\n refactor(tftf): move SIMD/FPU save/restore routine to common lib\n" }, { "commit": "31d4a43c70eb262e8bd76de5a0e794cf1ada6960", "tree": "9b9c1fa40085b32aee0e2a6c997fd607330dfd81", "parents": [ "27479ee85d80268db99f77eea033a691a0bfda56", "3cb7425a846213d03b402bb5f3c1968af76442df" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri May 05 16:47:23 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 05 16:47:23 2023 +0200" }, "message": "Merge \"refactor(cactus): use FFA_CONSOLE_LOG for debug logs\"" }, { "commit": "369955abac0a083f57bfb787eeda82a511eb8fc0", "tree": "54a35fd1b033a708569c91f2dfb1e1516d690cec", "parents": [ "38133fa69bfefab6e3d1d7461b42c806d36ae33b" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Apr 19 18:05:56 2023 +0100" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri May 05 13:56:12 2023 +0100" }, "message": "test(tftf): test FPU state registers context is preserved in RL/SE/NS\n\nTest that FPU/SIMD state are preserved during a randomly context switch\nbetween secure/non-secure/realm(R-EL1)worlds.\nFPU/SIMD state consist of the 32 SIMD vectors, FPCR and FPSR registers,\nthe test runs for 1000 iterations with random combination of:\nSECURE_FILL_FPU, SECURE_READ_FPU, REALM_FILL_FPU, REALM_READ_FPU,\nNONSECURE_FILL_FPU, NONSECURE_READ_FPU commands,to test all possible\nsituations of synchronous context switch between worlds, while the\ncontent of those registers is being used.\n\nSigned-off-by: Nabil Kahlouche \u003cnabil.kahlouche@arm.com\u003e\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\nChange-Id: I6da5fd334777000111924bb1239b77123a3dcea6\n" }, { "commit": "38133fa69bfefab6e3d1d7461b42c806d36ae33b", "tree": "3a4ff89fad7a2c24f9d61c1cf28e0d073310ea05", "parents": [ "27479ee85d80268db99f77eea033a691a0bfda56" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Apr 19 17:00:38 2023 +0100" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri May 05 13:55:50 2023 +0100" }, "message": "refactor(tftf): move SIMD/FPU save/restore routine to common lib\n\n- Move FPU routines to common lib\n- FPU/SIMD state consist of the 32 SIMD vectors, FPCR and FPSR registers\n- Test that FPU/SIMD state are preserved during a context switch\n between secure/non-secure.\n\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\nChange-Id: I88f0a9f716aafdd634c4eae5b885f839bb3deb00\n" }, { "commit": "27479ee85d80268db99f77eea033a691a0bfda56", "tree": "1ef6908499a8986f053c4423135f525b77fd93d9", "parents": [ "cd657794037cdba777541fa1bc391ffd01384c69", "25d9e2f292fa3a44755a86094ca13c22a11974cd" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri May 05 14:52:55 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 05 14:52:55 2023 +0200" }, "message": "Merge \"fix(build): resolve build issue for older toolchains\"" }, { "commit": "25d9e2f292fa3a44755a86094ca13c22a11974cd", "tree": "1ef6908499a8986f053c4423135f525b77fd93d9", "parents": [ "cd657794037cdba777541fa1bc391ffd01384c69" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri May 05 10:51:57 2023 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri May 05 12:04:56 2023 +0100" }, "message": "fix(build): resolve build issue for older toolchains\n\nThe patch ce37277 introduced support for new toolchain but\nthe LD option supplied is not recognized by older toolchains.\nThis patch fixes the problem by ensuring that the LD option\nis supported before being added to LDFLAGS.\n\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\nChange-Id: I97dbd096c5ade7df92e3217a6b218c2258ac001e\n" }, { "commit": "cd657794037cdba777541fa1bc391ffd01384c69", "tree": "e1c54db1d205c73c9b2f74dddc1580fab85a8303", "parents": [ "525ec410c0dc991d1470084747a8f31a17f09841", "ce372779a0b9958ed34de61a63a7ce058f43fb2a" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri May 05 10:49:05 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 05 10:49:05 2023 +0200" }, "message": "Merge changes from topic \"jc/toolchain_update_2.9\"\n\n* changes:\n feat(build): add support for new binutils versions\n docs: update toolchain requirements documentation\n" }, { "commit": "525ec410c0dc991d1470084747a8f31a17f09841", "tree": "028b2c2d7237e5da5fd4be83365633e6438e24f8", "parents": [ "0c762d408014fe03ca648296ffdeee47842c47cf", "4b22111264f612da90789dc207d2c874817d9291" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu May 04 17:34:53 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu May 04 17:34:53 2023 +0200" }, "message": "Merge \"refactor(rme): add helper macro for RME tests\"" }, { "commit": "ce372779a0b9958ed34de61a63a7ce058f43fb2a", "tree": "88a64cef3b6f3c3c903a4f47053b89e9f9cf1b92", "parents": [ "968c95f4e9e33e2504db42c41670ab021bd5bdb0" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Fri Apr 21 11:40:22 2023 +0100" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Thu May 04 14:41:44 2023 +0100" }, "message": "feat(build): add support for new binutils versions\n\nUsers of GNU ld (BFD) from binutils 2.39+ will observe multiple instaces\nof a new warning when linking the tftf.elf in the form:\n\nld.bfd: warning: tftf.elf has a LOAD segment with RWX permissions\n\nThese new warnings are enbaled by default to secure elf binaries:\n - https://sourceware.org/git/?p\u003dbinutils-gdb.git;a\u003dcommit;h\u003dba951afb99912da01a6e8434126b8fac7aa75107\n - https://sourceware.org/git/?p\u003dbinutils-gdb.git;a\u003dcommit;h\u003d0d38576a34ec64a1b4500c9277a8e9d0f07e6774\n\nLinux kernel fixed it as listed here:\nhttps://lore.kernel.org/all/20220810222442.2296651-1-ndesaulniers@google.com/\n\nFollowing this, we have resolved the same in TF-A as well:\nhttps://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19401\n\nReplicating the same for TFTF as well, by adding\n--no-warn-rwx-segments since this a ld.bfd related.\n\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\nChange-Id: I191e6c62ca6e437ea8c696d823b44d6c6da48ab6\n" }, { "commit": "0c762d408014fe03ca648296ffdeee47842c47cf", "tree": "269c826939710f95c19f46f0062623a11871976f", "parents": [ "5688e77bb01b2af8efa848771f6570f006247079", "a1bc2b75601c4282bff45642a123f94306b0b491" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu May 04 15:22:00 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu May 04 15:22:00 2023 +0200" }, "message": "Merge changes from topic \"ja/mem_region_fix\"\n\n* changes:\n fix: drop invalid access test from CI\n test(memory sharing): donate consecutively same memory\n refactor(memory sharing): helper functions\n test(spm): validate NWd can\u0027t share forbidden addresses\n" }, { "commit": "5688e77bb01b2af8efa848771f6570f006247079", "tree": "3133572c6430bbe4b37260b192bf28b5e2374f86", "parents": [ "03b60a805e64023c0bccc8ce1105261f1d4aa644", "be3bb7e18df9e944ff5132a03cd45897510444e6" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue May 02 22:53:27 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue May 02 22:53:27 2023 +0200" }, "message": "Merge \"feat(hcx): modified test to also check for reset value\"" }, { "commit": "968c95f4e9e33e2504db42c41670ab021bd5bdb0", "tree": "54641aa242b54b74ad5bd2ceca3debc93b65b632", "parents": [ "03b60a805e64023c0bccc8ce1105261f1d4aa644" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Tue Apr 18 10:46:21 2023 +0100" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Tue May 02 14:50:53 2023 +0100" }, "message": "docs: update toolchain requirements documentation\n\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\nChange-Id: I71c26e77e45a94f9e7d15e7ef5e1ea29eb9567c6\n" }, { "commit": "be3bb7e18df9e944ff5132a03cd45897510444e6", "tree": "ceb09bc5e84f70aba9c8f7bfe6ac93fcdd6bc114", "parents": [ "8d80d6501af8a903b9a828ee57a6f490fc89bc18" ], "author": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Wed Feb 22 10:18:14 2023 -0600" }, "committer": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Fri Apr 28 14:00:13 2023 -0500" }, "message": "feat(hcx): modified test to also check for reset value\n\nPrevious test only checked for the presence of FEAT_HCX.\nHowever, as register HCRX_EL2 is initialized in EL3,\nthe value read from it should be its reset value.\n\nAs the test already existed, there is no new CI config.\nIt can be run by using test group:\ntftf-l2-fvp/fvp-hcx-aarch64-only,fvp-hcx:fvp-tftf-fip.tftf-foundationv8\n\nSigned-off-by: Juan Pablo Conde \u003cjuanpablo.conde@arm.com\u003e\nChange-Id: I7fcd3d868fa4a7b4aee53fe3b141e8da1f670c0a\n" }, { "commit": "03b60a805e64023c0bccc8ce1105261f1d4aa644", "tree": "77fc086e2c38f65d53be717d7ae9cc7d0b77358d", "parents": [ "2a856b5f0b1e9b9183292fb44d3def6fdd69ee7c", "09d2823fbd2402728d10102a4170c5f63909451a" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Apr 28 18:03:25 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 28 18:03:25 2023 +0200" }, "message": "Merge \"feat: unify Firmware First handling of lower el EA\"" }, { "commit": "4b22111264f612da90789dc207d2c874817d9291", "tree": "bebdd61a896deb479ef7598e9fc8f2f0f3615071", "parents": [ "2a856b5f0b1e9b9183292fb44d3def6fdd69ee7c" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Wed Apr 05 14:19:03 2023 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Fri Apr 28 11:40:15 2023 +0100" }, "message": "refactor(rme): add helper macro for RME tests\n\nThis change adds SKIP_TEST_IF_RME_NOT_SUPPORTED_OR_RMM_IS_TRP macro that\nchecks if FEAT_RME is present and RMM is not TRP.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I100e713d8f4fce2826e60909580079834585fddb\n" }, { "commit": "2a856b5f0b1e9b9183292fb44d3def6fdd69ee7c", "tree": "b0d3d8d67c94521b107522dac8631e13bc90b9f8", "parents": [ "d6325a6dee06c281d90e875bc5df2ca4fba9d7f5", "95d5d2764c2f44b06af709dd093e9ff0f17ced14" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Apr 28 11:57:33 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Apr 28 11:57:33 2023 +0200" }, "message": "Merge changes from topics \"jc/feat_sme\", \"jc/feat_sme2\"\n\n* changes:\n feat(sme): add basic SME2 tests\n feat(sme): update sme/mortlach tests\n" }, { "commit": "95d5d2764c2f44b06af709dd093e9ff0f17ced14", "tree": "b0d3d8d67c94521b107522dac8631e13bc90b9f8", "parents": [ "b3ffd3c17ea83c48a90d7165ab5c5140540bc81f" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Mon Jan 16 17:58:47 2023 +0000" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Fri Apr 28 00:51:01 2023 +0100" }, "message": "feat(sme): add basic SME2 tests\n\nFEAT_SME2 introduces an architectural register ZT0 to support\nlookup table feature. This patch ensures that EL3 has\nproperly enabled the SME2 for use at lower exception levels,\nthereby disabling the traps execution at lower exception levels,\nwhen instructions access ZT0 register to EL3.\n\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\nChange-Id: I46d51184b74c1e82c88344530601f2a3c1aee8ea\n" }, { "commit": "b3ffd3c17ea83c48a90d7165ab5c5140540bc81f", "tree": "ae9e356822c85c2d410e761150dcc5fdce6ddb09", "parents": [ "d6325a6dee06c281d90e875bc5df2ca4fba9d7f5" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Mon Feb 13 12:15:11 2023 +0000" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Fri Apr 28 00:50:50 2023 +0100" }, "message": "feat(sme): update sme/mortlach tests\n\nFEAT_SME is an optional architectural extension from v9.2.\nPreviously due to the lack of support in toolchain, testing\nSME instructions were overlooked and minimal tests were added.\n\nThis patch addresses them, with additional tests to test\nthe SME instructions. In order to avoid toolchain requirements\nwe manually encode the instructions for accessing ZA array.\n\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\nChange-Id: Ia9edd2711d548757b96495498bf9d47b9db68a09\n" }, { "commit": "3cb7425a846213d03b402bb5f3c1968af76442df", "tree": "456735d634fc34d463514d601a9cd75a36b8af8f", "parents": [ "d6325a6dee06c281d90e875bc5df2ca4fba9d7f5" ], "author": { "name": "Kathleen Capella", "email": "kathleen.capella@arm.com", "time": "Tue Mar 14 17:51:09 2023 -0400" }, "committer": { "name": "Kathleen Capella", "email": "kathleen.capella@arm.com", "time": "Thu Apr 27 19:35:16 2023 -0400" }, "message": "refactor(cactus): use FFA_CONSOLE_LOG for debug logs\n\nWith the introduction of ffa_console_log abi, implementation-\ndefined debug logging is deprecated. Remove support for\nSPM_DEBUG_LOG and use FFA_CONSOLE_LOG instead.\n\nAlso remove test for FFA_CONSOLE_LOG as it is now used as default\nlogger. Removing it cleans up test prints.\n\nSigned-off-by: Kathleen Capella \u003ckathleen.capella@arm.com\u003e\nChange-Id: Ibe02e14105aaa1658153ba35a5fc8e852ae3f955\n" }, { "commit": "a1bc2b75601c4282bff45642a123f94306b0b491", "tree": "5bb14ac9be67b396d94f6b13e022b7848c6e3c7b", "parents": [ "36c9b0737b302aa72017d141ac8f875563d91e12" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Apr 27 16:20:50 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Apr 27 16:28:46 2023 +0100" }, "message": "fix: drop invalid access test from CI\n\nThe test \"rt_memory_cannot_be_accessed_in_s\" is excluded from\nthe CI runs, as it breaks now due to the memory region harness\nintroduced in the SPM [1].\n\nThe memory that the NWd can share with an SP needs to be known\nand advertised before hand in the SPMC manifest. The test\nis sharing memory that belongs to realm to cause a memory\naccess to the SP. This is was one of the cases that was\nmeant to be prevented with the referred SPM set of patches.\n\nExcluding the test for now, to unblock the changes. The invalid\naccess test needs to be redesigned.\n\n[1] https://review.trustedfirmware.org/q/topic:%22ja%252Fmem_region_fix%22+(status:open%20OR%20status:merged)\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I6913ad9003108559a8c29d7841c2a58b5fdf5552\n" }, { "commit": "09d2823fbd2402728d10102a4170c5f63909451a", "tree": "8c3b318036ef5d58c9574e4064761ca9a68f07bf", "parents": [ "0deeb71affd107b186f636d5b1c04ada4cb7ba5e" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Apr 24 09:48:45 2023 +0100" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Apr 26 17:59:17 2023 +0100" }, "message": "feat: unify Firmware First handling of lower el EA\n\nLower EL External Abort tests were implemented in such a way that after\ntriggering EA in tftf it gets trapped in EL3 and causing a crash in EL3\nBecause of the tests ending up in crash there are few problems:\n - Need to have to seperate tests one each for sync EA and Serror.\n - Unable to test the behaviour of system had the lower EL EA\u0027s been\n properly handled in EL3.\n\nThis patch merges both lower EL injection tests in single test suite and\nexpects a proper handling of lower EL EA\u0027s in TF-A. TF-A build macro\nPLATFORM_TEST_EA_FFH allows fvp to have a proper handling.\n\nThis change will prepare ground for testing EA\u0027s which are caused by\nsyncronization barriers at exception boundry, which needs proper\nhandling of EA and then continue handling the original exception.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I27d6a3d63ec4fc873ce07a55452185b6b6b4281a\n" }, { "commit": "36c9b0737b302aa72017d141ac8f875563d91e12", "tree": "4506f0d70cfd0e6cc000e83b52ddc5fd11b3201c", "parents": [ "7b8f5c0050b04bd61910b445d684a75c2f595cbe" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Mar 17 15:05:41 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Apr 26 12:37:46 2023 +0100" }, "message": "test(memory sharing): donate consecutively same memory\n\nTFTF attempts to donate the same memory address consecutively.\nThe added test validates that such attempt fails, from NWd\ntargetting the SP receiver to the first donate, as well as\nanother SP.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Iee55ebea54beab2499b38372aa2579024237da5f\n" }, { "commit": "7b8f5c0050b04bd61910b445d684a75c2f595cbe", "tree": "b71076c34eae22cba5b09ce0b45631106244b872", "parents": [ "9c088907ef51fea1be1fdb6185e0e541d96068f0" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Mar 17 15:05:13 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Apr 26 12:37:46 2023 +0100" }, "message": "refactor(memory sharing): helper functions\n\nRefactor the memory sharing tests helper functions, to reuse\nthem in the test of subsequent patches.\nFunctions do not use hard-coded memory address and borrower in\nthe memory share operation. Instead, these are provided in the\narguments to the referred functions.\n\nChange-Id: I1fda810e3acde23e33b5bbe06cbbbc0c652eed97\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\n" }, { "commit": "9c088907ef51fea1be1fdb6185e0e541d96068f0", "tree": "5336fd946ddd3a3fa03a093363db0d40f15d3e34", "parents": [ "d6325a6dee06c281d90e875bc5df2ca4fba9d7f5" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Mar 16 18:21:37 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Apr 26 12:37:29 2023 +0100" }, "message": "test(spm): validate NWd can\u0027t share forbidden addresses\n\nValidate that the NWd can\u0027t share memory addresses that are owned\nby SPMC, or the SPs. Such scenario could be used to circumvent\nSPM enforced sandboxing of each SP.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I43abffc0122183222d701c2a44cc806ca620b1ca\n" }, { "commit": "d6325a6dee06c281d90e875bc5df2ca4fba9d7f5", "tree": "5e4d6bbe8e21df2f5bcad7abdbe340d80abff30b", "parents": [ "0deeb71affd107b186f636d5b1c04ada4cb7ba5e", "cd66846bce520895b901fa384d61157d70902944" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Apr 25 15:11:24 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 25 15:11:24 2023 +0200" }, "message": "Merge changes I6f4cfd33,Ie54cfdf4\n\n* changes:\n test(tftf): test Secure interrupt can preempt Realm EL1\n refact(twdog): move trusted wdog API to spm_common\n" }, { "commit": "cd66846bce520895b901fa384d61157d70902944", "tree": "ba6abe80cb997cd79bbdb9f777e300aebcdd0db8", "parents": [ "eb95d1a202832e834d231c9a40ec6bd628d0590f" ], "author": { "name": "nabkah01", "email": "nabil.kahlouche@arm.com", "time": "Sun Nov 06 15:29:44 2022 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Apr 24 14:10:10 2023 +0100" }, "message": "test(tftf): test Secure interrupt can preempt Realm EL1\n\n- Send a direct message request command to first Cactus SP to start the\n trusted watchdog timer.\n- Create and execute a busy loop to sleep the PE in the realm world for\n REALM_TIME_SLEEP ms.\n- Trusted watchdog timer expires during this time which leads to secure\n interrupt being triggered while cpu is executing in realm world.\n- Realm EL1 exits to host, but because the FIQ is still pending,\n the Host will be pre-empted to EL3.\n- Once the SP handles the interrupt, it returns execution back to normal\n world\n- TFTF parses REC\u0027s exit reason(FIQ in this case)\n- TFTF sends direct message request command to first Cactus SP to query\n last serviced interrupt and verifies it is Trusted watchdog interrupt.\n- TFTF disables watchdog and destroys Realm payload on exit.\n\nSigned-off-by: Nabil Kahlouche \u003cnabil.kahlouche@arm.com\u003e\nChange-Id: I6f4cfd334777000d33924bb1239b77182a3dcea6\n" }, { "commit": "0deeb71affd107b186f636d5b1c04ada4cb7ba5e", "tree": "1178fb065b00098cde2a2a385f3521dd4bfdfbc8", "parents": [ "cd6fdd5c6b8fe046ac43438577ae88269205f956", "ff607a231c94e0fe3be7ede00a5beb19bad97846" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Apr 19 16:53:10 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Apr 19 16:53:10 2023 +0200" }, "message": "Merge changes from topic \"ja/mem_region_fix\"\n\n* changes:\n chore: reorder logs in the memory sharing tests\n fix: attributes for ns memory region\n" }, { "commit": "eb95d1a202832e834d231c9a40ec6bd628d0590f", "tree": "8b5a4b63a345ccca05bfbf1e9577a537d51af90b", "parents": [ "cd6fdd5c6b8fe046ac43438577ae88269205f956" ], "author": { "name": "nabkah01", "email": "nabil.kahlouche@arm.com", "time": "Sun Nov 06 15:18:06 2022 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Apr 18 02:35:34 2023 +0100" }, "message": "refact(twdog): move trusted wdog API to spm_common\n\nOther tests cases need same API to enable/disable twdog,\nso we need to move them to common place.\n\nSigned-off-by: Nabil Kahlouche \u003cnabil.kahlouche@arm.com\u003e\nChange-Id: Ie54cfdf44777000dda924bb1239b77182a3dced9\n" }, { "commit": "cd6fdd5c6b8fe046ac43438577ae88269205f956", "tree": "6d3fcea94a26b429ca09de62cabca06225e736f2", "parents": [ "511290ad9c341c54f0ab79687c99275c939aa4ba", "4d1f1122b57525321cec2ee96dddf74b93b67f9f" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Apr 17 15:51:19 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Apr 17 15:51:19 2023 +0200" }, "message": "Merge \"feat(interrupts): support for registering irq handlers\"" }, { "commit": "4d1f1122b57525321cec2ee96dddf74b93b67f9f", "tree": "6d3fcea94a26b429ca09de62cabca06225e736f2", "parents": [ "511290ad9c341c54f0ab79687c99275c939aa4ba" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Thu Mar 16 17:54:24 2023 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Apr 14 14:31:53 2023 -0500" }, "message": "feat(interrupts): support for registering irq handlers\n\nThis patch provides support for registering and unregistering\nhandler that is invoked by Cactus SP while processing virtual\nirq interrupt. For this, we simply repurpose the existing framework\nthat was used to perform tail end of interrupt handling.\n\nAlso, this patch increases the count of virtual interrupts supported\nby Cactus SP inline with the corresponding change in Hafnium[1].\n\n[1] https://review.trustedfirmware.org/c/hafnium/hafnium/+/19232\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: Ife41f0d3bb7eebb7c78657abb5b4c5ad41202bb9\n" }, { "commit": "ff607a231c94e0fe3be7ede00a5beb19bad97846", "tree": "0dfba52dd67387901fde0eebb7c3bcb7d9e487a7", "parents": [ "61ad8c5ebf48640e7172987c63a22249875bc48a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Mar 16 15:42:21 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 14 12:18:42 2023 +0100" }, "message": "chore: reorder logs in the memory sharing tests\n\nReorder the logs in memory sharing tests for clarity.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I718024dea191346eacc4ebc0a64e0396b001d63f\n" }, { "commit": "61ad8c5ebf48640e7172987c63a22249875bc48a", "tree": "90b4a61eb8fef5b114ca475ca57fa184a0c3b174", "parents": [ "511290ad9c341c54f0ab79687c99275c939aa4ba" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Mar 16 15:39:06 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 14 12:18:42 2023 +0100" }, "message": "fix: attributes for ns memory region\n\nCactus SP was using the wrong attribute value to use a memory region as\nnon-secure.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ide881e4b99c792e0c7486aad5d8e5d8001505ca1\n" }, { "commit": "511290ad9c341c54f0ab79687c99275c939aa4ba", "tree": "a89bfc7eb19d812ae18f728bcc19d6a353b69c3c", "parents": [ "79fc9196228a9aa2fd6832b1cd4275932871d95c", "b42d17f3028e759bb38e2e09430dd2b8a7ad1c34" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Apr 13 15:02:43 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Apr 13 15:02:43 2023 +0200" }, "message": "Merge \"feat(ff-a): memory share bump to v1.1 EAC0\"" }, { "commit": "b42d17f3028e759bb38e2e09430dd2b8a7ad1c34", "tree": "a89bfc7eb19d812ae18f728bcc19d6a353b69c3c", "parents": [ "79fc9196228a9aa2fd6832b1cd4275932871d95c" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jul 04 12:42:13 2022 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Apr 13 09:43:33 2023 +0100" }, "message": "feat(ff-a): memory share bump to v1.1 EAC0\n\nHafnium was updated to match FF-A v1.1 EAC0 [1].\nThis is the equivalent change for FF-A memory sharing\ntests.\n\n[1] https://review.trustedfirmware.org/c/hafnium/hafnium/+/15012\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ibf39ac35e1c7e336843be848fb389401dd792516\n" }, { "commit": "79fc9196228a9aa2fd6832b1cd4275932871d95c", "tree": "9a8416096f7b636165244ad0e6bbc2b8d0877c49", "parents": [ "fc5e23eb867be79cca7200314f9937baf14b80c8", "31b81775100595e7345fc836d5c83b4d7422f8f8" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed Apr 05 09:19:44 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Apr 05 09:19:44 2023 +0200" }, "message": "Merge \"feat(memory share): FFA_FEATURES(FFA_MEM_RETRIEVE_REQ)\"" }, { "commit": "31b81775100595e7345fc836d5c83b4d7422f8f8", "tree": "4e1231d2af58033bf108eb310e8b52c73b8f3020", "parents": [ "957863b79430bc89c0894a677190b3a78855515b" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Mar 14 15:38:17 2023 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Mon Apr 03 13:07:52 2023 +0100" }, "message": "feat(memory share): FFA_FEATURES(FFA_MEM_RETRIEVE_REQ)\n\nUpdates tests to pass when built against\nhttps://review.trustedfirmware.org/c/hafnium/hafnium/+/18909\n\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\nChange-Id: Ic6c39ca6916b9f9298d7668021963fec287b72c8\n" }, { "commit": "fc5e23eb867be79cca7200314f9937baf14b80c8", "tree": "45b69e1ca06d393b1f58d9cd4b16f86bde8a65c5", "parents": [ "8371bb91c1a039e01454cbb4e98bfdb564a8fc16", "cb88add07daff59486f850be6b4cd4750f94d97c" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Sat Apr 01 16:22:24 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Sat Apr 01 16:22:24 2023 +0200" }, "message": "Merge \"test(psci): add tests for OS-initiated mode\"" }, { "commit": "8371bb91c1a039e01454cbb4e98bfdb564a8fc16", "tree": "e06899ba1be405650b4a15603429900dac67ccc2", "parents": [ "e0400c6d2b0372d742cd2cda9aaa7c5cf4741c4a", "2f30f1030f186760b20cd06b59832e332b2bdd0a" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 31 13:12:15 2023 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Mar 31 13:12:15 2023 +0200" }, "message": "Merge changes I86ef9625,I04a83b7e\n\n* changes:\n feat(rme): add PMU Realm tests\n feat(tools): add ability to skip tests for AArch32\n" }, { "commit": "2f30f1030f186760b20cd06b59832e332b2bdd0a", "tree": "e06899ba1be405650b4a15603429900dac67ccc2", "parents": [ "2eb601b98a245df8a31e670a7dc322c2e8f153cf" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Mon Mar 13 19:37:46 2023 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 31 11:41:56 2023 +0200" }, "message": "feat(rme): add PMU Realm tests\n\nThis patch adds Realm PMU payload tests with\nPMU interrupt handling.\n\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I86ef96252e04c57db385e129227cc0d7dcd1fec2\n" }, { "commit": "2eb601b98a245df8a31e670a7dc322c2e8f153cf", "tree": "328bdff573ac4e25d1d667f49f970e173e26e408", "parents": [ "e0400c6d2b0372d742cd2cda9aaa7c5cf4741c4a" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Mar 29 21:35:17 2023 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 31 10:40:55 2023 +0100" }, "message": "feat(tools): add ability to skip tests for AArch32\n\nAdds ability to skip tests based on build architecture.\nTestsuite name needs to be added in\ntftf/tests/aarch32_tests_to_skip.txt for aarch32\n\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\nChange-Id: I04a83b7e794534dd60bee41e31d24b994a37ce09\n" }, { "commit": "cb88add07daff59486f850be6b4cd4750f94d97c", "tree": "3737ad2a8a2aa4c4d9e8d4eea54720009ca4e94a", "parents": [ "e0400c6d2b0372d742cd2cda9aaa7c5cf4741c4a" ], "author": { "name": "Wing Li", "email": "wingers@google.com", "time": "Sat Oct 29 02:32:06 2022 +0100" }, "committer": { "name": "Wing Li", "email": "wingers@google.com", "time": "Thu Mar 23 19:37:52 2023 -0700" }, "message": "test(psci): add tests for OS-initiated mode\n\nChange-Id: I33e135f659aea600f71e053ac3db57eb0172e22b\nSigned-off-by: Wing Li \u003cwingers@google.com\u003e\n" }, { "commit": "e0400c6d2b0372d742cd2cda9aaa7c5cf4741c4a", "tree": "fc666f0a597dd6dc217493c2681ee9a53504d630", "parents": [ "957863b79430bc89c0894a677190b3a78855515b", "c91d2d6976bdceea4a3ee0bb1f2a69f91e5a5427" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Mar 22 10:35:59 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Mar 22 10:35:59 2023 +0100" }, "message": "Merge \"fix(pmu): check pmu is supported before using any of it\"" }, { "commit": "c91d2d6976bdceea4a3ee0bb1f2a69f91e5a5427", "tree": "fc666f0a597dd6dc217493c2681ee9a53504d630", "parents": [ "957863b79430bc89c0894a677190b3a78855515b" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Thu Mar 09 14:47:49 2023 +0000" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Thu Mar 09 14:47:49 2023 +0000" }, "message": "fix(pmu): check pmu is supported before using any of it\n\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\nChange-Id: Ic0da2ed49c38d9b2d81c740ca9c3eedf1f562e57\n" }, { "commit": "957863b79430bc89c0894a677190b3a78855515b", "tree": "49735fde839dde531ff7ebd63acaa88885d95a98", "parents": [ "f6713e92b9177250a8384464c96ee700b4d5e94e", "8f0e3d092021c6c927d61fe871a54d1d2580303f" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Mar 08 15:45:01 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Mar 08 15:45:01 2023 +0100" }, "message": "Merge \"fix: memory region not page aligned\"" }, { "commit": "8f0e3d092021c6c927d61fe871a54d1d2580303f", "tree": "49735fde839dde531ff7ebd63acaa88885d95a98", "parents": [ "f6713e92b9177250a8384464c96ee700b4d5e94e" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Mar 08 10:37:04 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Mar 08 13:44:08 2023 +0000" }, "message": "fix: memory region not page aligned\n\nIn [1] Hafnium mandates that every memory region allocated in the\nmanifest must be page aligned.\n\nIf the base address is not present, hafnium would allocate the\nmemory region. In the manifest structure, the value of the field\nwould be MANIFEST_INVALID_ADDRESS(all 0xfs), which would cause the\nalignment validation to fail.\n\nHafnium allocation of memory region is dropped in [2].\n\nThe patch removes instances of such type of memory regions from\ncactus partition manifest.\n\n[1] https://review.trustedfirmware.org/c/hafnium/hafnium/+/17304\n[2] https://review.trustedfirmware.org/c/hafnium/hafnium/+/19939\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I443e30b18531072cd108c58eb0762f3bffbaf65a\n" }, { "commit": "f6713e92b9177250a8384464c96ee700b4d5e94e", "tree": "152b6005218bc89ebc27a44c73d1aba1add94ab0", "parents": [ "9c2d14f8ca04f3a5759418edcf9b2e66f386aa35", "60c642dca34ae9403b90c07b9a839ad394baea45" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Tue Mar 07 21:18:03 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Mar 07 21:18:03 2023 +0100" }, "message": "Merge \"fix(docs): add readthedocs configuration file\"" }, { "commit": "9c2d14f8ca04f3a5759418edcf9b2e66f386aa35", "tree": "3de9cfa2ad51d21ff027834a5f8d6d3758ce9a7e", "parents": [ "8d80d6501af8a903b9a828ee57a6f490fc89bc18", "a0a8ec64d43a592f19a4d2df431619defc139f22" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Tue Feb 28 17:39:02 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Feb 28 17:39:02 2023 +0100" }, "message": "Merge \"test(nop): add \"nop\" test case\"" }, { "commit": "60c642dca34ae9403b90c07b9a839ad394baea45", "tree": "e44c58cd396258b099668d03411d57ca7433e2d1", "parents": [ "8d80d6501af8a903b9a828ee57a6f490fc89bc18" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Feb 27 14:41:21 2023 +0000" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Feb 27 15:06:21 2023 +0000" }, "message": "fix(docs): add readthedocs configuration file\n\nReadthedocs uses weird defaults and the web interface gives limited\nconfiguration options. Add the config file to allow them to be changed.\n\nBump build os image to Ubuntu 22.04 to be in line with the CI.\n\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\nChange-Id: Ie8985712bbd30a1d6465e0ab8225c87f9bd0f8e8\n" }, { "commit": "a0a8ec64d43a592f19a4d2df431619defc139f22", "tree": "3de9cfa2ad51d21ff027834a5f8d6d3758ce9a7e", "parents": [ "8d80d6501af8a903b9a828ee57a6f490fc89bc18" ], "author": { "name": "Gareth Stockwell", "email": "gareth.stockwell@arm.com", "time": "Fri Jan 06 16:20:49 2023 +0000" }, "committer": { "name": "Gareth Stockwell", "email": "gareth.stockwell@arm.com", "time": "Mon Feb 27 11:41:22 2023 +0000" }, "message": "test(nop): add \"nop\" test case\n\nThis is intended for use in conjunction with Trusted Firmware eXplorer\n(TFX). The dummy test case exists only to provide a symbol with a\nwell-known name (\"debug_hook\"), at which TFX can set a breakpoint and\ntherefore marshall all PEs on entry to Non-secure state.\n\nThe \"nop\" test case is not built by default, and therefore must be\nexplicitly included, e.g.\n\n make TESTS\u003dnop\n\nSigned-off-by: Gareth Stockwell \u003cgareth.stockwell@arm.com\u003e\nChange-Id: I1d0f95714e5f662ca0f2d90db32020be15b43aed\n" }, { "commit": "8d80d6501af8a903b9a828ee57a6f490fc89bc18", "tree": "fb8252628eaf315319e77d1779dd2554fe438bc0", "parents": [ "eca40d6b8e27de5cf4ca8aa108273546daa01eb6", "78cdbc3956a983aebb78a08757fa2183aa1253b8" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Feb 14 20:50:57 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Feb 14 20:50:57 2023 +0100" }, "message": "Merge \"feat: introduce test to generate sync EA\"" }, { "commit": "78cdbc3956a983aebb78a08757fa2183aa1253b8", "tree": "fb8252628eaf315319e77d1779dd2554fe438bc0", "parents": [ "eca40d6b8e27de5cf4ca8aa108273546daa01eb6" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Feb 10 11:47:56 2023 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Tue Feb 14 17:00:47 2023 +0000" }, "message": "feat: introduce test to generate sync EA\n\nIntroduce capability to generate Sync External Abort in TFTF.\nOne of the usecases of this capability is to test EL3 feature of\ntrapping lower ELs sync EA.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I503c6776463efdd71cb8f05f6e19fc82b8dd7fdd\n" }, { "commit": "eca40d6b8e27de5cf4ca8aa108273546daa01eb6", "tree": "ee90f5a0248631d81afba403b2fec9449315cd95", "parents": [ "d9742e6d5e3fafc260b588849b21bf9f5730fd91", "dcd35e26ec09f88d41c355eef5b048f45d49784e" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Fri Feb 10 10:24:39 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Feb 10 10:24:39 2023 +0100" }, "message": "Merge \"fix: use write instead of read to generate SError\"" }, { "commit": "dcd35e26ec09f88d41c355eef5b048f45d49784e", "tree": "ee90f5a0248631d81afba403b2fec9449315cd95", "parents": [ "d9742e6d5e3fafc260b588849b21bf9f5730fd91" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Feb 09 16:07:41 2023 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Feb 09 17:38:57 2023 +0000" }, "message": "fix: use write instead of read to generate SError\n\nWith sha 19297eb it was expected that read to invalid device memory\nwill cause SError in EL3 but it was causing sync exception. Change the\nread to write for proper behaviour.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I933aa3a80d40795a339cdf2160ebdcad976ab9e2\n" }, { "commit": "d9742e6d5e3fafc260b588849b21bf9f5730fd91", "tree": "526d34b0fa1aadda7ae55d4c5b8b64e2dd9f49c1", "parents": [ "5b40b00a47b09a737c34737f7ae4be6b0ae730ac", "16dda88053fae6522ae70139c879289d25cf9d26" ], "author": { "name": "Joanna Farley", "email": "joanna.farley@arm.com", "time": "Tue Feb 07 10:21:28 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Feb 07 10:21:28 2023 +0100" }, "message": "Merge \"fix(trng): update the broken link to TRNG_FW documentation\"" }, { "commit": "5b40b00a47b09a737c34737f7ae4be6b0ae730ac", "tree": "3f8c5532af613c74ad3bbd10c7c85f5c095935cf", "parents": [ "b409223d16d4cdc2336c248affe97563923216ad", "19297eb7280f4a4839610f79e5dd455bd5e38cd9" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Feb 06 17:55:14 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Feb 06 17:55:14 2023 +0100" }, "message": "Merge changes from topic \"crash_reporting\"\n\n* changes:\n feat: introduce test to generate SError\n refactor(ras): rename ras related tests\n" }, { "commit": "19297eb7280f4a4839610f79e5dd455bd5e38cd9", "tree": "3f8c5532af613c74ad3bbd10c7c85f5c095935cf", "parents": [ "5d1e6fe96dd66b2e60b0634dfea8b266bd5b10a8" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Jan 13 23:22:26 2023 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Feb 06 15:51:58 2023 +0000" }, "message": "feat: introduce test to generate SError\n\nIntroduce capability to generate SError in TFTF.\nOne of the usecases of this capability is to test EL3 feature of\ntrapping lower ELs SError.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I4bc78edf21f9329f1ed76b0ae27db223a83a9670\n" }, { "commit": "5d1e6fe96dd66b2e60b0634dfea8b266bd5b10a8", "tree": "7a438d644bd4f16869aafec0fd7de2fbbe246580", "parents": [ "b409223d16d4cdc2336c248affe97563923216ad" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Sat Jan 14 00:13:08 2023 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Feb 01 13:51:23 2023 +0000" }, "message": "refactor(ras): rename ras related tests\n\nRAS related tests implicitly use SError name and as there are plans to\nintroduce non-RAS SError test, rename RAS related tests to be explicit.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: Ifc56157271e491e1b7c5eeac7b0e1e08bf138b8f\n" }, { "commit": "b409223d16d4cdc2336c248affe97563923216ad", "tree": "5ca074e6b99e3e908e241a4fc23c78800914a318", "parents": [ "8305433b56607dce8f1f1bcf394e2bd155921ec5", "08b78604af08378bfa587eaeaf7092770bf9c20d" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Jan 27 17:01:26 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jan 27 17:01:26 2023 +0100" }, "message": "Merge changes from topic \"ja/indirect_message\"\n\n* changes:\n fix(ff-a): tftf handling of its RXTX buffer pair\n test(spm): check rxtx unmap at NS physical instance\n" }, { "commit": "08b78604af08378bfa587eaeaf7092770bf9c20d", "tree": "5ca074e6b99e3e908e241a4fc23c78800914a318", "parents": [ "d17c6113997733fb39606aa3c3643896248ac44d" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jan 24 15:54:50 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 26 10:44:54 2023 +0000" }, "message": "fix(ff-a): tftf handling of its RXTX buffer pair\n\nThe way tftf was handling the RXTX buffer pair created a dependency\non a set of tests from \u0027test_ffa_setup_and_discovery.c\u0027. This was\nproblematic for test configurations for which the SPM tests are\nnot present.\n\nThis patch removes such dependency:\n- Delete the \u0027INIT_MAILBOX\u0027 macro, and \u0027init_mailbox\u0027 function;\n- RXTX buffer pair allocated within the \u0027get_tftf_mailbox\u0027.\nThey are mapped into the SPMC via FFA_RXTX_MAP, and are returned\nin the function\u0027s argument.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ia010ebd21f11ab7ca6582b574ffc9179693b1eed\n" }, { "commit": "d17c6113997733fb39606aa3c3643896248ac44d", "tree": "2e42f1022c178023a0b6096d3d7f61fe18308475", "parents": [ "8305433b56607dce8f1f1bcf394e2bd155921ec5" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 12 10:48:41 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jan 25 12:18:18 2023 +0000" }, "message": "test(spm): check rxtx unmap at NS physical instance\n\nValidate that a call to FFA_RXTX_UNMAP from the NS\nphysical FF-A instance, can\u0027t result in SPMC unampping\nbuffers belonging to an SP.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Iebb51a1bb8db96c6ea9e22235e0d884f7b62f1c7\n" }, { "commit": "16dda88053fae6522ae70139c879289d25cf9d26", "tree": "6f24f407a3f777fd817607313d3af20039d4d453", "parents": [ "8305433b56607dce8f1f1bcf394e2bd155921ec5" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Sun Jan 15 11:21:39 2023 +0000" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Sun Jan 15 11:47:12 2023 +0000" }, "message": "fix(trng): update the broken link to TRNG_FW documentation\n\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\nChange-Id: Ibe98baa558d3c010971e477978f25f5bcb54538a\n" }, { "commit": "8305433b56607dce8f1f1bcf394e2bd155921ec5", "tree": "1b6177e33f5ccd511885cf438093c82f2842fbdc", "parents": [ "3fd89ac55081501979d9f5c6d338783a6899eb2e", "5c71203a7f4cbfb837fe797a9b6a66f97af8b567" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Fri Jan 13 10:59:36 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jan 13 10:59:36 2023 +0100" }, "message": "Merge \"feat(rdn2cfg3): add tftf support\"" }, { "commit": "5c71203a7f4cbfb837fe797a9b6a66f97af8b567", "tree": "1b6177e33f5ccd511885cf438093c82f2842fbdc", "parents": [ "3fd89ac55081501979d9f5c6d338783a6899eb2e" ], "author": { "name": "Tony K Nadackal", "email": "tony.nadackal@arm.com", "time": "Wed Jan 11 18:22:31 2023 +0000" }, "committer": { "name": "Tony K Nadackal", "email": "tony.nadackal@arm.com", "time": "Wed Jan 11 18:22:31 2023 +0000" }, "message": "feat(rdn2cfg3): add tftf support\n\nAdd tftf support for Neoverse Reference Design RD-N2-Cfg3 platform. It\nis a variant of RD-N2 platform with a 10x6 mesh. For this platform, the\nPLATFORM_VARIANT macro should be set to 3 at compile time.\n\nSigned-off-by: Tony K Nadackal \u003ctony.nadackal@arm.com\u003e\nChange-Id: I67cd441586c1e437d816cedd086d55f2b5c85718\n" }, { "commit": "3fd89ac55081501979d9f5c6d338783a6899eb2e", "tree": "44d163922d476aaee5485358098bab71a21d9b59", "parents": [ "e4d384eb31e959e429941215fe7ca31d7ca9f82e", "ab202fe6ccdbb2bfad34a4dfb12bc2176762c5ae" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Jan 04 18:52:18 2023 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jan 04 18:52:18 2023 +0100" }, "message": "Merge \"feat(rng_trap): modify tests for FEAT_RNG_TRAP\"" }, { "commit": "ab202fe6ccdbb2bfad34a4dfb12bc2176762c5ae", "tree": "44d163922d476aaee5485358098bab71a21d9b59", "parents": [ "e4d384eb31e959e429941215fe7ca31d7ca9f82e" ], "author": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Wed Dec 07 13:56:40 2022 -0600" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Jan 04 17:14:44 2023 +0000" }, "message": "feat(rng_trap): modify tests for FEAT_RNG_TRAP\n\nWith the introduction of a handler for the trap generated upon an\nattempt to read RNDR and RNDRRS registers, the old test will not\nwork anymore and needs to be changed so it does not longer expect\nthe system to panic but for EL3 return a valid random number after\nhandling the trap.\n\nIn addition, the test configs are unified as there is no need to\nkeep them separate since a system panic is not expected anymore.\n\nSigned-off-by: Juan Pablo Conde \u003cjuanpablo.conde@arm.com\u003e\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I3ea4d09bbae58a906ea0be3b5448f5d3090571e7\n" }, { "commit": "e4d384eb31e959e429941215fe7ca31d7ca9f82e", "tree": "14b3e28e83b9a64b2f3394c75b21c48d572704f6", "parents": [ "5740a87deab00a1aef828ce192868f02c1795efa", "193b356e7b9e1d41bd3c15cc4976adb376177f79" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Dec 23 13:15:36 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Dec 23 13:15:36 2022 +0100" }, "message": "Merge \"fix(realm): add BP_OPTION to REALM_CFLAGS\"" }, { "commit": "193b356e7b9e1d41bd3c15cc4976adb376177f79", "tree": "14b3e28e83b9a64b2f3394c75b21c48d572704f6", "parents": [ "5740a87deab00a1aef828ce192868f02c1795efa" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Dec 22 16:50:08 2022 +0000" }, "committer": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Dec 22 16:50:08 2022 +0000" }, "message": "fix(realm): add BP_OPTION to REALM_CFLAGS\n\nAdds missing BP_OPTION to REALM_CFLAGS to\nallow build realm payload with BTI/Pauth support.\n\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I52bb24ffff9d662fee30706290805c455dc3137a\n" }, { "commit": "5740a87deab00a1aef828ce192868f02c1795efa", "tree": "23be9c835a4f495a8fbfb312db384b99bd9490ad", "parents": [ "d1c04be9b474257b5dbc06fa0989c3abb8dd1b31", "fac8ed7355d7a81499112ac85a3adb952d37da8c" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Dec 20 17:30:54 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Dec 20 17:30:54 2022 +0100" }, "message": "Merge \"fix: INIT_TFTF_MAILBOX must be called first\"" }, { "commit": "fac8ed7355d7a81499112ac85a3adb952d37da8c", "tree": "23be9c835a4f495a8fbfb312db384b99bd9490ad", "parents": [ "d1c04be9b474257b5dbc06fa0989c3abb8dd1b31" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Dec 20 11:09:43 2022 +0100" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Dec 20 11:56:27 2022 +0100" }, "message": "fix: INIT_TFTF_MAILBOX must be called first\n\nIn rt_memory_cannot_be_accessed_in_s test:\n\nRevert the fix from I340f2b3bcee2b072f3874fd6a9f211b48ddf882b\nwhere INIT_TFTF_MAILBOX shall be called first.\nSkip the test if SPMD is not present (by\nSKIP_TEST_IF_FFA_VERSION_LESS_THAN).\n\nA further refactoring change will follow to lift the dependency in the\nSPM test suite to run RX/TX map tests first.\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: I5e7e0854ba4db86ed83031c0c60383847084a3b1\n" }, { "commit": "d1c04be9b474257b5dbc06fa0989c3abb8dd1b31", "tree": "5dd4210fe428d6fd63bfb7ad31ac09217fccdca9", "parents": [ "de91d7535f0008c11ea6ded8761adb2569b412ad", "b4bd94e38057c12f831bcc05d1912f462a181ace" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Dec 16 17:00:08 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Dec 16 17:00:08 2022 +0100" }, "message": "Merge \"fix(tftf): resolve build issues\"" }, { "commit": "de91d7535f0008c11ea6ded8761adb2569b412ad", "tree": "206ab841c46c74c2911c34384f8dc8cb3578e214", "parents": [ "17df525fd6be6db49f48f01c5cf26fd2a1279231", "c21694de5a14d1b4d32f0fd56cc6cf67750912de" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Dec 16 16:59:45 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Dec 16 16:59:45 2022 +0100" }, "message": "Merge \"fix(tftf): align with RMM bet0 return code\"" }, { "commit": "b4bd94e38057c12f831bcc05d1912f462a181ace", "tree": "13159bc1d87f367d597b2e8bab3384c7c9f4f09f", "parents": [ "17df525fd6be6db49f48f01c5cf26fd2a1279231" ], "author": { "name": "Manish V Badarkhe", "email": "Manish.Badarkhe@arm.com", "time": "Fri Dec 16 12:15:13 2022 +0000" }, "committer": { "name": "Manish V Badarkhe", "email": "Manish.Badarkhe@arm.com", "time": "Fri Dec 16 12:44:42 2022 +0000" }, "message": "fix(tftf): resolve build issues\n\nThis patch resolves build issues introduced by commit [1].\n\n[1]: https://review.trustedfirmware.org/c/TF-A/tf-a-tests/+/18037\n\nSigned-off-by: Manish V Badarkhe \u003cManish.Badarkhe@arm.com\u003e\nChange-Id: I758642eda440383cbd3ddf9027a864616e0254e4\n" }, { "commit": "c21694de5a14d1b4d32f0fd56cc6cf67750912de", "tree": "206ab841c46c74c2911c34384f8dc8cb3578e214", "parents": [ "17df525fd6be6db49f48f01c5cf26fd2a1279231" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Fri Dec 16 12:19:52 2022 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Dec 16 13:32:45 2022 +0100" }, "message": "fix(tftf): align with RMM bet0 return code\n\nUpdate test cases return codes according to\nRMM Bet0 Specification. These changes are based on\nhttps://review.trustedfirmware.org/c/TF-A/tf-a-tests/+/17892\n\nThis patch also fixes failure of\n\u0027Access from a SP to a Root region\u0027 tests when SPMC\nis not present.\n\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I340f2b3bcee2b072f3874fd6a9f211b48ddf882b\n" }, { "commit": "17df525fd6be6db49f48f01c5cf26fd2a1279231", "tree": "da7d6ca5e6224e17d5293c8c7dc1a46781d5523d", "parents": [ "953653743aaf56c979b71e211800cf1bee6c4e34", "df14b1714189b0b80f159c494d239e02de50a90f" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Dec 16 12:48:55 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Dec 16 12:48:55 2022 +0100" }, "message": "Merge \"fix(invalid-access): fix the build failures\"" }, { "commit": "df14b1714189b0b80f159c494d239e02de50a90f", "tree": "da7d6ca5e6224e17d5293c8c7dc1a46781d5523d", "parents": [ "953653743aaf56c979b71e211800cf1bee6c4e34" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Dec 16 11:15:23 2022 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Dec 16 11:15:23 2022 +0000" }, "message": "fix(invalid-access): fix the build failures\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I098cd72b43b8571c81bdbc9b2ca9db0784c91e90\n" }, { "commit": "953653743aaf56c979b71e211800cf1bee6c4e34", "tree": "31c5a7d0502c2a08710a7bb9dd5873ab3c05cf10", "parents": [ "884883bfa0b26a37d9b61b935f4699add050bf8d", "380b2affda50fe487239f490026517e1bc35709f" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Dec 15 15:51:54 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Dec 15 15:51:54 2022 +0100" }, "message": "Merge \"feat(tftf): TFTF Realm extension enhancement\"" }, { "commit": "884883bfa0b26a37d9b61b935f4699add050bf8d", "tree": "42276f51776f4f5fb16486bf107badba2f5faa4c", "parents": [ "ff56cd0f56cdc628f0433b9ed1cf24f6e20b2391", "bd23b1bd79760947819101e07f32e4a332b2e48d" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Dec 15 11:56:52 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Dec 15 11:56:52 2022 +0100" }, "message": "Merge \"fix: rmi_rec_entry verbose log\"" }, { "commit": "ff56cd0f56cdc628f0433b9ed1cf24f6e20b2391", "tree": "035d4b17bcb365bba65ab931bb2dbed0d1fc24bb", "parents": [ "638ef6eef88e0aaa2bd61beaafd548a255c4b31b", "8585eef7ff4fa8ffde7143976cdb60ba4dd38431" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Dec 14 11:34:01 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Dec 14 11:34:01 2022 +0100" }, "message": "Merge changes from topic \"bk/test_pmuv3\"\n\n* changes:\n test(pmu): test that the PMU state is preserved accros a world switch\n test(pmu): check if PMUv3 is functional\n fix(pmu): extend PMEVTYPER.evtCount width\n" }, { "commit": "bd23b1bd79760947819101e07f32e4a332b2e48d", "tree": "3959821717725db35b87194e3a7815c15255bd25", "parents": [ "638ef6eef88e0aaa2bd61beaafd548a255c4b31b" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Nov 18 11:24:32 2022 +0100" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Mon Dec 12 10:35:32 2022 +0100" }, "message": "fix: rmi_rec_entry verbose log\n\nFix build break with rmi_rec_enter verbose log.\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: Ia418b5e60a894c456e71788c0320074acf3fdd97\n" }, { "commit": "638ef6eef88e0aaa2bd61beaafd548a255c4b31b", "tree": "030c50b66bc0700c176aa0cf6c6fc45ae59280c2", "parents": [ "b68713efb9b143ba878af18aff5c65bfa28ad8fe", "309d95eb37808ee136e42015f81690cd5c8972bf" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Dec 08 09:58:45 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Dec 08 09:58:45 2022 +0100" }, "message": "Merge \"refactor: add new test-suite \u0027tests-timer-stress\u0027\"" }, { "commit": "309d95eb37808ee136e42015f81690cd5c8972bf", "tree": "030c50b66bc0700c176aa0cf6c6fc45ae59280c2", "parents": [ "b68713efb9b143ba878af18aff5c65bfa28ad8fe" ], "author": { "name": "Manish V Badarkhe", "email": "Manish.Badarkhe@arm.com", "time": "Mon Dec 05 12:22:00 2022 +0000" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Dec 08 09:58:01 2022 +0100" }, "message": "refactor: add new test-suite \u0027tests-timer-stress\u0027\n\nMoved \u0027Stress test timer framework\u0027 as part of \u0027tests-extensive\u0027 suite\nby creating a separate test suite for timers, i.e. tests-timer-stress.\n\nSigned-off-by: Manish V Badarkhe \u003cManish.Badarkhe@arm.com\u003e\nChange-Id: Ibdad88e81fba55333c0ad17cc9c10d24d97e6c7e\n" }, { "commit": "380b2affda50fe487239f490026517e1bc35709f", "tree": "212567970ee50d84a7054cd2d171d538d5c814fd", "parents": [ "f7b3be91ab954c495912fc7bc48383cd83bfec2d" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Nov 23 17:31:27 2022 +0000" }, "committer": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Dec 07 16:21:21 2022 +0000" }, "message": "feat(tftf): TFTF Realm extension enhancement\n\nAdds randomisation of SMC RMI commands parameters\nand checking of X4-X7 return values as per SMCCC v1.2.\n\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I7a332db873d2bd6cb400c5bf97ef0b8e9792b2d4\n" }, { "commit": "b68713efb9b143ba878af18aff5c65bfa28ad8fe", "tree": "d0c90c8e114b275d1a336854a09d173c825a8851", "parents": [ "69b18fe71ea8aa0334ff9fb641dc68a4b2def6c8", "29acc7dc064d259c37ccadaab88276dce03c242f" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed Dec 07 10:08:25 2022 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Dec 07 10:08:25 2022 +0100" }, "message": "Merge \"fix: cactus entry point get core linear id\"" } ], "next": "8585eef7ff4fa8ffde7143976cdb60ba4dd38431" }