)]}' { "log": [ { "commit": "9d0cfe88aedc34f1b61a51ff18013743c56e2fbc", "tree": "b5b65d1a477d3d46aacfb69bd3dff348a2136ce4", "parents": [ "85d58f31f121445225c2b9e6ee94c8589cc36669" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Apr 17 10:57:26 2023 +0100" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Jul 25 17:00:33 2023 +0100" }, "message": "test(tftf): test PAuth in Realm\n\n- Enable PAuth in Realm RL1 by default.\n- Check if PAuth keys are accessible in Realm RL1.\n- Check if Realm PAuth keys are preserved across RMM entry/exit.\n- Check if NS PAuth keys are preserved across RMM entry/exit.\n- Generate PAuth fault by cloberring LR.\n\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\nChange-Id: I85d8e03ec604c96117555e7aa866453cb2745cfe\n" }, { "commit": "667416c165542c803f4940dd3b13392a07e3bae5", "tree": "0a861f401d6a23e649cd25a9d68ac532cc77bb85", "parents": [ "d042370d2508bf5769559abd28d349ff2de92f51" ], "author": { "name": "Zelalem Aweke", "email": "zelalem.aweke@arm.com", "time": "Wed Oct 13 17:49:24 2021 -0500" }, "committer": { "name": "Zelalem Aweke", "email": "zelalem.aweke@arm.com", "time": "Wed Oct 20 18:22:26 2021 +0200" }, "message": "fix(fwu): invalidate the data cache for NS_BL1U and NS_BL2U images\n\nInvalidate the RW regions in the data cache for NS_BL1U and NS_BL2U\nimages before enabling MMU to safeguard against potential stale data\nfrom previous firmware stage.\n\nSigned-off-by: Zelalem Aweke \u003czelalem.aweke@arm.com\u003e\nChange-Id: Ia5fc8206685cc3c1875004f4511670d7ec07b310\n" }, { "commit": "7fac162cd9439783ef60aaf266d22ad454445ace", "tree": "0696ee3d15d1e4fcdfe3f1172f0c2c3dddc06ada", "parents": [ "d6fdb6b10147038d99643a7547821c3cff76ce76" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Fri Jun 19 14:25:43 2020 +0100" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Tue Aug 18 14:52:49 2020 +0000" }, "message": "TFTF: Add ARMv8.5 BTI support in makefiles\n\nThis patch adds \u0027BRANCH_PROTECTION\u0027 build option in\nTFTF makefiles which corresponds to that in TF-A.\nThe option values are documented in \u0027build-options.rst\u0027\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: Iad5083aee339cec574acf5e7ab1fd8142877a122\n" }, { "commit": "c249d5e5cfbf2aa0f584001543c1d39953e1d6aa", "tree": "bae825efb76949c451188bb0e96de2ea1b120514", "parents": [ "1b5952a79ca1a6feb7b23372420285e886497852" ], "author": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Thu Feb 06 16:29:45 2020 -0600" }, "committer": { "name": "Deepika Bhavnani", "email": "deepika.bhavnani@arm.com", "time": "Tue Feb 11 09:22:12 2020 -0600" }, "message": "Switch AARCH32/AARCH64 to __aarch64__\n\nNOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.\n\nAll common C compilers pre-define the same macros to signal which\narchitecture the code is being compiled for: __arm__ for AArch32 (or\nearlier versions) and __aarch64__ for AArch64. There\u0027s no need for TF-A\nto define its own custom macros for this. In order to unify code with\nthe export headers (which use __aarch64__ to avoid another dependency),\nlet\u0027s deprecate the AARCH32 and AARCH64 macros and switch the code base\nover to the pre-defined standard macro. (Since it is somewhat\nunintuitive that __arm__ only means AArch32, let\u0027s standardize on only\nusing __aarch64__.)\n\nNOTE: This change is based on below TFA commit\nhttps://github.com/ARM-software/arm-trusted-firmware/commit/402b3cf8766fe2cb4ae462f7ee7761d08a1ba56c\n\nSigned-off-by: Deepika Bhavnani \u003cdeepika.bhavnani@arm.com\u003e\nChange-Id: If2c3dbaeb01d4a9d8cfd95d906e5eaf4ae94417f\n" }, { "commit": "52fd7337cde13d945dfb2f5b90b89bd76772fe9c", "tree": "d97d286bf69bb900dfffd886fc7b827de65fa16e", "parents": [ "584b3cb3aba5423c31496a4f46ea6a58e44dd7d9" ], "author": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Jan 08 14:02:18 2020 +0000" }, "committer": { "name": "Alexei Fedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Jan 08 14:02:18 2020 +0000" }, "message": "TFTF: Enable ARMv8.3-PAuth in FWU tests.\n\nThis patch adds ARMv8.3-PAuth support for FWU tests.\n\nSigned-off-by: Alexei Fedorov \u003cAlexei.Fedorov@arm.com\u003e\nChange-Id: I36a0a2a3870db51cda0a09bd8fd8004e2d01d2bc\n" }, { "commit": "537b358321b850bfca59c5f8f5941a1e70d9341d", "tree": "987a079bd37de7624f90edb441b48aa5a1eb167c", "parents": [ "640af3a32b645e1b54003081d93739a6d05527dc" ], "author": { "name": "Bence Szépkúti", "email": "bence.szepkuti@arm.com", "time": "Fri Nov 29 18:23:56 2019 +0100" }, "committer": { "name": "Bence Szépkúti", "email": "bence.szepkuti@arm.com", "time": "Fri Nov 29 18:23:56 2019 +0100" }, "message": "make: Fix parallel builds\n\nParallel builds would fail while generating the dependency file of the\nfirst source file that included tests_list.h due to it missing.\nIn-order builds only worked, because a rule that specified tests_list.c\nas a prerequisite happened to get executed first.\n\nThis patch introduces tests_list.h as an order-only dependency of all\nrules that generate dependency files. This is necessary because we can\u0027t\nknow which files actually depend on it until the dependency files have\nbeen generated.\n\nThis forces the autogenerated files to be generated before any other\nfiles are compiled, but does not cause unrelated files to recompile if\nthey are modified.\n\nSigned-off-by: Bence Szépkúti \u003cbence.szepkuti@arm.com\u003e\nChange-Id: I21f0b98052a884a853935ea35a2898ff90245a49\n" }, { "commit": "ee3e7cd720887077ad27f48f4c8e681926c16587", "tree": "b2be6933f915effc206f73faf1ce5a73118751c7", "parents": [ "6927d85a0429bd247cb76b7cb4201e330fc745a1" ], "author": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Wed Jul 03 16:44:49 2019 +0100" }, "committer": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Thu Aug 01 11:34:18 2019 +0100" }, "message": "ld: Separate code and RO data sections\n\nThis prevents the execution of the read-only data.\n\nThis is done in a similar way in TF-A when the build flag\nSEPARATE_CODE_AND_RODATA is enabled.\n\nThe build flag is probably not needed in TF-A Tests.\n\nChange-Id: I2bdc0237c00377beb2febeb47207770c85036192\nSigned-off-by: Ambroise Vincent \u003cambroise.vincent@arm.com\u003e\n" }, { "commit": "6a6f48338312f1b8e5637fa85d7942e6bb9d8bab", "tree": "758dea2b85bfd8e97a5d86f65b73a81a7f93d15e", "parents": [ "8790f025e12065ccccfe4d19fdcc672c80aa784b" ], "author": { "name": "Joel Hutton", "email": "Joel.Hutton@Arm.com", "time": "Mon Apr 08 15:46:36 2019 +0100" }, "committer": { "name": "Joel Hutton", "email": "Joel.Hutton@arm.com", "time": "Fri Apr 12 15:43:03 2019 +0100" }, "message": "Makefile: Enable strict align arch minor version\n\nAdd -mstrict-align flag, and -march minor version. These are needed to\nprevent compilers generating unaligned accesses and enable\narchitectural features respectively.\n\nEnable the SCTLR.A and SCTLR.SA alignment checks in all images.\n\nTF test has several cases of code which enable the alignment checks.\n\nChange-Id: I9a0413786caf94d0abf376aa1b4fb54fc7f2f355\nSigned-off-by: Joel Hutton \u003cJoel.Hutton@Arm.com\u003e\n" }, { "commit": "d6e806d35599bf003c575d7d113367b8de910448", "tree": "cd4ccb353ae8b91e6504057c20eaf641cd13ab63", "parents": [ "602b7f58dd7668411c8a4032652b4552bd7fe934" ], "author": { "name": "Ambroise Vincent", "email": "ambroise.vincent@arm.com", "time": "Mon Feb 11 14:34:26 2019 +0000" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Mar 04 12:20:48 2019 +0000" }, "message": "libc: Update makefiles\n\nAdded includes and sources of libc to the makefiles.\n\nChange-Id: I8e84db9634e0df7d51caa5c5858311672dd3a8d1\nSigned-off-by: Ambroise Vincent \u003cambroise.vincent@arm.com\u003e\n" }, { "commit": "09a00ef98c6108fec75dafcc7dbdddacb2ee2e91", "tree": "77b585708a4fd850f0dac3a3f0fcaf34576fa8c9", "parents": [ "9e550b6f75f064b53d74a4ad3c8672332d87451c" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Fri Jan 11 13:12:58 2019 +0000" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Fri Jan 25 08:23:20 2019 +0000" }, "message": "Sanitise includes of include/drivers across codebase\n\nEnforce full include path for includes.\n\nThe reason for this change is that having a global namespace for\nincludes isn\u0027t a good idea. It defeats one of the advantages of having\nfolders and it introduces problems that are sometimes subtle (because\nyou may not know the header you are actually including if there are two\nof them with the same name).\n\nChange-Id: I45e912b16c9fff81f50840dad7e7f90ed6637b2a\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "1779506e5be07e4e136d35b75d2672680067fdb6", "tree": "36783422ce62b29e98899d0c14ab99993536caa0", "parents": [ "485cee0e136763febc859b8eddd5c54520987725" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Dec 13 16:02:41 2018 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Jan 03 10:51:21 2019 +0100" }, "message": "Rename SMC first argument\n\n\u0027fid\u0027 (short for \u0027function ID\u0027) makes for a more explicit name.\n\nChange-Id: I41d90c39979162142b0377a68f4be90dc31de253\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "844b3629240275673d1611ab72f47ba7095b83a3", "tree": "2472d3d5d6c5897e15ced07de625b69be51e072f", "parents": [ "a1497e32ae63fcf138b41bc96721a30751df4104" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Dec 17 16:39:29 2018 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Dec 18 14:20:22 2018 +0100" }, "message": "FWU: Do not pull TFTF exception vectors code\n\nNS_BL1U and NS_BL2U images have their own exception vectors code\nprovided by lib/${ARCH}/exception_stubs.S.\n\nChange-Id: I5d2d760d9faf3d7bb4ba0bdefc5f20c193b1569d\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "7d34d304a5115a167102aa165c6a41124b00205d", "tree": "685e2e15323da617f07cda8f8db2eb73a26cf91e", "parents": [ "13d99f95ae68104f4e97a58f6887c75863b4f502" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Mon Nov 26 10:13:51 2018 +0100" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Nov 27 10:51:20 2018 +0100" }, "message": "Move BL1 SMC FIDs macros out of platform layer\n\nBL1 SMC function IDs are not platform-specific so move them to a new\ngeneric header file, called bl1.h.\n\nChange-Id: I621483f7737f8101e9f370343e1a45a731c31c3b\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "aef556a8b784fe98fad89591e097b486ab92f6c8", "tree": "d04505dcb5e8c74b9a69813185f15291bd2f6bda", "parents": [ "7af6c6ddaa365891b6710bc5664584349f59c11f" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Oct 25 12:47:55 2018 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Thu Oct 25 16:28:51 2018 +0200" }, "message": "Disable hardware alignment checking\n\nAt the moment, alignment fault checking is always enabled in TF-A\nTests (by setting the HSCTLR/SCTLR.A bit). Thus, for every instruction\nthat loads or stores one or more registers, the hardware checks that\nthe address being accessed is properly aligned to the size of the data\nelement(s) being accessed. If this check fails it causes an alignment\nfault, which is taken as a data abort exception.\n\nHowever, the compiler is currently unaware that it must not emit load\nand store instructions resulting in unaligned accesses because we do\nnot compile the source code with -mstrict-align (AArch64) /\n-mno-unaligned-access (AArch32). Because of this, we might get some\nunexpected alignment faults.\n\nWe could request the compiler to align all data accesses but whether\nthis gives us any performance benefit is dependent on the\nmicroarchitecture. Thus, it is simpler to just disable hardware\nalignment checking and let the compiler make the call.\n\nChange-Id: I6ef4afb09e0f87c8462a968da1ca2192ee075b40\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\n" }, { "commit": "1cf45c96b2e87a60cbed25245c2319b2a391da1e", "tree": "f465e3b9880c99749c5e21beed70a0129e93d40c", "parents": [ "2bfcf9ef94656ad4ceb5b58b9f0be7aae4f1b589" ], "author": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Mon Oct 15 09:03:43 2018 +0100" }, "committer": { "name": "Antonio Nino Diaz", "email": "antonio.ninodiaz@arm.com", "time": "Mon Oct 15 09:03:43 2018 +0100" }, "message": "Move platform_helpers.S to each platform\u0027s folder\n\nIn practice, all the functions in this file are platform-specific. It is\nbetter to force all platforms to implement than having some sort of weak\nfunction placeholder.\n\nPorting guide updated.\n\nChange-Id: I5beeeb10bec6fe5178b24503d6da8ca66074a8c6\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n" }, { "commit": "3cd87d77947ec4fc04440268ed122b4ed81c7781", "tree": "78fdee12b026b931029e434f29b4fe09835fe4c9", "parents": [], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Tue Oct 09 11:12:55 2018 +0200" }, "committer": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Oct 10 12:34:34 2018 +0200" }, "message": "Trusted Firmware-A Tests, version 2.0\n\nThis is the first public version of the tests for the Trusted\nFirmware-A project. Please see the documentation provided in the\nsource tree for more details.\n\nChange-Id: I6f3452046a1351ac94a71b3525c30a4ca8db7867\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\nCo-authored-by: amobal01 \u003camol.balasokamble@arm.com\u003e\nCo-authored-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\nCo-authored-by: Asha R \u003casha.r@arm.com\u003e\nCo-authored-by: Chandni Cherukuri \u003cchandni.cherukuri@arm.com\u003e\nCo-authored-by: David Cunado \u003cdavid.cunado@arm.com\u003e\nCo-authored-by: Dimitris Papastamos \u003cdimitris.papastamos@arm.com\u003e\nCo-authored-by: Douglas Raillard \u003cdouglas.raillard@arm.com\u003e\nCo-authored-by: dp-arm \u003cdimitris.papastamos@arm.com\u003e\nCo-authored-by: Jeenu Viswambharan \u003cjeenu.viswambharan@arm.com\u003e\nCo-authored-by: Jonathan Wright \u003cjonathan.wright@arm.com\u003e\nCo-authored-by: Kévin Petit \u003ckevin.petit@arm.com\u003e\nCo-authored-by: Roberto Vargas \u003croberto.vargas@arm.com\u003e\nCo-authored-by: Sathees Balya \u003csathees.balya@arm.com\u003e\nCo-authored-by: Shawon Roy \u003cShawon.Roy@arm.com\u003e\nCo-authored-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\nCo-authored-by: Thomas Abraham \u003cthomas.abraham@arm.com\u003e\nCo-authored-by: Vikram Kanigiri \u003cvikram.kanigiri@arm.com\u003e\nCo-authored-by: Yatharth Kochar \u003cyatharth.kochar@arm.com\u003e\n" } ] }