)]}' { "log": [ { "commit": "6043eaf8e2aad4727f6e3f7199e88b59787d3ad4", "tree": "0bef58a1a1ac541c6d73fe59773d8f9701f87f93", "parents": [ "277925bbfc6bd1caf47f573dd17569b9a30d7844" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Mar 08 14:14:12 2024 +0100" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Jul 30 14:22:31 2024 +0200" }, "message": "feat(spm): probe SVL for SME related tests\n\nFor world switch SPM tests checking the SME context, probe the possible\nSVL values in streaming SVE and run tests with each possible SVL.\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: I5157fc896168f7ea2df131a86acdb1d1f1bb795e\n" }, { "commit": "277925bbfc6bd1caf47f573dd17569b9a30d7844", "tree": "919efe209c396822e0049ce4a02cac8121769047", "parents": [ "e713f655c81cd293ed03211437281c00da444171" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Oct 12 14:56:14 2023 +0200" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Jul 30 14:22:28 2024 +0200" }, "message": "test(spm): add three SME related tests\n\nSME enter SPMC with SSVE enabled.\nSME enter SPMC with ZA enabled.\nSME enter SPMC with SSVE+ZA enabled.\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: I092c7618e8de22125b3e957ed557e8177acc2b1f\n" }, { "commit": "e713f655c81cd293ed03211437281c00da444171", "tree": "2ec8d0258d90be8bf17449431855e84078e8f7a4", "parents": [ "57b94c4410d3568754feb1aede059ad794a345a7" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed Mar 27 17:09:53 2024 +0100" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Jul 30 14:21:28 2024 +0200" }, "message": "refactor(spm): rename FF-A SIMD test suite\n\nRename \"SIMD,SVE Registers context\" test suite to \"SIMD context\nswitch tests\".\nRename test case \"Check that SIMD registers context is preserved\" to\n\"Check that Adv. SIMD registers context is preserved\".\nUpdate platform tests_to_skip files accordingly.\nRemove redundant \"SIMD,SVE Registers context\" instance from\ntftf/tests/aarch32_tests_to_skip.txt\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: Ida5f46a8d0ec822a6629b660c41dfcf9c7e200e7\n" }, { "commit": "57b94c4410d3568754feb1aede059ad794a345a7", "tree": "9c844f15c0f074ac84cc1b27d5f2ccb12873efaa", "parents": [ "2661ba526090e7217d8a334f6f7280c56296f37b" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed May 17 16:41:47 2023 +0200" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Tue Jul 30 14:21:28 2024 +0200" }, "message": "refactor(spm): test_sve_vectors_preserved\n\nRefactor test_sve_vectors_preserved to probe the possible vector length\nthat the platform implements.\nPerform normal/secure world switches and check that SVE state is\npreserved for all possible vector lengths.\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: I90f56d9ae97624ceaaae5a4818045922961e5066\n" }, { "commit": "d0704f69f4824d6100faabd19522e0205c926e92", "tree": "cbc56389b7c54fe0021fcfab729b9f5c48f9c5d2", "parents": [ "65442a9ca6fd1062f0eb34c4ac9f62f781dcf352", "c3cf2daed819a9d01feba31832544309c9da8d70" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Mon Jul 29 18:54:59 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jul 29 18:54:59 2024 +0200" }, "message": "Merge \"feat(amu): test AMU counter restriction (RAZ)\"" }, { "commit": "65442a9ca6fd1062f0eb34c4ac9f62f781dcf352", "tree": "7c4a6528edfddbbcfa4513549244e6e759b16e19", "parents": [ "3d88db7691467351726d05b20d629b94c1fb1b59", "b47ccd0519d2b26fb89bd3434113a17b97e9cc05" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Jul 24 20:04:49 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 24 20:04:49 2024 +0200" }, "message": "Merge \"test(handoff): fix register convention value on test_firmware_handoff()\"" }, { "commit": "3d88db7691467351726d05b20d629b94c1fb1b59", "tree": "10f847b91327aae17ae91a2d6a5342b0a1575e03", "parents": [ "b1ab5854ad384dd1e3abbe760a6b35d6cae9a0bc", "94963d4e739f3fb1accefddd4105cf9140989889" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Jul 24 17:26:44 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 24 17:26:44 2024 +0200" }, "message": "Merge \"feat(fgt): add support for FEAT_FGT2 testing\"" }, { "commit": "cd6c94b20e7450e27254856a82008ca0595d84d1", "tree": "6a8146d2ef87f4c5a0f72f84b850e1577c57a4a4", "parents": [ "72b56754be783ab84ae57a867a6495a4cbfcace6" ], "author": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Tue Feb 15 17:19:05 2022 +0000" }, "committer": { "name": "Jayanth Dodderi Chidanand", "email": "jayanthdodderi.chidanand@arm.com", "time": "Tue Jul 23 14:06:14 2024 +0100" }, "message": "feat(ls64): add a test for 64byte loads/stores instructions\n\nThis patch adds a test to verify the 64 byte load and store\ninstructions introduced by FEAT_LS64.\nThe test primarily executes instructions:\n1. LD64B\n2. ST64B\nand ensures that the NS-EL2 has no dependency on EL3 while\nrunning them.\n\nSigned-off-by: Jayanth Dodderi Chidanand \u003cjayanthdodderi.chidanand@arm.com\u003e\nSigned-off-by: Juan Pablo Conde \u003cjuanpablo.conde@arm.com\u003e\nChange-Id: I7a4ca0ee4a2c18bf0de030c72e35eb218bc6364c\n" }, { "commit": "94963d4e739f3fb1accefddd4105cf9140989889", "tree": "904e5a3428384fae10f4cae54fd91589fc47da8c", "parents": [ "72b56754be783ab84ae57a867a6495a4cbfcace6" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Jun 13 17:19:56 2024 -0500" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Mon Jul 22 16:21:01 2024 -0500" }, "message": "feat(fgt): add support for FEAT_FGT2 testing\n\nThis patch adds testcase that validates FEAT_FGT2 support\nby reading Fine-grained trap registers that are part of FEAT_FGT2.\nThese registers are only present when FEAT_FGT2 is implemented\n\nChange-Id: Ifc1106d12dbe03b956310d364600368d3f035491\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "72b56754be783ab84ae57a867a6495a4cbfcace6", "tree": "eb7299d596c722a140043073a7cade7d9f50e852", "parents": [ "994e6956079c58766cefac29aaa0f97af10cd73c", "2f2c959871723c303a833778271cd923910deaca" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Jul 22 18:08:11 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jul 22 18:08:11 2024 +0200" }, "message": "Merge \"feat(debugv8p9): test if EL3 has properly enabled FEAT_Debugv8p9\"" }, { "commit": "b47ccd0519d2b26fb89bd3434113a17b97e9cc05", "tree": "81c6baf940af8d9cb028aad04265d872b3cd48ae", "parents": [ "994e6956079c58766cefac29aaa0f97af10cd73c" ], "author": { "name": "Levi Yun", "email": "yeoreum.yun@arm.com", "time": "Wed Jul 10 16:18:47 2024 +0100" }, "committer": { "name": "Levi Yun", "email": "yeoreum.yun@arm.com", "time": "Mon Jul 22 12:03:28 2024 +0100" }, "message": "test(handoff): fix register convention value on test_firmware_handoff()\n\nAccording to recently firmware handsoff spec [1]\u0027s \"Register usage at handoff\nboundary\", Transfer List\u0027s signature value was changed from 0x40_b10b\n(3 bytes) to 4a0f_b10b (4 bytes).\n\nAs updating of TL\u0027s signature, register value of x1/r1 should be:\n\nIn aarch32\u0027s r1 value should be\n R1[23:0]: set to the TL signature (4a0f_b10b -\u003e masked range value: 0f_b10b)\n R1[31:24]: version of the register convention \u003d\u003d 1\nand\nIn aarch64\u0027s x1 value should be\n X1[31:0]: set to the TL signature (4a0f_b10b)\n X1[39:32]: version of the register convention \u003d\u003d 1\n X1[63:40]: MBZ\n(See the [2] and [3]).\n\nTherefore, it requires to separate mask and shift value for register\nconvention version field when sets each r1/x1.\n\nCurrently, TRNASFER_LIST test runs only in aarch64.\nSo, change the assert value in test_firmware_handoff() as\naarch64\u0027s x1 value when transfer list deliver.\n\nLink: https://github.com/FirmwareHandoff/firmware_handoff [1]\nLink: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2]\nLink: https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db75213e458d392b751f0707de027 [3]\n\nChange-Id: Ibc86963cc5abda3aae4cb8fe34533be250e3dd95\nSigned-off-by: Levi Yun \u003cyeoreum.yun@arm.com\u003e\n" }, { "commit": "09d34fc7045099a04fc3b5a16b1a6ff7249f0f77", "tree": "ab3c2ed5b796e99da0c12ebb8264935f193d6baf", "parents": [ "de531d27a8cf9222463fa564fa8cbc39ba5d907d" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jul 17 14:35:26 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jul 17 14:51:54 2024 +0100" }, "message": "fix(rme): tests pass with trp but not with rmm\n\nThe newly added tests to validate the SPMC can recover\nfrom a GPF are passing with TRP but not with RMM.\n\nThe tests are:\n1- initialising memory descriptors;\n2- changing the TX buffers to realm PAS;\n3- causing SPMC to handle GPF;\n4- check it returned expected error code;\n5- reset the TX buffer PAS;\n6- invoking the FF-A call that failed priorly, expecting\nit would this time pass.\n\nStep 6 was failing because the content of the descriptor in\n1 was not preserved, due RMM sanitising them.\nAdding the reinitialisation of the descriptors before\nstep 6.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ic80151c8782cd360eeac1775429b68a1310e1259\n" }, { "commit": "de531d27a8cf9222463fa564fa8cbc39ba5d907d", "tree": "0f59873f9a6d366fe95fe693952cfc257600a001", "parents": [ "8a8536e4d55459f835625d305300d7ba234f8801", "06f430a8d5b52c4b5a176c150acabcad8c4df529" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Jul 15 17:58:14 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jul 15 17:58:14 2024 +0200" }, "message": "Merge changes from topic \"ja/rxtx_protect\"\n\n* changes:\n test(memory share): hypervisor retrieve request fails\n test(memory share): relinquish fails if TX is in realm\n test(memory share): hypervisor\u0027s RX is realm on retrieve\n test(memory share): hypervisor\u0027s TX is realm on retrieve\n test(memory share): retrieve request from VM\n test(memory share): make TX buffer realm\n" }, { "commit": "06f430a8d5b52c4b5a176c150acabcad8c4df529", "tree": "fd3999753c86d8e728d1606a512f81a1c3dc2697", "parents": [ "4e6fa5b68bbf0ae3be536ec90022db38eb3d4012" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 26 19:09:33 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jul 15 16:12:15 2024 +0100" }, "message": "test(memory share): hypervisor retrieve request fails\n\nTest that an hypervisor retrieve request fails smoothly\nif either the TX or the RX buffer are in the realm PAS.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I07e4aa2e07cfd1b5132e82bfbf5a2f76a6f34c14\n" }, { "commit": "4e6fa5b68bbf0ae3be536ec90022db38eb3d4012", "tree": "689338a6be4c08c2eaf7bc980c6c0ab0f6d74df8", "parents": [ "8d6843a473dbd32b80c9b9abfdb4b45341a94033" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 26 16:24:07 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jul 15 16:12:15 2024 +0100" }, "message": "test(memory share): relinquish fails if TX is in realm\n\nTest that if there is a GPF when the SPMC copies the relinquish\ndescriptor from Hypervisor\u0027s TX buffer, the handling fails\nsmoothly with error FFA_ERROR_ABORTED.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I45b41a6bdd0efa1f0b01645c944d482ecf993a73\n" }, { "commit": "8d6843a473dbd32b80c9b9abfdb4b45341a94033", "tree": "36324135b3e89f2a632f139f9a435e7f3403eeef", "parents": [ "14c4a326e24ccf2563554d7ea0f282c97cef2ae7" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Apr 25 14:17:52 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jul 15 16:11:19 2024 +0100" }, "message": "test(memory share): hypervisor\u0027s RX is realm on retrieve\n\nThe test validates that the SPMC is able to recover from a trapped\naccess to a realm RX buffer during the retrieve response. The\ncall to FFA_MEMORY_RETRIEVE_REQ should return FFA_ERROR_ABORTED.\n\nFollowing, reset the RX buffer\u0027s PAS back to NS, and repeat the\nretrieve request. This time the operation should succeed.\nRelinquish the memory to allow the reclaim.\n\nAt the end of the operation, the sender shall still be able to reclaim\nas the retrieve request should have failed to update any of the structures.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I5d0f2a3e5716a3ed27dda4b6592682c34841ed63\n" }, { "commit": "14c4a326e24ccf2563554d7ea0f282c97cef2ae7", "tree": "cc0dd28c1ccb60507544c3f397e8bb6f3a6400d8", "parents": [ "3aa08bc358d4fde60879a652963d5c394b375286" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Apr 25 13:57:09 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jul 15 16:11:03 2024 +0100" }, "message": "test(memory share): hypervisor\u0027s TX is realm on retrieve\n\nRecreate a memory share with multiple borrowers, in which one of the\nborrowers is a VM. The Hypervisor\u0027s TX buffer was moved into realm PAS.\nThe retrieve request is expected to fail with FFA_ERROR_ABORTED.\nReset the TX buffer\u0027s PAS back to non-secure, and redo the retrieve\noperation.\nThis time around, the test is expected to pass.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Id60f17804df4e200533dc1cd8066e64121e04dfd\n" }, { "commit": "3aa08bc358d4fde60879a652963d5c394b375286", "tree": "9132e6a44d4c328d9eda4d6ccfd4efde21106ae2", "parents": [ "d8e2fcd3d125f0d49a59d5db8cfc54c32b89602d" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Apr 24 22:20:23 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jul 15 14:32:40 2024 +0100" }, "message": "test(memory share): retrieve request from VM\n\nThe SPMC supports the case in which the hypervisor doesn\u0027t\ntrack the operation. This is usable for multiple borrower operations,\nwith a VM. In this case, hypervisor/OS Kernel shall forward the\nrequests to retrieve memory into the SPMC. This patch adds such\ncase, as we lost this coverage in the Hafnium tests.\n\nChange-Id: Ia217ababd6e4ae0a82bed781b6f217a52a0909e0\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\n" }, { "commit": "d8e2fcd3d125f0d49a59d5db8cfc54c32b89602d", "tree": "55015474b85830d668de9edeabe2ab36245ac76d", "parents": [ "c95644b4802477edceec51af85c9b12d00ac3a98" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Mar 28 15:53:51 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jul 08 14:23:28 2024 +0100" }, "message": "test(memory share): make TX buffer realm\n\nTest case scenario in which the NWd changes the PAS of the TX\nbuffer to realm, and invokes FFA_MEM_SHARE ABI.\nSPMC should be able to recover and return FFA_ERROR_ABORTED.\n\nChange-Id: I0f0d833f6a7dcf019deaa5ac661f12060c3427c2\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\n" }, { "commit": "f1738b386adba8369bb7ef9344fabac9b5cd1aab", "tree": "4c570f3632ddb08a2c376055d9c518a1ec5e19d2", "parents": [ "c95644b4802477edceec51af85c9b12d00ac3a98" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed Oct 11 14:09:46 2023 +0200" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Thu Jul 04 12:36:06 2024 +0100" }, "message": "test(realm): unify SIMD test cases\n\nThere are two testcases host_realm_fpu_access_in_rl_ns_se and\nhost_and_realm_check_simd which verifies SIMD state across different\nworld switch. This change unifies both these testcases to one test case\nhost_realm_swd_check_simd so that new enhancements or fixes can be done\nin one place.\n\nThis change also increases the code coverage by removing the restriction\non the need for both secure partition and realm payload as a\nprerequisite.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: I210acdff9e584cb392a2f1919dce04971fd2fc7a\n" }, { "commit": "33a7ea4c7e1b31569dbc00768e61784dc54df221", "tree": "15c6d82c45833c621caefd8cdd937537cc51f299", "parents": [ "2a426e74d71bd82c360ac4bdd77c8c164b50ac16" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Jul 03 15:11:41 2024 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Jul 03 15:11:41 2024 +0100" }, "message": "fix: remove `test_ffa_partition_info_v1_0`\n\nThe test `test_ffa_partition_info_v1_0` relies on being able to change\nthe FF-A version after it has been negotiated. That is no longer\nallowed, so the test will fail. It will be moved to the Hafnium test\nframework, where each test runs in its own session.\n\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\nChange-Id: I377b40b88d26246e9a584d65c7e12bab3050fde7\n" }, { "commit": "2a426e74d71bd82c360ac4bdd77c8c164b50ac16", "tree": "45de78974518c59f994c4a89df562f786e320e30", "parents": [ "1abd8df96be1f7c5efd73ff38e8044bc5c1b6363" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Jul 03 15:03:45 2024 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Jul 03 15:03:45 2024 +0100" }, "message": "fix: fix test_smccc_callee_preserved\n\nThe `test_smccc_callee_preserved` test was calling `FFA_VERSION` with an\nold FF-A version, which is no longer allowed. Fix it by calling\n`FFA_VERSION` with the current version.\n\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\nChange-Id: I85b7c2c1bf54719f84fb737fce770f7f5073580b\n" }, { "commit": "2f2c959871723c303a833778271cd923910deaca", "tree": "a3b777765c3959ea183de411cbe73d18e45578b1", "parents": [ "b5103df4af352c9409fb0756579788d6c0732b87" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Jun 06 16:34:28 2024 -0500" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Fri Jun 28 14:55:27 2024 -0500" }, "message": "feat(debugv8p9): test if EL3 has properly enabled FEAT_Debugv8p9\n\nWhen FEAT_Debugv8p9 is not enabled, access to MDSELR_EL1\ntraps to EL3. Access to FEAT_DEBUGV8P9 control registers\nmust be explicitly enabled in EL3,\n\nThis testcase uses this behavior to test if\nFEAT_Debugv8p9 is enabled or not.\n\nChange-Id: I2f9a0158e9f38eaffac2e27c40d44d3c520d508d\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "7308b12df02634ca78f0e1ea6e4f758a8b3d8e2a", "tree": "5bd75867d077a40ebd30f5245ae7d5126524220f", "parents": [ "c884d6bf9e3aca4dc63d318eb99d6141c9353363" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Apr 16 14:02:25 2024 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jun 27 10:57:30 2024 +0100" }, "message": "refactor: FFA_VERSION related refactors\n\n* Use an enum for FF-A versions.\n* Replace `MAKE_FFA_VERSION` macro with `make_ffa_version` function.\n* Add `ffa_version_is_valid` helper function.\n* Add `ffa_version_get_major` and `ffa_version_get_minor` helper\n functions.\n\nChange-Id: Icbc4b1fa16e826c2ec541add65aa7c14fb397f95\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "11f6ee85b015635021083db0f494a2c2957566ef", "tree": "14a2c57f6af3ce5453e364e35490c115feba89cf", "parents": [ "07f9671ac3f4b89bda1b9c058c60e7fc39470939" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Tue Jun 04 14:15:17 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Tue Jun 18 14:13:19 2024 +0200" }, "message": "fvp: skip cpu cluster power-on check\n\nOn newer FVP models there is known issue which would report\ncluster power-on check with incorrect bits causing this test to\nfail.\n\nSo skip this test for FVP, the issue is expected to fixed in 11.27\nFVP models we could enable it back then.\n\n\nChange-Id: I7f4e7ba1f4b7473736276958663622a9436fcadb\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "07f9671ac3f4b89bda1b9c058c60e7fc39470939", "tree": "a65a8925f6b949d4297c35da834c51e9813c1394", "parents": [ "6316e359865d3fd00f1c782c25089f974b852875", "a45649a48865a609ce854f3dda51b19517b4cbc0" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Jun 14 22:46:08 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 14 22:46:08 2024 +0200" }, "message": "Merge changes from topic \"ja/memory_share_64\"\n\n* changes:\n test(ff-a): add SMC64 abi to FFA_FEATURES\n test(memory share): use SMC64 rather than SMC32\n" }, { "commit": "9eb1eaa78ba579295df8876a2480274392ffaa6a", "tree": "fac0fc93aaadd6a30030a514bb6d958bfc1b7e66", "parents": [ "7efea19cd6c832ea8a595ef5dc057cca721ca237" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Tue Sep 19 16:07:09 2023 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Jun 13 23:09:38 2024 +0100" }, "message": "feat(rmi): add specific tests for FEAT_LPA2 on RMI tests\n\nThis patch also adds four new tests for RMM:\n\n * Test realm creation with no FEAT_LPA2 and -1 RTT starting level\n * Test realm creation with no FEAT_LPA2 and S2SZ \u003e 48 bits\n * Test creating a realm with FEAT_LPA2 disabled but\n FEAT_LPA2 is present on platform\n * Test creating a realm with FEAT_LPA2 enabled but FEAT_LPA2\n is not present on platform.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I6c017a16cb5511977bb37f5e146afd5e60b06b97\n" }, { "commit": "7efea19cd6c832ea8a595ef5dc057cca721ca237", "tree": "5f387e91703069d63085e874b0c7727b15d2be80", "parents": [ "6d833ef005af59119dbbc9794a3bbfc191eb4f60" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Tue Sep 19 16:07:09 2023 +0100" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Jun 13 13:17:35 2024 +0100" }, "message": "feat(rmi): add support for FEAT_LPA2 to the Realm Extension tests\n\nThis patch adds support to the current Realm Extension tests to\nenable and use 52 bit address size with 4KB granularity when\nFEAT_LPA2 is present.\n\nIn addition, this patch also introduces changes to support passing the\nstarting RTT level and the FEAT_LPA2 enable flag during realm creation\nso they can be used later to implement tests for FEAT_LPA2 on RMI.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I0a930735a44772e5e76d6608c969759f27129917\n" }, { "commit": "a45649a48865a609ce854f3dda51b19517b4cbc0", "tree": "e8f1d835a7974b2215da25148981e9c7d48bfe49", "parents": [ "8984e729cce2c9a1ac8b87fe4e0df886a6ccd6c7" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 08 17:55:35 2024 +0100" }, "committer": { "name": "Joao Alves", "email": "joao.alves@arm.com", "time": "Tue Jun 11 14:52:11 2024 +0200" }, "message": "test(ff-a): add SMC64 abi to FFA_FEATURES\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I387f4fd100462235ecbd298d3921ebab1a004d79\n" }, { "commit": "8984e729cce2c9a1ac8b87fe4e0df886a6ccd6c7", "tree": "1e2546ecd80740da5bfcb7d21bf1f03c2bdc50d2", "parents": [ "6d833ef005af59119dbbc9794a3bbfc191eb4f60" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue May 07 22:21:54 2024 +0100" }, "committer": { "name": "Joao Alves", "email": "joao.alves@arm.com", "time": "Tue Jun 11 14:52:02 2024 +0200" }, "message": "test(memory share): use SMC64 rather than SMC32\n\nThe SPMC supports memory sharing interfaces to use the\nSMC64 or SMC32 abis.\nThere was not functional change with this. However, making\nTF-A-Tests use SMC64 to validate that they both work.\nHafnium tests will remain using the SMC32 version of the\nABIs.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I31e275ca50973774928591eef0128f0cf0f5be8b\n" }, { "commit": "b324f4d2251094094b32c3138d9313addf443e6b", "tree": "78a6d6800935c6e1cda1a3156ab6facad65383aa", "parents": [ "6c0be80b887f8accf6908b39a7f7b41eda7327d1" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Feb 26 11:06:03 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue May 14 15:38:56 2024 +0200" }, "message": "test(realm): test for rtt_fold assigned\n\nTest for RTT_FOLD for assigned ram, assigned empty\nand assigned ns rtt entries\nFix helper to allow creating L1 block entry for unprotected IPA\n\nChange-Id: I77693f76722d60427edcb112ca58bf772c194b06\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "6c0be80b887f8accf6908b39a7f7b41eda7327d1", "tree": "267f467f11d91951f6a12ad2fae9b079f31ab3f5", "parents": [ "ecc32844365ca4745dfd92d1adeaab2f39fdeeb2" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 20 11:52:57 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue May 14 15:38:51 2024 +0200" }, "message": "test(realm): add test for rtt_fold unassigned\n\nAdd testcase for RMI_RTT_FOLD,\nfor protected IPA unassigned empty and unassigned ram RTTs.\nHost attempts to fold till max level permitted by Arch.\nFix helper to align with RMI call, remove unused code.\n\nChange-Id: Ib94efa7ba60e028bb9f765e769fe377c101a71fc\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "9668ba5730d9607609879667a19f3249a10f2c99", "tree": "812a321c9182243b86010e63d655769764e64b98", "parents": [ "b44b4753d698bb7b703198a458e78746cff0ed23" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon May 13 11:49:45 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon May 13 14:04:21 2024 +0100" }, "message": "fix(ff-a): tests for FFA_FEATURES\n\nThere are different expectations to the result to the FFA_FEATURES\ncall, provided the feature IDs for ME, SRI and NPI interrupt from\ntftf or cactus.\n\nThis patch refactors the test to keep the common part equal.\nFor the differences, locally define the expected test target\nfor the FFA_FEATURES call.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I96f18487c80d789cf4e10ceee0591786708bce51\n" }, { "commit": "b44b4753d698bb7b703198a458e78746cff0ed23", "tree": "67f3fff875a629fa8d8f0d9778126fefb3430ee9", "parents": [ "caff038b3f0b261b1fcc14f7918a80fa515202c1" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon May 13 10:15:51 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon May 13 10:15:51 2024 +0100" }, "message": "fix(ff-a): check for presence of SPMC\n\nCheck for the presence of the SPMC in the setup before running\nthe tests.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4faaf8a169f58a34dda910fd7e00a6844826c17e\n" }, { "commit": "c3cf2daed819a9d01feba31832544309c9da8d70", "tree": "d47120e316a97ea94409e1a61594ec6da1f5a71b", "parents": [ "caff038b3f0b261b1fcc14f7918a80fa515202c1" ], "author": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Mon Apr 01 13:57:19 2024 -0500" }, "committer": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Fri May 10 13:40:04 2024 -0500" }, "message": "feat(amu): test AMU counter restriction (RAZ)\n\nWhen using AMU counters, there is risk of exposing information to\nlower exception levels. In order to prevent this, counters are\nrestricted, so they are read as zero (RAZ) at a lower EL. This\ntest verifies that counters are read as zero after forcing counting\nthrough instructions that trigger MPMM \"gear shifting\" (e.g.: by\nexecuting SVE instructions).\n\nNote: This test applies to TC2 only, as it is the only platform that\n supports MPMM currently.\n\nSigned-off-by: Juan Pablo Conde \u003cjuanpablo.conde@arm.com\u003e\nChange-Id: Ic32ba19fa489cf479947d4467ddb84e6abd1b454\n" }, { "commit": "caff038b3f0b261b1fcc14f7918a80fa515202c1", "tree": "6b62c315921ae23374ba8eb6c1ad26dd7a9fd929", "parents": [ "3202b1a27c5316292c893be1af3cd9cee1bc8738", "0569cc02f6effc7e44f39844ef9ffb9b24a823ca" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Fri May 10 12:51:50 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 10 12:51:50 2024 +0200" }, "message": "Merge \"test(spm): test FFA_FEATURES with NPI, SRI, MEI\"" }, { "commit": "3202b1a27c5316292c893be1af3cd9cee1bc8738", "tree": "2c201ceff7581f93a28f39746bb91dde9d5d472f", "parents": [ "5e44ee68b6cdce5a40137dac562906c7e43cde41", "e533478ae2a0374e25d1eaff68eb5381a33ed345" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri May 10 07:54:23 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri May 10 07:54:23 2024 +0200" }, "message": "Merge \"feat(smc): add test for pmf version check\"" }, { "commit": "c83b17bcd0cfcb2dff8b64c8895bc9684f468b71", "tree": "05cfb8d43bf7ecbe2c254c9bf4ef4dccfe3dffb9", "parents": [ "ffdfafbd49bbe0c6212c00ca4fd910574cac538d" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Apr 09 12:09:12 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "test(indirect message): aborted send from vm to sp\n\nThe SPMC shall copy the message from the VM\u0027s buffer into\nthe SP\u0027s when VM sends indirect message.\nTest that if TX buffer of the VM is added to the realm\nPAS, the operation fails smoothly with FFA_ERROR_ABORTED.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I375d1987429ed38349c25764262f386b6a4cde57\n" }, { "commit": "ffdfafbd49bbe0c6212c00ca4fd910574cac538d", "tree": "d09165edc985faeeaa800aca2570d9a03843fa26", "parents": [ "807822927033f07e272eae2222f78a878a23bbb0" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Apr 09 12:07:11 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "feat(ff-a): FFA_MSG_SEND2 helper with sender ID\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Idaf866a342f2127172b46f7a7a44a599723db7cf\n" }, { "commit": "807822927033f07e272eae2222f78a878a23bbb0", "tree": "7742e64211e9d61a03a34eb2c66edc660a073400", "parents": [ "df2deb36bc477d46e70704e771061dedd64ae996" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 08 18:04:20 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "test(indirect message): aborted send from SP to VM\n\nTest that if the RX buffer of VM is put on the realm\nPAS and an SP attempts to send a message to it, the\noperation terminates smoothly.\n\nChange-Id: Ie7fd316a6256b1c3445dfb7cb8fe1bbd09fffb6e\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\n" }, { "commit": "df2deb36bc477d46e70704e771061dedd64ae996", "tree": "2b5e7872bf9a7a094b19c13e413150357290b381", "parents": [ "cd779f49d89524f5236f4f671e3d566c7d333166" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 22 15:17:45 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "fix(notifications): destroy VM\u0027s bitmap\n\nThe last test in the notifications test suite was not\ncleaning up after itself. This change makes the test destroy\nthe bitmap for the receiver VM in the SPMC.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ia96b8d6e680dd0af99a2c767cd35efe38cf10011\n" }, { "commit": "cd779f49d89524f5236f4f671e3d566c7d333166", "tree": "a132844b98b4c5a8865f9d621b01507446026058", "parents": [ "58cc4dad0451ab4669072c654dbc0603932baa94" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 22 14:31:06 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "test(indirect message): request SP to message VM\n\nAdd test for SP to message a normal world VM.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4c2f3e8995163024453b6f51900599a5f6e60b19\n" }, { "commit": "907fcef5cc7b2c09679f7ebf99fd92426c544efc", "tree": "f33cc7fda4a2cd7fb4992e2956062ee474624691", "parents": [ "c6b92d5e73a19a9aeeb28d7ac8103cd2dc5adca8" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 08 17:32:58 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "feat(indirect message): send and receive messages\n\nAdded helpers to receive and send indirect messages, respectively:\n- `receive_indirect_message`;\n- `send_indirect_message`;\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I396870f15172f841167627b14c18b1504e0efbee\n" }, { "commit": "c6b92d5e73a19a9aeeb28d7ac8103cd2dc5adca8", "tree": "ee1d3de9d246f6d5abc62170a7b01b656cad09aa", "parents": [ "779fba660d61c8d95adbc66cb5b7086d681e1eaf" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 05 14:16:00 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:35 2024 +0100" }, "message": "feat(ff-a): define framework notification helpers\n\nDefined the helpers to process framework notifiactions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I979162363898b4f9bf1a3d57327078364883b896\n" }, { "commit": "779fba660d61c8d95adbc66cb5b7086d681e1eaf", "tree": "09298958223dd797fff83fb116e1c76557001137", "parents": [ "2921fba58bd4535f8e944620273ade51f69db63f" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Apr 05 14:14:40 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu May 09 13:48:34 2024 +0100" }, "message": "feat(ff-a): add helpers for indirect message\n\nAdd the header structures for the rxtx buffers, other\nhelper macros, and the FFA_MSG_SEND2 ABI caller.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ie5c735aa0b33dbf0288b6494362b6e7dc84c6db7\n" }, { "commit": "e533478ae2a0374e25d1eaff68eb5381a33ed345", "tree": "610a7160c96b43e96c00fafcbf9f4676ad6c222c", "parents": [ "dfc4d7f46fb95441443066f60d1b855f7ef9c364" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed May 08 20:33:20 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed May 08 20:33:20 2024 -0500" }, "message": "feat(smc): add test for pmf version check\n\nPMF is moved under vendor specific EL3 range, part of this\nwe have introduced each sub-service have an version scheme[1].\n\nAdd a simple test to check if the sub-service version\nis probed.\n\n[1]:\nhttps://trustedfirmware-a.readthedocs.io/en/latest/components/ven-el3-service.html\n\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\nChange-Id: I885cd1378a8025371172e5cd82fdd111d6832619\n" }, { "commit": "2921fba58bd4535f8e944620273ade51f69db63f", "tree": "5cc656109e7ba43327e00da2b4b34e7658b8bbd2", "parents": [ "a23b8ffefeafc1b5dab19fa2fc78e9596739cbc1" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Apr 24 10:30:35 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 08 16:30:21 2024 +0100" }, "message": "chore: move test from xml file\n\nMove test suite \"SP exceptions\" from \u0027tests-spm.xml\u0027\ninto \u0027tests-memory-access.xml\u0027.\n\nChange-Id: Ia312007cd3c6c6b98ac62cdd7e2b762669fa8e71\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\n" }, { "commit": "a23b8ffefeafc1b5dab19fa2fc78e9596739cbc1", "tree": "7cabe04b2079369f331677c84fe442b71408b707", "parents": [ "067daca6eea89d0ac95fcedc12750521ea09b952" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Feb 23 14:50:14 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 08 16:30:16 2024 +0100" }, "message": "test(rme): rxtx buffers are in the realm PAS\n\nAdded a test for which the SPMC attempts to use the RXTX\nbuffers, in an RME enabled platform and in which the buffers\nwere changed to realm PAS.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Idb29f8687fbe5885c00e61155a5ebbdd8908d688\n" }, { "commit": "067daca6eea89d0ac95fcedc12750521ea09b952", "tree": "3372bfa2adc9c32b54417f547de0a78cb141909e", "parents": [ "dfc4d7f46fb95441443066f60d1b855f7ef9c364" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Apr 08 17:31:54 2024 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue May 07 15:46:16 2024 +0100" }, "message": "feat(ff-a): add helper FFA_RX_RELEASE with ID\n\nAdd the helper `ffa_rx_release_with_id` for TFTF\nto mimic the releasing of RX buffer from a hypervisor.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I1edcc1568fd84af72454f3b755ccf16eca321a17\n" }, { "commit": "dd8025c73f9c2f73c663629b30508b96f04194e1", "tree": "d476fff8d3bc87d11f8b132b4b55698638792f4a", "parents": [ "951d5fbe6641ed58747fed557e462dd3f3508ce4" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Mar 14 09:47:24 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "feat(smc): add test for vendor-specific service\n\nAdd test to check vendor-specific el3 service calls.\n\nChange-Id: I981d1cacec8690f57e51a5f05d51b6e437d1eb6a\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "951d5fbe6641ed58747fed557e462dd3f3508ce4", "tree": "b086b0ade6129b8294017dcaba03c0ebc5b4da9a", "parents": [ "f33112d50b18143421d3f3eac02a615f821ec284" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Mar 14 09:50:37 2024 -0500" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "refactor(smc): group all smc tests\n\nMove and group all smccc related tests to tests-smc*\nfile.\n\nChange-Id: I34eb4dc906b558badab2c9356bb316d92f40914a\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "f33112d50b18143421d3f3eac02a615f821ec284", "tree": "eacae716d87f7883d56bbdf8b533a8c068a0c00a", "parents": [ "3eb25fb886ece03d872eaba4bbd31cf80edda6af" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Mon Feb 26 09:44:36 2024 -0600" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Apr 24 13:29:10 2024 -0500" }, "message": "refactor: make debugfs and pmf as vendor el3 services\n\nMove Debugfs and PMF support to vendor-specific el3 space.\nSMCCC 1.5 introduces vendor-specific el3 space.\n\nRef: https://developer.arm.com/docs/den0028/latest\n\nChange-Id: Ie6679dbb2ca2434ebd4fc19c2cc21cf5a84f97ab\nSigned-off-by: Govindraj Raja \u003cgovindraj.raja@arm.com\u003e\n" }, { "commit": "0569cc02f6effc7e44f39844ef9ffb9b24a823ca", "tree": "69a44448fc7538e54ce588b55a6d9af5c19ed87e", "parents": [ "bbd609b99b23da41b997415980065be5849aeea9" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Apr 17 17:32:35 2024 +0100" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Apr 23 14:17:32 2024 +0100" }, "message": "test(spm): test FFA_FEATURES with NPI, SRI, MEI\n\nChange-Id: I3cd376e4594e49c984ad6563d36928cee47a0897\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "3eb25fb886ece03d872eaba4bbd31cf80edda6af", "tree": "5de8b9d866ae31762bec44e6d2264ed47bc59d1e", "parents": [ "bbd609b99b23da41b997415980065be5849aeea9", "f2bb5d0f502955caf58192c6d9c9e0a051817b5d" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Apr 23 14:48:41 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Apr 23 14:48:41 2024 +0200" }, "message": "Merge \"test(ff-a): FFA_FEATURES returns max RXTX buffer size\"" }, { "commit": "42487ce271ed8de49625bcec731661b6b790953d", "tree": "9dbccf61a20c85ca92fbf81fbfef005ebb67519d", "parents": [ "eaf60b4cad7d34afedb3259a4dd6164b39cb9c0e", "bff9b3ca375d40753a3212dbf178bcdfc7784841" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Apr 15 15:56:34 2024 +0200" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Apr 15 15:56:34 2024 +0200" }, "message": "Merge changes from topic \"km/rxtx_map_unmap\"\n\n* changes:\n test(spm): tests for RXTX_MAP/RXTX_UNMAP\n feat(ffa-svc): add `ffa_func_name` and `ffa_error_name`\n" }, { "commit": "bff9b3ca375d40753a3212dbf178bcdfc7784841", "tree": "d46e017d6c35e04582c340fbd1c433680fbc22c9", "parents": [ "e3e570653471af3506846f06b5fe0421970adce4" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 18 16:08:35 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Apr 12 17:24:23 2024 +0100" }, "message": "test(spm): tests for RXTX_MAP/RXTX_UNMAP\n\nTests to check that RXTX_MAP and RXTX_UNMAP properly unmap/map the RX\nand TX pages from the NWd stage 2 page tables.\nSpecifically:\n* RXTX_MAP should fail when using secure memory\n* RXTX_MAP should fail when using non-secure memory outside the regions\n specified in SPMC nodes\n* Memory sharing functions (lend, share, donate) should fail when using\n memory that has been mapped by RXTX_MAP\n* RXTX_UNMAP should fail when using different VM IDs\n* Forwarded RXTX_MAP should succeed when the region is not mapped\n* Two consecutive forwarded RXTX_MAPs should succeed when the regions\n don\u0027t overlap and the endpoint IDs are different\n* Forwarded RXTX_MAP should fail when the region is already mapped\n* Memory sharing functions (lend, share, donate) should fail when using\n memory that has been mapped by forwarded RXTX_MAP\n\nChange-Id: I006681ab54f5ff602e862ae09438d0d174c8d0b0\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "e3e570653471af3506846f06b5fe0421970adce4", "tree": "f1a6c8a23f0a06e442d058b2ad22034f6e0febb5", "parents": [ "52f0b0ac70de3701d642cd59044aa70ffa342e40" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Thu Jan 18 14:28:36 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Fri Apr 12 17:16:00 2024 +0100" }, "message": "feat(ffa-svc): add `ffa_func_name` and `ffa_error_name`\n\nAdds helper functions for getting string representations of function\nidentifiers and error codes. This makes debug logs more readable than\nprinting the integer value.\n\nChange-Id: I9e74c197686dc08e0c71886f641c60829587bad6\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "b21ee3e7c8e796f918e59205dd4184aa7732a3e6", "tree": "4c109838a31cfe3375936a4685973af32d39a30b", "parents": [ "52f0b0ac70de3701d642cd59044aa70ffa342e40" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Mar 20 16:32:56 2024 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Fri Apr 05 11:25:54 2024 -0500" }, "message": "test: ensure mte registers are restored upon context switch\n\nThis test aims to validate MTE system registers are restored to\ncorrect values upon world switch triggered by an FF-A direct message\nrequest to an SP.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I9b01d349a0cf0ce557e74cfc70ed5208468e7919\n" }, { "commit": "b1b37926917b265ef8a3f6caf59b6a20fe8b636c", "tree": "41baf3e3f7d6ab325f673bb5bababe955713663f", "parents": [ "e3ee6e0a40b73baffd26563adb9cf49b040cbc30" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Sat Jan 13 21:49:04 2024 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Mar 29 09:22:09 2024 +0100" }, "message": "test(realm): add test for enabling pmu with multiple rec\n\nTest creates realm with less number of pmu counters than available\nTest verifies that only programmed num of pmu counters are available in realm\n\nChange-Id: I479dd8949950357b9814576b1b6cef142d21c75f\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f2bb5d0f502955caf58192c6d9c9e0a051817b5d", "tree": "578f200539be531f599a6d3989cc5894f2280f6f", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Tue Feb 13 17:23:17 2024 +0000" }, "committer": { "name": "Karl Meakin", "email": "karl.meakin@arm.com", "time": "Wed Mar 27 12:48:46 2024 +0000" }, "message": "test(ff-a): FFA_FEATURES returns max RXTX buffer size\n\nAdd testcase to check that a call to `FFA_FEATURES` with\n`FFA_RXTX_MAP_SMC64` returns a parameter explaining the maximum and\nminimum buffer size on v1.2 or greater.\n\nChange-Id: I03efc89655daf9f7c2eb9cf35d26c5a68690036a\nSigned-off-by: Karl Meakin \u003ckarl.meakin@arm.com\u003e\n" }, { "commit": "462b07dc17b74e12a02c66f8135b849e7aea0d52", "tree": "b4f9c6193b7c624f588164232cb10e633ced5621", "parents": [ "faee961c7c3a17ba0eb25f5c90486a38e681c83c" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Feb 08 02:16:25 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm): add testcase for access outside realm IPA space\n\nAdd testcase for accessing addr with IPA outside realm IPA space.\n* If IPA is larger than implemented PA size expect adr size fault,\n* If IPA is larger than realm IPA space but less than implemented\n PA size expect SEA taken to realm.\n\nChange-Id: I81c49bac5b8b869b24b81f6af3cdb3f093eb9f64\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "faee961c7c3a17ba0eb25f5c90486a38e681c83c", "tree": "ac9e3fb9edd777093ea918200a1f649e9377d0f4", "parents": [ "f733a781ab7fdcb4e775a74005b2f23a313094ef" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 14:26:36 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm): add ability to overwrite s2sz for creating realm\n\nAdd capability to check and overwrite s2sz via feature flag\nwhile creating realm.\n\nChange-Id: I33afd5903cf4de546aba1c17c988b32a6e1b05a5\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f733a781ab7fdcb4e775a74005b2f23a313094ef", "tree": "3de60d072408b473bfdbb0ca912eccfafa6be9a9", "parents": [ "733f88170011df029477656c66b6959fdb91cf35" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Jan 03 22:33:10 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Mar 26 15:34:05 2024 +0100" }, "message": "test(realm) : add tests for PAS transitions\n\nadd tests for HIPAS and RIPAS changes at a\nProtected IPA which can occur when the\nRealm state is New and Active\n\nChange-Id: I0ad13d697e8b69e71e58197878d1d58a2f6ebff7\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "248284e7c05a0c80c2d8399759686a1357a58cc9", "tree": "f6552943f25141e317637e9bf6aa495f0ea2fa94", "parents": [ "4b67249600e466b4f4758ee19fc13e2b0a54118f", "31b91f4c51656adf5fe9e8319272d95fa1a2ecdf" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Mar 20 18:13:00 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Mar 20 18:13:00 2024 +0100" }, "message": "Merge \"refactor: trim down extensive test list\"" }, { "commit": "31b91f4c51656adf5fe9e8319272d95fa1a2ecdf", "tree": "dca102360884f383515beb942623029e1960bc4f", "parents": [ "e39d55ab48b30c610859c277551b97c65cbe82bf" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Mar 20 12:57:10 2024 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Mar 20 12:57:10 2024 +0000" }, "message": "refactor: trim down extensive test list\n\nExtensive tests are meant to do stress testing but currently the list\nincludes most of the tests from standard test and two extensive ones\nrelated with PSCI and timer.\nSince we do standard tests in quite a few configurations, no need to\ntest them again in extensive.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I0be868e1e781fd95e95908b82bd138dc7c6d32aa\n" }, { "commit": "e42a620bfceaf6723cba4871a662054cdb622fe4", "tree": "25fcc9e9f03973351598deaae6d10bccce6eb84a", "parents": [ "68f022f84d501985d0be5d5b497d91938539efe0" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 16:37:17 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): add Cortex-A520 cpu struct for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: Ia0533991cc0489fc67c1c69917e5d343410c3a29\n" }, { "commit": "68f022f84d501985d0be5d5b497d91938539efe0", "tree": "58cb3213925bd292c1eea987561182211252d095", "parents": [ "7bb1c84eca3a7dc46051b75b6b1cf13046b88c92" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 16:33:13 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): add Cortex-X3 cpu struct for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I8b3bad451b6c29dedff6cdf310a1bdb3b20c6f4c\n" }, { "commit": "7bb1c84eca3a7dc46051b75b6b1cf13046b88c92", "tree": "1be17aeca48b145e8814b08be48637483268afe7", "parents": [ "44115698f07b73ce83fdcce4e26aafe701c49b1c" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 15 14:14:59 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Mar 14 16:30:45 2024 -0500" }, "message": "refactor(errata_abi): update the cpu structs for errata ABI\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I4650a88003db2ded9277b35c7fc521026fe4a5d7\n" }, { "commit": "df754458af72ab6a30db822cf7c3fe5b42d5c885", "tree": "7238e95f8a1d9f79fbc8314b146b12e7e1a3761e", "parents": [ "5c5f7bdf581348dc8e483b2e4fc3b34b8bae56d2" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Mon Mar 04 15:46:05 2024 -0600" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Mar 14 10:56:21 2024 -0500" }, "message": "refactor(sdei): refactor SDEI test to align with new SPSR config\n\nModified sdei_event_check_pstate() to align with the updated\nSPSR configuration procedure which uses the create_spsr()\nAPI.\n\nChange-Id: I7723657117a8c64762acdbb410ad535058c97e9d\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "cd6128d479033c7ac4cff8e932415b5c04bbde67", "tree": "8fc71d62d3a84528c74c35fb383208129a741a38", "parents": [ "e39d55ab48b30c610859c277551b97c65cbe82bf" ], "author": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Thu Feb 29 15:18:50 2024 -0600" }, "committer": { "name": "Sona Mathew", "email": "sonarebecca.mathew@arm.com", "time": "Tue Mar 05 11:34:15 2024 -0600" }, "message": "refactor(errata_abi): add the Cortex-X4 cpu struct\n\nSigned-off-by: Sona Mathew \u003csonarebecca.mathew@arm.com\u003e\nChange-Id: I8421dcc98eea85d038070f90e819e91bb2652727\n" }, { "commit": "f6328f67e4e87639b48e00d842192122360e1c89", "tree": "fa8e1d90237ac255382b19b74da650f55b9c6faa", "parents": [ "8c2ca7ec7e312f48486c75c42ffad9dc1401d563", "d72ab0984a2318cfa5b74a2dff5b708734d4d402" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Wed Feb 28 14:51:13 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 28 14:51:13 2024 +0100" }, "message": "Merge \"feat: introduce UNDEF injection test\"" }, { "commit": "d72ab0984a2318cfa5b74a2dff5b708734d4d402", "tree": "7eb71791a47bcbea2491ddacfb27f65fe5406f4b", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Dec 11 17:43:53 2023 +0000" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Feb 22 14:21:33 2024 +0000" }, "message": "feat: introduce UNDEF injection test\n\nTest to verify UNDEF injection support in TF-A by trapping FGT register\naccess from tftf into EL3.\n\nTo trap FGT register access to EL3, run the test on model with FEAT_FGT\npresent but the traps from EL3 are not enabled (ENABLE_FEAT_FGT \u003d 0).\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: Ic58ef797c64aad6d17ea33d9fc34e14b4e1a7055\n" }, { "commit": "4aaccc671a4750c72e30e282eff0c4c863eb57a9", "tree": "452393e32b8e1ee9bbc99bd104d4386c82e7ed6b", "parents": [ "90d61cd1e36634597a71b86fcb9701b94741a553" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Feb 22 12:26:57 2024 +0000" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Feb 22 12:51:48 2024 +0000" }, "message": "feat(rmi): force max IPA size on Realms to 48 bits\n\nCurrently, RMM might be able to support FEAT_LPA2 and 52 bits address\nsize, however as TFTF tests does not support FEAT_LPA2 yet, we need to\nlimit the maximum IPA space size for realm creation on RMI tests, as\nTFTF uses the maximum size supported reported by RMM as the IPA\nsize when creating new realms, which can cause an inconsistency if\nFEAT_LPA2 is disabled.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I3b77cbbb41a8a1353c7a35decc35d080fd3ad9f3\n" }, { "commit": "2a5abadb8e841eedeaa1ff78b6f0da5f957b2ab8", "tree": "42755e1512d2cf0d6abf3f0baa01a289d2a69e46", "parents": [ "21a30ed1ae35a8b32d23e96cdc143702a27bda90" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Jan 17 13:48:44 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Feb 14 12:51:31 2024 +0100" }, "message": "test(realm): add test for FEAT_DIT\n\nAdd testcase to enable FEAT_DIT in realm.\nTest if DIT Bit is preserved across context switch RL/NS.\n\nChange-Id: I26cbaaf669b53ecba14a451955b6f847c45e0575\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "21a30ed1ae35a8b32d23e96cdc143702a27bda90", "tree": "bd1d61a86ff59e96c33a98a036e542f43ce185df", "parents": [ "a8deec5c0b51719b1f268e4f106c3a095a387074" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Sat Jan 13 23:07:43 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Wed Feb 14 12:51:31 2024 +0100" }, "message": "test(realm): test realm pauth state is preserved\n\nModify Pauth lib to work for multiple CPU\nTest if Realm pauth state is preserved for all RECs\non context switch to RMM/NS.\n\nChange-Id: Ibb393b415bab27066289b560be49e02d0c8f58ba\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "a3ec1f1762236914d129dd8155d19b149b2c6570", "tree": "932c808a0ca57770ecff5fd831ba2eddb0b25f9d", "parents": [ "8e3f5662031f785930f997d713fc1730b101e5bb", "a08c7195558726a2c3abd3bf9167ff4deae7d9e1" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Mon Feb 12 17:31:14 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Feb 12 17:31:14 2024 +0100" }, "message": "Merge changes from topic \"mp/dma_isolation\"\n\n* changes:\n test: exercise DMA isolation for secure access to ns memory\n fix: specify properties to corresponding memory region nodes\n" }, { "commit": "8e3f5662031f785930f997d713fc1730b101e5bb", "tree": "ee4e3153b8563f3a46e0e845fdce0492307645d0", "parents": [ "51e153663b5b31c3d4f7dcdef266a431111d4bad", "7b51dbe9d4739f622f332fd232a3068b99c2bb50" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Feb 08 17:08:05 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Feb 08 17:08:05 2024 +0100" }, "message": "Merge \"refactor(smc_fuzz): performance enhancement\"" }, { "commit": "b027f5706308502152b5aade0ad509ba27370c42", "tree": "3a05dab054068d29e8b242f8f82daa4a864468e9", "parents": [ "fd35f0a4d6125bb1fa69a671a6d2d42628229609" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Jan 02 22:00:29 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Feb 08 12:14:31 2024 +0100" }, "message": "test(realm): add testcase for Synchronous external aborts\n\nAdd testcase to cause instruction or data abort in Realm by\naccessing addr with\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dEMPTY\n* HIPAS\u003dASSIGNED and RIPAS\u003dEMPTY\n* Unprotected IPA\n* Host injected SEA after Data abort\n\nChange-Id: I6be546c042b4983670fb7c27fca74649c68787be\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "a08c7195558726a2c3abd3bf9167ff4deae7d9e1", "tree": "3701dcb74085676d356e05b92f201e2e6800860b", "parents": [ "9fd0a9a2342668fa12cf2b15bc83be907899b8a4" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Oct 18 17:49:32 2023 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Feb 07 17:03:56 2024 -0600" }, "message": "test: exercise DMA isolation for secure access to ns memory\n\nThis test helps to validate a scenario where a secure stream\nbelonging to Cactus SP accesses non-secure IPA space.\n\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\nChange-Id: I8085f2974d53b9cec9b3ae4a17fd328607b76e2b\n" }, { "commit": "fd35f0a4d6125bb1fa69a671a6d2d42628229609", "tree": "bf1c92d316299405b3751e62e904616f2f81e0a3", "parents": [ "69c9f363cb172788ef7e8d3fd711f56ddf481bf8", "e742ba89effefc4298fb4e406e0515a83db9c7e0" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Wed Feb 07 17:22:13 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 07 17:22:13 2024 +0100" }, "message": "Merge changes from topic \"ja/spm_rme\"\n\n* changes:\n refactor: cactus to handle expect exception\n test(memory share): memory contents checks\n refactor(spm): clean-up after failed memory share\n test(spm): lend/donate realm memory\n test(spm): use all constituents of memory share\n test(spm): validate GPC with memory sharing\n test(memory share): leverage rme for lend/donate\n" }, { "commit": "4984ea7561a8bc3daefb2971594e3ff59fa3177a", "tree": "1c2b20b14f9bf6a1b43bbee538bcaf852e3d3e8b", "parents": [ "8469257f30b94e749c339d193a2f680ef701b380", "e68494eb130e2c8021ca4af626a9cb1df8d67dbd" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Wed Feb 07 11:16:36 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Feb 07 11:16:36 2024 +0100" }, "message": "Merge changes Ic04c0dda,I350957ac,Idb838bd8\n\n* changes:\n test(realm): add testcase for REC exit due to Data/Instr abort\n fix(realm): fix realm destroy api\n test(realm): remove unwanted host_rmi_rtt_init_ripas\n" }, { "commit": "e742ba89effefc4298fb4e406e0515a83db9c7e0", "tree": "c3d9688ea07be06ac244e757faebdb1c76bb329b", "parents": [ "c2e32ed038aa54ae9c5d35362dc3c2fffc55fdb3" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 11 10:38:29 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "refactor: cactus to handle expect exception\n\nIn the test \u0027rl_memory_cannot_be_accessed_in_s\u0027, tftf\nshares memory to the SP that it changed to realm PAS.\n\nThe access from the SP should result in an exception.\nCactus receives an indication it should expect an\nexception on memory access via the arguments of the\n\u0027cactus_mem_send_cmd\u0027 request. This is used to avoid\nthe reads to check memory, which could return in an error\nresponse, which would make the test falsely fail.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ie220d4bab04c052a73e8b04c8667c9973b95a9e0\n" }, { "commit": "c2e32ed038aa54ae9c5d35362dc3c2fffc55fdb3", "tree": "449fb0a27b10806227d86762b9d27f53a8e35402", "parents": [ "b122eea5195b23c3e27fc8a28bc7dccf3623894a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Dec 04 13:22:44 2023 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(memory share): memory contents checks\n\nIn RME enabled systems, the memory is expected to be\nscrubbed on PAS updates from S to NS. As well, it is likely\nthat the memory addresses are shadowed, and the contents are not\nvisible accross updates from the different address spaces.\nAs such, the SP shall not rely on memory content to be\nin any form. FFA_MEM_LEND/FFA_MEM_DONATE are thus considered\nfor memory allocation purposes.\n\nThis patch changes the memory sharing tests, to cater\nfor the correct assumptions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I78ed47df789dda1d695e2e52b0df8c28b12658da\n" }, { "commit": "b122eea5195b23c3e27fc8a28bc7dccf3623894a", "tree": "e891429587f817ef4eae9329f5063466824bd886", "parents": [ "3be0efa1d92003476d89f448502927660d747b1a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Oct 11 16:59:46 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "refactor(spm): clean-up after failed memory share\n\nClean-up after failed memory share test, to allow for subsequent\ntests to still provide meaningful test results.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ic763fb64c0948c19e6b7d7f99119b20cc05fc83b\n" }, { "commit": "3be0efa1d92003476d89f448502927660d747b1a", "tree": "1822e848bd7dd29c2213d9955249686df23c8969", "parents": [ "72f002936b6978078674dd1ed69c622220c90196" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Oct 02 19:11:11 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): lend/donate realm memory\n\nValidate if memory gets delegated to a realm PAS, it can\u0027t be used\nin FF-A memory lend/donate from NS to SWd.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I16c9b7193b4ae8f56b1182e3b28d13a742bfcd4e\n" }, { "commit": "72f002936b6978078674dd1ed69c622220c90196", "tree": "8a4c1f8adead9f77e0703a8e4c421d7b309919d5", "parents": [ "8083db2a0878011f16c549c7546331f255aa4658" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Mon Jan 08 11:31:45 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): use all constituents of memory share\n\nOn memory sharing operation use all the constituents within the\ncomposite.\n\nExtended memory lend operation test to include multiple scattered\npages to make sure the update to security state is happening\nto all memory regions.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I2179df12ca63636bdb6489eea77e809422f95430\n" }, { "commit": "8083db2a0878011f16c549c7546331f255aa4658", "tree": "e9698ebfcb4185f174e05eaf57ff3721ceaf6074", "parents": [ "d39aa5b579411c1481efaf637ef44869831f7b7b" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jun 27 17:22:58 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(spm): validate GPC with memory sharing\n\nValidate during the lend/donate with the SWd, when RME\nis in the platform of test, if the NWd attempts to access\nthe memory it will trigger a fault due to Granule Protection\nChecks (GPC).\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: Ibab25e7e56abaa28ae077d8b8c2c7cd377ccf515\n" }, { "commit": "d39aa5b579411c1481efaf637ef44869831f7b7b", "tree": "bc3ed3c9b3ae43b5accb744060ac28d3f8907c0d", "parents": [ "8469257f30b94e749c339d193a2f680ef701b380" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed May 24 10:21:46 2023 +0100" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Feb 06 19:27:38 2024 +0000" }, "message": "test(memory share): leverage rme for lend/donate\n\nAdd the memory sharing test suite to invalid-access, and rename\nit to memory-access.\nIn such configuration the TF-A is meant to provide services\naccessible via SMC, to update the security state of the memory\nlent/donated between NWd to SWd.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4a6f2de612dbd9de2db757e3baf2613c47b8a09b\n" }, { "commit": "e68494eb130e2c8021ca4af626a9cb1df8d67dbd", "tree": "894c262fc0aa78dcbe3b28cc6b731df068a404b6", "parents": [ "daa6c795847b78692f522fd96f783a6d419aaec2" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Mon Nov 06 11:04:57 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "test(realm): add testcase for REC exit due to Data/Instr abort\n\nAdd testcase to cause instruction or data abort in Realm by\naccessing addr with\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dDESTROYED\n* HIPAS\u003dASSIGNED and RIPAS\u003dDESTROYED\n* HIPAS\u003dUNASSIGNED and RIPAS\u003dRAM\nVerify rec exit due to abort\n\nChange-Id: Ic04c0ddaf1b18ec0cfd71c28753c4ed7298302da\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "daa6c795847b78692f522fd96f783a6d419aaec2", "tree": "34ac7b861c0b9f264f21c1eeae2cdfc7cf8e52fd", "parents": [ "f33e3a6f851ef61d4271be6446278123bc6633a2" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Thu Jan 11 15:06:29 2024 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "fix(realm): fix realm destroy api\n\nAPI failed to destroy realms in new state,\nfix the assumption that no recs were created if realm is in new state\nDestroys all rec and realm properly.\n\nChange-Id: I350957acfa1ba1446a3028e6c277625ca76486b0\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "f33e3a6f851ef61d4271be6446278123bc6633a2", "tree": "206b6e67ebd432ff5383c8a8cabb14abb3536478", "parents": [ "bca7a3ab0f23de5b4c135eb21fa4b80209d86118" ], "author": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Fri Dec 22 13:52:37 2023 +0000" }, "committer": { "name": "Shruti Gupta", "email": "shruti.gupta@arm.com", "time": "Tue Feb 06 10:45:44 2024 +0100" }, "message": "test(realm): remove unwanted host_rmi_rtt_init_ripas\n\nRemove unwanted host_rmi_rtt_init_ripas\nfrom host_realm_map_protected_data API\n\nChange-Id: Idb838bd824ab663ded5d08ca08211e0116daa64d\nSigned-off-by: Shruti Gupta \u003cshruti.gupta@arm.com\u003e\n" }, { "commit": "7b51dbe9d4739f622f332fd232a3068b99c2bb50", "tree": "ec009a4479242e55a6a863d2dc6fb5b10966796b", "parents": [ "6eec0b422131e94e9c602e5560a432b36b97f703" ], "author": { "name": "mardyk01", "email": "mark.dykes@arm.com", "time": "Wed Jan 17 15:25:36 2024 -0600" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Fri Feb 02 13:50:12 2024 -0600" }, "message": "refactor(smc_fuzz): performance enhancement\n\nAdd the ability to return integer rather than string from fuzzer\nfunction. This will improve performance especially for larger fuzz\nbased testing. This will work in tandem with the changes to the CI where\nthe script flows provide additional support for the change. Modifications\nto the device tree files have been made to prevent name clashes with\nthe function names.\n\nChange-Id: I95aaf23c95943f944d5837e2a8440514aafd6dde\nSigned-off-by: mardyk01 \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "1abd0d2332d79ef7e2889d648cd093bb90e10bf3", "tree": "720447f478c9e5ae6b5c1720419fed5c63da4b73", "parents": [ "f3ea1a8a01aa7e6181677c7d94654891903de9e4" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Jan 17 11:31:57 2024 +0000" }, "committer": { "name": "Manish V Badarkhe", "email": "Manish.Badarkhe@arm.com", "time": "Wed Jan 31 19:18:57 2024 +0000" }, "message": "fix(spm): logs with errors in verbose builds\n\nFix few instances with verbose logs that contained\nbuild errors.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I08a2c23d831e5882939efce655c9c95485e2c9b9\n" }, { "commit": "0945e23153c06ed196756ac094c81ab8627d9a95", "tree": "7bc1e57bb77a4cf09cf18b75974e18e60711da53", "parents": [ "8f6b131f44bf5355d07b274f6a43490f968590b2", "16de81046dbffdfc19ca4a30524f170860eac178" ], "author": { "name": "Sandrine Bailleux", "email": "sandrine.bailleux@arm.com", "time": "Wed Jan 31 08:48:35 2024 +0100" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jan 31 08:48:35 2024 +0100" }, "message": "Merge \"test(fvp): Test trusted key certificate corruption\"" }, { "commit": "16de81046dbffdfc19ca4a30524f170860eac178", "tree": "d70655f6090cd2e8befdae3a8270682f19f551ba", "parents": [ "84ad6157a4e83834fa925b80534ca5414c368586" ], "author": { "name": "Jimmy Brisson", "email": "jimmy.brisson@arm.com", "time": "Fri Aug 18 08:50:30 2023 -0500" }, "committer": { "name": "Jimmy Brisson", "email": "jimmy.brisson@arm.com", "time": "Mon Jan 29 13:10:08 2024 -0600" }, "message": "test(fvp): Test trusted key certificate corruption\n\nThis also includes a test framework for use with corrupting the\nroot of trust private key certificate in the boot FIP, found\nusing its UUID.\n\nSigned-off-by: Jimmy Brisson \u003cjimmy.brisson@arm.com\u003e\nChange-Id: I988c517637edcf6fdcaf271628eb650781c276f8\n" }, { "commit": "6bb3a506bf2c94a959735d03e2dd9f1e377c8451", "tree": "eb268bbc5ec9569193c661f481a91a70f117ed3c", "parents": [ "0f49af50669fa3484df3166e7db8a28c70d06329" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Thu Oct 12 16:08:02 2023 +0200" }, "committer": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Jan 26 12:01:29 2024 +0100" }, "message": "refactor(spm): rename spm cpu_features to simd\n\ntest_spm_cpu_features.c is renamed test_spm_simd.c\ncactus_test_cpu_features.c is renamed cactus_test_simd.c\n\nSigned-off-by: Olivier Deprez \u003colivier.deprez@arm.com\u003e\nChange-Id: Icc2d7deada0ff335436cf36c7f2d2dfbf2a0d9a3\n" }, { "commit": "6dd65d85e079ae31478316051ac1568214491a82", "tree": "77ae85cddf2e6361df618f8fa8c370759383a674", "parents": [ "b744c9b49dc4af01e8af0a13b3c16d225cc05732" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 18 17:08:49 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jan 23 14:50:07 2024 +0000" }, "message": "test(memory share): enable hypervisor retrieve tests\n\nThe Hypervisor retrieve tests had been temporarily disabled,\nnow integration issues are expected to have been fixed.\nAs such, enable the tests.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I4a1f5a99a8b3259799280daf5d32702c16964e4d\n" }, { "commit": "b744c9b49dc4af01e8af0a13b3c16d225cc05732", "tree": "9c79638bb86409a8d440ff890f375558cc78c239", "parents": [ "f325331b86dd3f2ea31bbb20690b36538a8ead87" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 18 17:03:47 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jan 23 14:50:07 2024 +0000" }, "message": "feat(memory share): verify receivers\n\nAdded functions to validate the receivers list in the\nhypervisor retrieve request tests.\nLeverage them to validate receivers list.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I705f3ca9f0e540dce60f660ebf996f2462a51e3c\n" }, { "commit": "f325331b86dd3f2ea31bbb20690b36538a8ead87", "tree": "4237de4b195da4aab89edcacf6ed2f6667af2f82", "parents": [ "f0b3bd6c706da491eb589e0e8cbd3bc16a77113a" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Thu Jan 18 17:05:26 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Tue Jan 23 14:50:07 2024 +0000" }, "message": "fix(memory share): arguments used in retrieve tests\n\nFix a few small arguments that are used in the hypervisor\nretrieve request tests.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I9f6d2d10178331ffea6387a00c05002c07346bc6\n" }, { "commit": "a24f23a476578361aecd8a568191cc907c24240e", "tree": "b38806323ed4a33d91d27b0f18d563c1635f8f7c", "parents": [ "899dcedd9938549a19eb1a2ed474544c27f59520" ], "author": { "name": "Daniel Boulby", "email": "daniel.boulby@arm.com", "time": "Wed Nov 15 18:23:40 2023 +0000" }, "committer": { "name": "Daniel Boulby", "email": "daniel.boulby@arm.com", "time": "Mon Jan 22 18:49:54 2024 +0000" }, "message": "feat(ff-a): add impdef field to ffa_memory_access\n\nAdd impdef field to the endpoint memory access descriptor as\nintroduced by FF-A v1.2.\n\nSigned-off-by: Daniel Boulby \u003cdaniel.boulby@arm.com\u003e\nChange-Id: Ieb2808a5b4a8773cb4729c5aa10a6a0223ed8039\n" } ], "next": "b34fe10c8ea998f3a1d8d9a40ba0f52ab5e30670" }