)]}' { "log": [ { "commit": "7faf8caa04992a21ce0691c1fb41f4586462aa93", "tree": "110bc5550359aaccbf30a5d8fdbc14c8a2c2665b", "parents": [ "ed5bda84f7ca1098bde39cd0348fb8e86bffbff9" ], "author": { "name": "Madhav Bhatt", "email": "madhav.bhatt@amd.com", "time": "Mon Aug 25 04:59:09 2025 -0700" }, "committer": { "name": "Madhav Bhatt", "email": "madhav.bhatt@amd.com", "time": "Fri Sep 26 02:55:40 2025 -0700" }, "message": "feat(amd): add test for IOCTL EEMI API\n\nAdd a new test case for the IOCTL EEMI API within the TF-A test\nframework. The objective of this test is to verify the functionality\nand behavior of the IOCTL commands.\n\nTest cover following IOCTL IDs:\n- IOCTL_GET_RPU_OPER_MODE\n - To get the RPU operating mode like split or lockstep\n- IOCTL_SET_RPU_OPER_MODE\n - To set the RPU operating mode like split or lockstep\n\nThese IOCTL Ids require RPU to be enabled either as the default\nsubsystem or as a RPU subsytem.\n\nNote: This initial test does not cover all IOCTL IDs, as the purpose\nof the test is to validate the IOCTL EEMI API interface.\n\nChange-Id: I9c95facaab171af862ad633f7fdcab0b18b7f9e4\nSigned-off-by: Madhav Bhatt \u003cmadhav.bhatt@amd.com\u003e\n" }, { "commit": "ed5bda84f7ca1098bde39cd0348fb8e86bffbff9", "tree": "91ada1008018df3933281377a8697f4be3d03d2a", "parents": [ "00d869a0ada0724771e2056606db28a6c2885ea9" ], "author": { "name": "Madhav Bhatt", "email": "madhav.bhatt@amd.com", "time": "Mon Aug 25 04:01:16 2025 -0700" }, "committer": { "name": "Madhav Bhatt", "email": "madhav.bhatt@amd.com", "time": "Fri Sep 26 02:55:40 2025 -0700" }, "message": "feat(amd): add test for register notifier EEMI API\n\nAdd a test case to validate the register notification handling\nfunctionality of the EEMI API in the TF-A test framework. The test:\n\n- Registers a notifier using `test_register_notifier()`.\n- Waits for a notification within a predefined timeout.\n- If received, unregisters the notifier using\n `test_unregister_notifier()`.\n\nChange-Id: I4454ef8644851a2dedc0a224fa220062fed1d635\nSigned-off-by: Madhav Bhatt \u003cmadhav.bhatt@amd.com\u003e\n" }, { "commit": "00d869a0ada0724771e2056606db28a6c2885ea9", "tree": "1e886618edc7081dd3b1c2476e86e742ec633c02", "parents": [ "1dfffbafd2f71cda49f298c08fe8901c9af566f9" ], "author": { "name": "Madhav Bhatt", "email": "madhav.bhatt@amd.com", "time": "Mon Aug 25 06:17:34 2025 +0000" }, "committer": { "name": "Madhav Bhatt", "email": "madhav.bhatt@amd.com", "time": "Fri Sep 26 02:54:20 2025 -0700" }, "message": "feat(amd): add platform specific test cases\n\nAdd test cases in the TF-A test framework to validate the\nfunctionality of the EEMI APIs.\nAlso add client infrastructure to call PM APIs.\n\n-get_api_version\n-get_chipid\n-feature_check\n\nNote: As of now these changes are just for versal platform. We\u0027ll\nrefactor some of files in future to make it generic for all the\nplatforms.\n\nChange-Id: Id55de9eadaeaf96ccab4aaa1a494620108c25a19\nSigned-off-by: Madhav Bhatt \u003cmadhav.bhatt@amd.com\u003e\n" }, { "commit": "1dfffbafd2f71cda49f298c08fe8901c9af566f9", "tree": "f33516764de57dd4acc8d31c1516e3ef964ee70e", "parents": [ "d84996abcc2ba42292f223fe880d572b8cea58ef", "04315990a63abb68da3ea135c96b5b1390bf063f" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Wed Sep 17 11:23:15 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Sep 17 11:23:15 2025 +0000" }, "message": "Merge changes from topic \"hm/evlog\"\n\n* changes:\n build(measured-boot)!: move to ext event log lib\n feat(libtl): bump version to get event log funcs\n" }, { "commit": "d84996abcc2ba42292f223fe880d572b8cea58ef", "tree": "14c5d8d93a0a8fc2f5c169f83f8951f0e7b314d6", "parents": [ "c5eae3cf22ef0859ad81e56c9ce5314fa61f4752", "6e191237b069712f613e42592fd08fe326da1ffc" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Tue Sep 16 21:14:24 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Sep 16 21:14:24 2025 +0000" }, "message": "Merge \"fix(psci): skip PSCI OSI mode tests if not supported\"" }, { "commit": "c5eae3cf22ef0859ad81e56c9ce5314fa61f4752", "tree": "b9952ee03fbaaa9465a43f262ba9ddbff17ed5e6", "parents": [ "8bcaf3a5280d074fb53436c13f8ea386f77aae32", "2fb7522d68553139a45c418bbe74b376b10e8d78" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Tue Sep 16 20:58:16 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Sep 16 20:58:16 2025 +0000" }, "message": "Merge changes from topic \"rfa-related-fixes\"\n\n* changes:\n feat(psci): accept v1.2 and v1.3 PSCI versions\n fix: correct cntfrq_check log message\n" }, { "commit": "8bcaf3a5280d074fb53436c13f8ea386f77aae32", "tree": "070e85a6ed0ce94c01dbb34ef5533179663a06d7", "parents": [ "a4afb12510e4467390a5c2556e96ca71d257c421", "5bc1da5c4bd0c7dd6b5daa1764eb271503bd0ad7" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Tue Sep 16 14:23:02 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Sep 16 14:23:02 2025 +0000" }, "message": "Merge \"fix(smmuv3): use an SMMUv3TestEngine that can issue Secure accesses\"" }, { "commit": "5bc1da5c4bd0c7dd6b5daa1764eb271503bd0ad7", "tree": "614a84843c428efd6ac6facca2d6d691889f2aa6", "parents": [ "6a010a32ac092ff392c34b80179b21e8036731f4" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Sep 15 16:05:45 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Sep 16 14:18:48 2025 +0100" }, "message": "fix(smmuv3): use an SMMUv3TestEngine that can issue Secure accesses\n\nPCIe can only relay whether an access is NS or realm. So when Cactus\ninstructs the test engine to go talk to the SMMU pretending to be a\nSecure device we\u0027re relying on behaviour that shouldn\u0027t be possible.\n\nModels up to version 11.28 didn\u0027t check this so it would work despite\nbeing incorrect. At some point after this release, though, a check has\nbeen added making these accesses report failure (CMD reads\nENGINE_MIS_CFG when read back).\n\nThe fix is to not use a PCIe connected test engine. This can be done by\nusing a dma330x4 that can be converted to a test engine with\n`-C pci.dma330x4.use_smmuv3testengine_not_dmacs\u003d1`.\n\nThis now works on older and newer models.\n\nChange-Id: I76a8deef78c640c4958d0a94df19ac29d3759cc0\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "6e191237b069712f613e42592fd08fe326da1ffc", "tree": "09c86ecadefdc71659ffa4ab38ad5c52e9882505", "parents": [ "2fb7522d68553139a45c418bbe74b376b10e8d78" ], "author": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Wed Aug 06 16:28:57 2025 +0200" }, "committer": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Tue Sep 16 14:56:38 2025 +0200" }, "message": "fix(psci): skip PSCI OSI mode tests if not supported\n\nSkip the relevant tests if PSCI_FEATURES(CPU_SUSPEND) does not report\nthe OS initiated mode support.\n\nChange-Id: I28908cafa701f66709991f87f649955151c34568\nSigned-off-by: Imre Kis \u003cimre.kis@arm.com\u003e\n" }, { "commit": "2fb7522d68553139a45c418bbe74b376b10e8d78", "tree": "687c2b7fa3f9148809d14ac2d0bdf9c38238a5fe", "parents": [ "939c19ed3944643e4caf27c843f086aff1f071c6" ], "author": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Wed Aug 06 16:26:23 2025 +0200" }, "committer": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Tue Sep 16 14:56:38 2025 +0200" }, "message": "feat(psci): accept v1.2 and v1.3 PSCI versions\n\nAdd PSCI version 1.2 and 1.3 to the allowed version list.\n\nChange-Id: I84a3e46112397d4b75ff3a8614a0bfc5f2682f31\nSigned-off-by: Imre Kis \u003cimre.kis@arm.com\u003e\n" }, { "commit": "939c19ed3944643e4caf27c843f086aff1f071c6", "tree": "e0c8364021ecec6506d0c12be900c3d909d2e6e9", "parents": [ "a4afb12510e4467390a5c2556e96ca71d257c421" ], "author": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Wed Aug 06 16:24:24 2025 +0200" }, "committer": { "name": "Imre Kis", "email": "imre.kis@arm.com", "time": "Tue Sep 16 14:56:38 2025 +0200" }, "message": "fix: correct cntfrq_check log message\n\nFix new line character at the end of the log message in cntfrq_check.\n\nChange-Id: Id58ad9e18a7825d54797eea01d1ed5cdb68c3fa3\nSigned-off-by: Imre Kis \u003cimre.kis@arm.com\u003e\n" }, { "commit": "04315990a63abb68da3ea135c96b5b1390bf063f", "tree": "48d235d6d7cc4f6af7e5d27894dadccbb94649d8", "parents": [ "95a7af102c04cc9cea69fd7b0e6297b63064853a" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Aug 26 13:55:51 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Sep 16 11:38:33 2025 +0000" }, "message": "build(measured-boot)!: move to ext event log lib\n\nRemoves in-tree Event Log library implementation and updates all\nreferences to use the external submodule. Updates include paths,\nMakefile macros, and platform integration logic to link with lib as a\nstatic library. Some of the event log utilities related to firmware\nhandoff have been moved into that library, accordingly bump the version\nof LibTL.\n\nIf you cloned TFTF without the `--recurse-submodules` flag, you can\nensure that this submodule is present by running:\n\n git submodule update --init --recursive\n\nBREAKING-CHANGE: LibEventLog is now included in TFTF as a submodule.\n Please run `git submodule update --init --recursive` if you encounter\n issues after migrating to the latest version of TFTF.\n\nChange-Id: I5c681ab7621c8bcdfc06793a81781af3439964a6\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "95a7af102c04cc9cea69fd7b0e6297b63064853a", "tree": "28a5c49ae404720de4dca11b7f57be13be375057", "parents": [ "6a010a32ac092ff392c34b80179b21e8036731f4" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu Aug 28 13:02:44 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Sep 16 11:37:42 2025 +0000" }, "message": "feat(libtl): bump version to get event log funcs\n\nLibTL now provides APIs for handling event logs from a transfer list.\nBump to that version and get rid of existing functions that duplicate\nthat behaviour.\n\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\nChange-Id: I4967144657765741b390cf6cda56e08a2da0eadf\n" }, { "commit": "a4afb12510e4467390a5c2556e96ca71d257c421", "tree": "952fa1238d51e9b91f607ab556d24dfe39742575", "parents": [ "6a010a32ac092ff392c34b80179b21e8036731f4", "9eacfa1b5a4bc77e8752a6d8620ba33df5f796c2" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Mon Sep 15 17:02:16 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Sep 15 17:02:16 2025 +0000" }, "message": "Merge \"refactor: print error codes and func ID\"" }, { "commit": "6a010a32ac092ff392c34b80179b21e8036731f4", "tree": "dd6f31da6a94933db431d633e815002c92bbe08c", "parents": [ "2338ffcc695072c9ba1883b40473b1bb358a967f", "31f6f653bbc0eb6f2df84eb1fdb4574170bfba16" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Sep 15 12:07:44 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Sep 15 12:07:44 2025 +0000" }, "message": "Merge changes from topic \"rmm-planes\"\n\n* changes:\n fix(rme): RMM is not taking PSTATE into account on PN entry/exit\n feat(rme): update tests to alp14\n feat(rme): uplift RSI_SYSREG_READ/WRITE tests to alp13\n" }, { "commit": "2338ffcc695072c9ba1883b40473b1bb358a967f", "tree": "d78c15ef224e15b121a728b672f36cf564f51e1e", "parents": [ "79aff977ca65c6344d1c04ac3391afd001845863", "046835b1fd180406994374ac868423de7f4ff8c0" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Sep 15 08:59:18 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Sep 15 08:59:18 2025 +0000" }, "message": "Merge \"fix(ff-a): ivy shim receives NPI feature\"" }, { "commit": "31f6f653bbc0eb6f2df84eb1fdb4574170bfba16", "tree": "0f58b61fa0d5a182ce062c876d70f8f385051b97", "parents": [ "049b469008f0901d9aa75444f10f1c5bc195cc78" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Tue Aug 05 18:20:55 2025 +0100" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Fri Sep 12 17:58:28 2025 +0100" }, "message": "fix(rme): RMM is not taking PSTATE into account on PN entry/exit\n\nPlane 0 is notified, through RsiPlaneExit.pstate field of RMM PSTATE\nupon plane N exit. Also, plane 0 needs to provide RMM PSTATE value upon\ncalling RsiPlaneEnter through RsiPlaneEnter.pstate value.\n\nThis patch implements that behavior on the existing tests for planes\nas it was not implemented before.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I45af6c5863af2d2b7cc92005e16b80b895639f07\n" }, { "commit": "79aff977ca65c6344d1c04ac3391afd001845863", "tree": "5a0615fd0d4c03e2130c41b59cecb37bdba2ae66", "parents": [ "0b9f575377a7bdfdb1319eb2af60cbb668b127aa", "c609e4b7a08c3e32b10e0bac1e14201520ed99dc" ], "author": { "name": "Manish V Badarkhe", "email": "manish.badarkhe@arm.com", "time": "Fri Sep 12 12:35:36 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Sep 12 12:35:36 2025 +0000" }, "message": "Merge \"test: FFA_ABORT ABI not supported at Nwd interface\"" }, { "commit": "9eacfa1b5a4bc77e8752a6d8620ba33df5f796c2", "tree": "01b50fb0fe98fd3a4f57117fcafcc14cf6f39c8e", "parents": [ "0b9f575377a7bdfdb1319eb2af60cbb668b127aa" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Jan 10 11:56:58 2025 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Sep 12 12:31:23 2025 +0100" }, "message": "refactor: print error codes and func ID\n\nFunction helpers from the spm_common.c have been refactored,\nto print the FF-A func and error names.\n\nThis changes adds the respective hex integer return to the\nlogs as well.\n\nUseful when the *_name functions print \"unknown\".\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I375a1e09820e1d4c9fc1a37f8f3626d39a4b62ae\n" }, { "commit": "046835b1fd180406994374ac868423de7f4ff8c0", "tree": "510193ca3b027980ead5f461a0856a5073a66342", "parents": [ "0b9f575377a7bdfdb1319eb2af60cbb668b127aa" ], "author": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Wed Oct 30 14:35:56 2024 +0000" }, "committer": { "name": "J-Alves", "email": "joao.alves@arm.com", "time": "Fri Sep 12 12:12:48 2025 +0100" }, "message": "fix(ff-a): ivy shim receives NPI feature\n\nIvy can be deployed with shim and without.\nWith shim the partition is loaded as S-EL1\npartition. Which means the NPI feature via\nFFA_FEATURES ABI should be reported.\n\nThis patch handles the shim being present or\nnot in the respective test.\n\nSigned-off-by: J-Alves \u003cjoao.alves@arm.com\u003e\nChange-Id: I1de94c77928e60164949f4801db1e82058eb89ad\n" }, { "commit": "0b9f575377a7bdfdb1319eb2af60cbb668b127aa", "tree": "9d4bda7de5f2c1640670949c0aa8fb382bc31fee", "parents": [ "63ea05bd16fceb7048ee625cae12394a3be5f15b", "794b0ac8cdb01aa8c5ad630d4592b3743f6782cd" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Sep 10 13:43:57 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Sep 10 13:43:57 2025 +0000" }, "message": "Merge changes from topic \"bk/gicv5_full\"\n\n* changes:\n refactor(gic): unify SGI exception data\n fix(gic): don\u0027t access a GIC register if it\u0027s not supported\n refactor(gic): add a is_feat_gic_supported() standard helper\n refactor(gic): make the GIC driver generic\n refactor(gic): prepare for a new GIC revision\n" }, { "commit": "049b469008f0901d9aa75444f10f1c5bc195cc78", "tree": "e564191843668b2c2f96f9fb71b31885884af317", "parents": [ "4a9ffd52277103082ea78d7873e5f5732ed6fdcc" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Mon Jun 02 20:01:02 2025 +0100" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Wed Sep 10 13:19:20 2025 +0100" }, "message": "feat(rme): update tests to alp14\n\nRMI_RTT_AUX_{MAP, UNMAP}_UNPROTECTED have been modified on alp14.\nThis patch updates the RME tests to align with the new spec.\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: Icefb26de4fb66b1199a19d99496fa800f6abc2bc\n" }, { "commit": "4a9ffd52277103082ea78d7873e5f5732ed6fdcc", "tree": "7465ab700d8557cd0027ccbfce37a9637ed1bcf8", "parents": [ "63ea05bd16fceb7048ee625cae12394a3be5f15b" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu May 22 14:45:48 2025 +0100" }, "committer": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Wed Sep 10 13:18:57 2025 +0100" }, "message": "feat(rme): uplift RSI_SYSREG_READ/WRITE tests to alp13\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: Ia06872776d06655e0c0ceb6a48fca0e5aefac0b8\n" }, { "commit": "c609e4b7a08c3e32b10e0bac1e14201520ed99dc", "tree": "3c1470e09f20fbbdf3f4df56420d04347f25d315", "parents": [ "63ea05bd16fceb7048ee625cae12394a3be5f15b" ], "author": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Wed Aug 20 22:00:22 2025 -0500" }, "committer": { "name": "Madhukar Pappireddy", "email": "madhukar.pappireddy@arm.com", "time": "Tue Sep 09 14:03:20 2025 -0500" }, "message": "test: FFA_ABORT ABI not supported at Nwd interface\n\nFFA_ABORT is supported only at secure FF-A interfaces. It is not\nexposed to NWd callers.\n\nThis patch enhances an existing test to ensure FFA_ABORT ABIs are\nnot supported when invoked in normal world.\n\nChange-Id: I2bfd2abd8db182aad4d9491b210b384e79059291\nSigned-off-by: Madhukar Pappireddy \u003cmadhukar.pappireddy@arm.com\u003e\n" }, { "commit": "794b0ac8cdb01aa8c5ad630d4592b3743f6782cd", "tree": "9d4bda7de5f2c1640670949c0aa8fb382bc31fee", "parents": [ "aa48358ef9270417897780230bdedb635cc4af56" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Fri Jun 20 13:13:29 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Sep 09 06:37:05 2025 +0100" }, "message": "refactor(gic): unify SGI exception data\n\nThe information we pass to exception handlers for SGIs, PPIs, and SPIs\ndoes not differer materially. Unify the handling to use the same types.\n\nSince SGIs are normal IRQs, we can put the last remaining function in\nirq.h to simplify a bit.\n\nChange-Id: I1cf6f8a2a832797a9ce54eeb025a94120f115cf6\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "aa48358ef9270417897780230bdedb635cc4af56", "tree": "e5b990082edda1abc4e2f50903865f1c899f6516", "parents": [ "5f2468444daafa55f72a976c856d7f941a83ca51" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Fri Jun 20 09:07:44 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Sep 09 06:37:05 2025 +0100" }, "message": "fix(gic): don\u0027t access a GIC register if it\u0027s not supported\n\nOn non-gicv3 systems, this register will not be present. However, the\ncheck for gicv3 wil be after, resulting in an error.\n\nChange-Id: I6077289eb848bd3194660f975baeca5141b14e1f\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "5f2468444daafa55f72a976c856d7f941a83ca51", "tree": "89d59590ff79f1bb8ab1b7924c47611cb1fbd245", "parents": [ "44de1232dca506a997adef7eae08b2570892262b" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Jun 16 11:42:30 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Sep 09 06:37:04 2025 +0100" }, "message": "refactor(gic): add a is_feat_gic_supported() standard helper\n\nFEAT_GIC is a CPU feature like any other, add an arch_features.h helper\nfor it.\n\nChange-Id: I762b6333907f5f3dd3352544c1f2fb211a794b3e\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "44de1232dca506a997adef7eae08b2570892262b", "tree": "b84d79c1da2802ddb131ce33953e36918140e0f2", "parents": [ "a4b3334f21fb994e96549bfc968fa0086c3f9d77" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Thu Jul 31 09:43:33 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Sep 09 06:36:24 2025 +0100" }, "message": "refactor(gic): make the GIC driver generic\n\nEvery currently supported tftf has some variety of GIC that can work\nwith the main GIC driver. So there\u0027s no need to have each platform\nspecify that as part of their build.\n\nChange-Id: Ic771aad82e8f423042bcf3bf1d3b70cba6236666\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "a4b3334f21fb994e96549bfc968fa0086c3f9d77", "tree": "f4871f7a364074a59e8496102f3f8d56bfd29500", "parents": [ "63ea05bd16fceb7048ee625cae12394a3be5f15b" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Thu Jun 19 16:24:29 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Sep 09 06:36:24 2025 +0100" }, "message": "refactor(gic): prepare for a new GIC revision\n\nThe top level interrupt functions that common code calls are generic\nenough to become tftf\u0027s interrupt API, so rename the file to better\nreflect this. Conversely, gic_common.c is quite specific to GICv2 and\nGICv3 so also rename it to reflect this.\n\nChange-Id: I7becd74fae526a3bc5a9ef9501f0db75b1b086fb\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "63ea05bd16fceb7048ee625cae12394a3be5f15b", "tree": "7e3d3afdc53a005d65d27093751447c011eb61d3", "parents": [ "0861d8310fe65168754d544a63c3fe2ef2f87211", "9b1afa7fdeaa7a57900c3aa606626a9c9bf9e405" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Tue Sep 02 18:27:21 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Sep 02 18:27:21 2025 +0000" }, "message": "Merge \"feat(mpam): test FEAT_MPAM_PE_BW_CTRL register access\"" }, { "commit": "0861d8310fe65168754d544a63c3fe2ef2f87211", "tree": "c2ddf1e56f45c0e04d2e675da8c8fbd4a4be95db", "parents": [ "38ce1c141611704cc4750f48264c9e5e45a2843e", "456cf6efad5133c8591a4aaade4d27c4ea1ef0f8" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Mon Sep 01 09:56:45 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Sep 01 09:56:45 2025 +0000" }, "message": "Merge \"fix(arm): increase reserved DRAM1 mem for NS images\"" }, { "commit": "9b1afa7fdeaa7a57900c3aa606626a9c9bf9e405", "tree": "b63bf8e845ab5ff2bc70f711e4ef19b012ccca01", "parents": [ "e0b75ac177b9b3e7d703948387f429a665615c23" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Fri Aug 15 10:58:13 2025 -0500" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Fri Aug 29 11:24:36 2025 -0500" }, "message": "feat(mpam): test FEAT_MPAM_PE_BW_CTRL register access\n\nThis patch introduces FEAT_MPAM_PE_BW_CTRL testing to cpu feats.\nWe check the presence of registers MPAMBW2_EL2, MPAMBW1_EL1\nand MPAMBWIDR_EL1 to verify FEAT_MPAM_PE_BW_CTRL\nis supported.\n\nChange-Id: I5f89402e8aa0ce3320f3e120f4c0c9dbed6f8c5f\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "38ce1c141611704cc4750f48264c9e5e45a2843e", "tree": "b9e5a14832ace79b0a5933319b25c6d55bb996fe", "parents": [ "e0b75ac177b9b3e7d703948387f429a665615c23", "9febbcba491a1a0745e567a4cea7bfda8a4b606d" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Aug 29 11:30:56 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Aug 29 11:30:56 2025 +0000" }, "message": "Merge \"test: exclude Boot requirement tests for Corstone-1000\"" }, { "commit": "9febbcba491a1a0745e567a4cea7bfda8a4b606d", "tree": "f4c516be0b1b97bd53ad2ab9807ffcd177c1b771", "parents": [ "1bc61da619b0b375459ae221bd13bb25dcbf0bc2" ], "author": { "name": "Christophe Thiblot", "email": "christophe.thiblot@arm.com", "time": "Thu Jul 17 09:34:31 2025 +0000" }, "committer": { "name": "Christophe Thiblot", "email": "christophe.thiblot@arm.com", "time": "Fri Aug 29 07:39:25 2025 +0000" }, "message": "test: exclude Boot requirement tests for Corstone-1000\n\nA test compares the value of the Generic Timer register CNTFRQ visible\nin two frames CNTBaseN and CNTCTLBase that are linked in Armv8-A and\nreflect the same value.\n\nAn issue in Corstone-1000 (errata 2142118) makes the CNTFRQ views\ninconsistents and the test failing. There is no workaround and then\nthe test is skipped.\n\nErrata: https://developer.arm.com/documentation/sden2142076/0002/?lang\u003den\nChange-Id: Id15011d37e3221c57f29f337365522fe23a3eb7e\nSigned-off-by: Christophe Thiblot \u003cchristophe.thiblot@arm.com\u003e\n" }, { "commit": "456cf6efad5133c8591a4aaade4d27c4ea1ef0f8", "tree": "a3efb70e761622c57083f20156525a64222bea2c", "parents": [ "e0b75ac177b9b3e7d703948387f429a665615c23" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Fri Feb 28 15:48:04 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu Aug 28 16:56:35 2025 +0000" }, "message": "fix(arm): increase reserved DRAM1 mem for NS images\n\nDefconfig kernels are now approaching 50MB, making the previous 64MB\nallocation for both the kernel and initrd insufficient. To accommodate\nthis growth, the reserved NS memory has been increased to 128MB in TF-A\n[1]. Adjust the expected ranges in TFTF accordingly.\n\n[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35851\n\nChange-Id: I5ae4d63d75300bb85817d7947c092550a0e57faf\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "e0b75ac177b9b3e7d703948387f429a665615c23", "tree": "56b3830820758d600ddb6d138590c4c6aeb60ee4", "parents": [ "57d732db12899ae922f96c101732c27c5b0c31ef", "f41d8eeb88a4759bd463ccbb2e5eac3e6ee7eb2c" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Aug 20 20:22:12 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Aug 20 20:22:12 2025 +0000" }, "message": "Merge changes I2d4d3109,Idecec5bc\n\n* changes:\n test(fuzzing): adding variable coverage\n fix(fuzzing): resolve fuzz build issue\n" }, { "commit": "f41d8eeb88a4759bd463ccbb2e5eac3e6ee7eb2c", "tree": "56b3830820758d600ddb6d138590c4c6aeb60ee4", "parents": [ "735050f270024e5443f1e9bf45e98a4d3954c9d5" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Thu Jul 10 16:41:28 2025 -0500" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Wed Aug 20 20:01:47 2025 +0000" }, "message": "test(fuzzing): adding variable coverage\n\nAdding the capability to produce coverage of the arguments of the\nSMC calls as generated by the fuzzer. The output from the FVP will\nbe routed to UART3 where a python flow will read the data to create\ntables of each SMC call with its fields shown and values given. The\noption is enabled by adding SMC_FUZZ_VARIABLE_COVERAGE\u003d1 to the\ncorresponding TFTF config.\n\nChange-Id: I2d4d310976aa2c0447efbd8ec0676bb9f8699828\nSigned-off-by: Mark Dykes \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "735050f270024e5443f1e9bf45e98a4d3954c9d5", "tree": "ecbb4e99cff480cb1adabb7ff17f64387ff636a5", "parents": [ "57d732db12899ae922f96c101732c27c5b0c31ef" ], "author": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Wed Jul 23 15:52:40 2025 -0500" }, "committer": { "name": "Mark Dykes", "email": "mark.dykes@arm.com", "time": "Wed Aug 20 20:01:18 2025 +0000" }, "message": "fix(fuzzing): resolve fuzz build issue\n\nFix an issue where we see compile fails in both CI and local\nruns due to compile fails of the bias device tree order relative\nto tftf binary.\n\nChange-Id: Idecec5bc228a8181f3d6be6a9c2fb778341292bf\nSigned-off-by: Mark Dykes \u003cmark.dykes@arm.com\u003e\n" }, { "commit": "57d732db12899ae922f96c101732c27c5b0c31ef", "tree": "5b6d07c16c88a6236624b574e2ccde238d7b0d57", "parents": [ "5cbf1492282685e1cc5e0d2154c3fc48458a3e91", "c5d4409d2dbea27291c043dc48ef0d8b4513a428" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Aug 14 16:08:57 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Aug 14 16:08:57 2025 +0000" }, "message": "Merge \"feat(realm): add tests for min, max and default MECID\"" }, { "commit": "c5d4409d2dbea27291c043dc48ef0d8b4513a428", "tree": "5b6d07c16c88a6236624b574e2ccde238d7b0d57", "parents": [ "5cbf1492282685e1cc5e0d2154c3fc48458a3e91" ], "author": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Thu Jul 24 19:44:09 2025 -0500" }, "committer": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Wed Aug 13 18:25:50 2025 -0500" }, "message": "feat(realm): add tests for min, max and default MECID\n\nThis patch introduces two tests. Each one assigns the minimum and\nmaximum MECID to a newly created Realm respectively. In addition\na third test assigns the default MECID (0) to two realms to test\nthe shared state of this MECID by default.\n\nSigned-off-by: Juan Pablo Conde \u003cjuanpablo.conde@arm.com\u003e\nChange-Id: I0498084f9c808b6d4db16a939495635c394b2ff3\n" }, { "commit": "5cbf1492282685e1cc5e0d2154c3fc48458a3e91", "tree": "999a63f4388deff1c033cd9253ff2ca0ca3addc6", "parents": [ "2a93d283f113d3971d2247090f8235c3c1d722ac", "5d7869ffd342e999e946dfd191bf90ab29c1461f" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Aug 11 16:58:34 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Aug 11 16:58:34 2025 +0000" }, "message": "Merge changes I02b70986,I9de84f1b,I89bf0801\n\n* changes:\n feat(realm): Remove hardcoded MECID\n feat(realm): add tests for FEAT_MEC\n feat(realm): assign MECID when creating realms\n" }, { "commit": "5d7869ffd342e999e946dfd191bf90ab29c1461f", "tree": "6026aedac90e5fa9a8b6f4e4c6447b2373bedb73", "parents": [ "7288f9283f5fe302dcbf8eb67d49fc6e5df46639" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jul 21 00:02:52 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Aug 11 17:26:43 2025 +0100" }, "message": "feat(realm): Remove hardcoded MECID\n\nThis patch removes the hardcoded fixed MECID with a number which\nis continually incremented based on MAX_MECID support.\n\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\nChange-Id: I02b70986d7eef58248abd9c8db0eda20ea32eda0\n" }, { "commit": "7288f9283f5fe302dcbf8eb67d49fc6e5df46639", "tree": "e9ef1cb5906cf887c71cf75826e2a3986d7c915d", "parents": [ "dc23fcdec28d9c315c741710aba76c2145b73e91" ], "author": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Wed May 07 14:42:50 2025 -0500" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Aug 11 17:26:26 2025 +0100" }, "message": "feat(realm): add tests for FEAT_MEC\n\nThis patch creates two test in order to verify the correct\nassignment of MECIDs to realms.\n\nSigned-off-by: Juan Pablo Conde \u003cjuanpablo.conde@arm.com\u003e\nChange-Id: I9de84f1ba8a8b42e55b1ea163f90e9daf56c74c9\n" }, { "commit": "dc23fcdec28d9c315c741710aba76c2145b73e91", "tree": "e54af256a0e4ef90b75f627ac6fe2217d6c1bb0b", "parents": [ "1bc61da619b0b375459ae221bd13bb25dcbf0bc2" ], "author": { "name": "Juan Pablo Conde", "email": "juanpablo.conde@arm.com", "time": "Sat Apr 05 14:26:13 2025 -0500" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Aug 11 16:22:35 2025 +0000" }, "message": "feat(realm): assign MECID when creating realms\n\nThis change allows TFTF to assign a MECID to every realm that is\ncreated by passing an extra parameter to the Realm creation helpers.\n\nSigned-off-by: Juan Pablo Conde \u003cjuanpablo.conde@arm.com\u003e\nChange-Id: I89bf08011eb005d949a195b406b073955f23f5ad\n" }, { "commit": "2a93d283f113d3971d2247090f8235c3c1d722ac", "tree": "c708d48da4514c485460f8f050f31964adae3991", "parents": [ "27c44fd790d7fcfd9233c3d556a474d8c075755b", "7066428566e6a9d2ac061ca5f62df7d09d69141a" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Aug 07 21:37:31 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Aug 07 21:37:31 2025 +0000" }, "message": "Merge \"fix: resolve static-check issues in smccc_arch_soc_id test\"" }, { "commit": "7066428566e6a9d2ac061ca5f62df7d09d69141a", "tree": "c708d48da4514c485460f8f050f31964adae3991", "parents": [ "27c44fd790d7fcfd9233c3d556a474d8c075755b" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Aug 07 15:36:07 2025 -0500" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Thu Aug 07 16:12:50 2025 -0500" }, "message": "fix: resolve static-check issues in smccc_arch_soc_id test\n\nChange-Id: I841c5fdafaaf1ec8a00dfa972fbbfd1d44a843ba\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "27c44fd790d7fcfd9233c3d556a474d8c075755b", "tree": "b502aa88001e08da3679ddba09b4f21d205808e7", "parents": [ "09be3d823129debdd9b7d1e6ea1055bafbbd1f65", "6aa41d0f5dd7487a99bbbaaa78020ab622504a5e" ], "author": { "name": "Chris Kay", "email": "chris.kay@arm.com", "time": "Thu Aug 07 16:08:23 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Aug 07 16:08:23 2025 +0000" }, "message": "Merge \"feat: move el3_payload to the build directory\"" }, { "commit": "09be3d823129debdd9b7d1e6ea1055bafbbd1f65", "tree": "e2ea2b965b00fcad192ac08d2e416468b1a6e319", "parents": [ "0929cd7bea7ab7f8dcef755cd9df5fad86320fbc", "d8e55e736799329d42caa2ec1453fd479ee1388f" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Fri Aug 01 17:13:00 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Aug 01 17:13:00 2025 +0000" }, "message": "Merge \"feat(fvp): change ARM_SECURE_SERVICE_BUFFER_BASE\"" }, { "commit": "d8e55e736799329d42caa2ec1453fd479ee1388f", "tree": "e2ea2b965b00fcad192ac08d2e416468b1a6e319", "parents": [ "0929cd7bea7ab7f8dcef755cd9df5fad86320fbc" ], "author": { "name": "Yeoreum Yun", "email": "yeoreum.yun@arm.com", "time": "Tue Jul 08 12:19:06 2025 +0100" }, "committer": { "name": "Yeoreum Yun", "email": "yeoreum.yun@arm.com", "time": "Fri Aug 01 12:37:04 2025 +0100" }, "message": "feat(fvp): change ARM_SECURE_SERVICE_BUFFER_BASE\n\nAs NS buffer is moved to NS_DRAM1 area [0],\nChange ARM_SECURE_SERVICE_BUFFER_BASE.\n\nLink: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/40336 [0]\nSigned-off-by: Yeoreum Yun \u003cyeoreum.yun@arm.com\u003e\nChange-Id: Ic348305dcbcfa506e973952676b53136755aed5f\n" }, { "commit": "6aa41d0f5dd7487a99bbbaaa78020ab622504a5e", "tree": "1161c98c72c5f28f682d3d129b5d630c8124054f", "parents": [ "0929cd7bea7ab7f8dcef755cd9df5fad86320fbc" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Mar 03 16:40:35 2025 +0000" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Wed Jul 30 10:12:44 2025 +0100" }, "message": "feat: move el3_payload to the build directory\n\nSimilar to tf-a\u0027s fiptool, el3_payload should be built in the build\ndirectory so that many tftf builds can run at the same time. Currently,\nonly the output is stashed, however that still produces conflicts. This in\nturns allows for running many CI jobs in parallel.\n\nChange-Id: Ice73ec96c6a9497684408e2c01ceee2f99479ea9\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "0929cd7bea7ab7f8dcef755cd9df5fad86320fbc", "tree": "4e276403352e3549e0b346a6b5c7ae3a7c4f08f2", "parents": [ "5431ac521fcedb2993160a622fa0303a620b09d0", "bdb61f3c2c4de04b71d5c9b05794c3c6c4e0a14d" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Tue Jul 29 18:33:23 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Tue Jul 29 18:33:23 2025 +0000" }, "message": "Merge \"test(smccc): add SoC Name test support to SMCCC_ARCH_SOC_ID\"" }, { "commit": "bdb61f3c2c4de04b71d5c9b05794c3c6c4e0a14d", "tree": "4e276403352e3549e0b346a6b5c7ae3a7c4f08f2", "parents": [ "5431ac521fcedb2993160a622fa0303a620b09d0" ], "author": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Wed Jul 16 16:16:26 2025 -0500" }, "committer": { "name": "Arvind Ram Prakash", "email": "arvind.ramprakash@arm.com", "time": "Fri Jul 25 14:04:31 2025 -0500" }, "message": "test(smccc): add SoC Name test support to SMCCC_ARCH_SOC_ID\n\nThis patch tests the SoC Name functionality of SMCCC_ARCH_SOC_ID\nas part of SMCCC 1.6 update.\n\nReference: https://developer.arm.com/documentation/den0028/latest/\n\nChange-Id: Ic3be2bdf4e7268b28d392c338533f0603f0716e8\nSigned-off-by: Arvind Ram Prakash \u003carvind.ramprakash@arm.com\u003e\n" }, { "commit": "5431ac521fcedb2993160a622fa0303a620b09d0", "tree": "026f5f9c73de64dbed56ed1ad85a0feb39dc6e2a", "parents": [ "1bc61da619b0b375459ae221bd13bb25dcbf0bc2", "8f175150b982930774b4bc5bf18c39afc00f7fdb" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Jul 23 08:56:34 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 23 08:56:34 2025 +0000" }, "message": "Merge changes I5af96887,Ia4f546a0,I90b2b748,I958595b9,I6c01b187\n\n* changes:\n fix(ls64): match types when printing\n fix(sme): update smcr_el2 after hcr_el2 has taken effect\n perf(tftf): reduce the IRQ validation wait\n perf(tftf): don\u0027t use waitms() for events testing\n chore(commitlint): tell editors commit line lengths are 72 characters\n" }, { "commit": "8f175150b982930774b4bc5bf18c39afc00f7fdb", "tree": "026f5f9c73de64dbed56ed1ad85a0feb39dc6e2a", "parents": [ "aa22f41c438313fe23d42656c1dff8ca56d77524" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Jun 23 16:18:03 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Jul 22 10:24:31 2025 +0100" }, "message": "fix(ls64): match types when printing\n\nWhen building with verbose printing, the types don\u0027t match up and the\nbuild fails. Match them up.\n\nChange-Id: I5af968872f4e707c206c4770c0000e14508a4611\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "aa22f41c438313fe23d42656c1dff8ca56d77524", "tree": "a50ccb99f9389255d0dc158df40e5a0ace067451", "parents": [ "32815d30b1d4b2126cdff5ef9908446e1880d44e" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Wed May 21 13:25:40 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Tue Jul 22 10:22:52 2025 +0100" }, "message": "fix(sme): update smcr_el2 after hcr_el2 has taken effect\n\nIf HCR_EL2.E2H resets to 1 and its write to 0 is delayed by the lack of\nisb, then the SMCR_EL2 access will trap as CPTR_EL2.SMEN will dictate\nthe trapping behaviour and we leave it at 0.\n\nWrite hcr_el2 with the other registers so there\u0027s an isb between its\nwrite and the access to smcr_el2.\n\nChange-Id: Ia4f546a070d7f9d5e3cd330979e6587606fffcdf\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "32815d30b1d4b2126cdff5ef9908446e1880d44e", "tree": "444daec706ad840760bcd8bac23c2e286a3b79c2", "parents": [ "c229e235e317da7f13110563b30891871c2d0e91" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Jun 23 09:21:54 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Fri Jul 18 16:49:14 2025 +0100" }, "message": "perf(tftf): reduce the IRQ validation wait\n\nThe IRQ validation test waits for half a second before checking that an\ninterrupt happened and it wasn\u0027t handled. This is an eternity for any\nreasonable system and waiting that long isn\u0027t necessary. Reduce the wait\nso that testing is quicker.\n\nChange-Id: I90b2b74815815bac4272df992725a8311c6f373d\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "c229e235e317da7f13110563b30891871c2d0e91", "tree": "a16b04cb0ad70a3bc159164e4127dfdd6be5be8b", "parents": [ "d03eb8b988d90d0f62817b5ddbe584e0f9140558" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Mon Jun 23 08:45:33 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Fri Jul 18 16:49:13 2025 +0100" }, "message": "perf(tftf): don\u0027t use waitms() for events testing\n\nWaiting for wall time on FVP takes longer than the desired time. As a\nresult this test takes a seemingly very long (over 30 seconds!) and is\nsometimes indistinguishable from hanging. Additionally, it is a tftf\nself test so the chances of it ever going wrong are practically zero.\n\nDecouple the test from time and use more primitive synchronisation to\nmaintain the same function. Since the primary waits for all secondaries\nto enter the test, we can be fairly certain that at least one has\nproceeded a little further and is waiting for an event by the time the\nprimary has caught up and we don\u0027t need the delay. Then the other\ndelays can be removed by having the secondaries wait on non-event API\nevent before waiting on the event.\n\nChange-Id: I958595b93030596633bbd08b2369ecdffe34d6d3\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "d03eb8b988d90d0f62817b5ddbe584e0f9140558", "tree": "90775c803f0b813c547ab599532a34bd27b6f8d8", "parents": [ "1bc61da619b0b375459ae221bd13bb25dcbf0bc2" ], "author": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Thu Jun 26 14:51:11 2025 +0100" }, "committer": { "name": "Boyan Karatotev", "email": "boyan.karatotev@arm.com", "time": "Thu Jul 17 07:16:56 2025 +0100" }, "message": "chore(commitlint): tell editors commit line lengths are 72 characters\n\nThe repository obeys an 100 character soft limit for source lines.\nHowever, commit messages generally have lines shorter than 72 characters\nto make gerrit print them without wrapping.\n\nAnnoyingly, the editorconfig can\u0027t express this and the 100 character\nlimit applies to commit messages, requiring manual formatting. Luckily,\nwhen writing commit messages the file `.git/COMMIT_EDITMSG` is open. So\nwe can set its line length to be 72 characters.\n\nChange-Id: I6c01b187a60f2caed1cbd98de647b63e989ebace\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n" }, { "commit": "1bc61da619b0b375459ae221bd13bb25dcbf0bc2", "tree": "84b5262e5c4d02cd90e9916fa1161c4a469332f2", "parents": [ "81a2acccff0c88b0087753444057d577257b08fa", "bd2b4d50484db56c919ce4dc8324c39d3055b013" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Jul 10 16:40:16 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Jul 10 16:40:16 2025 +0000" }, "message": "Merge \"fix(realm): fixup pdev_create arguments\"" }, { "commit": "bd2b4d50484db56c919ce4dc8324c39d3055b013", "tree": "84b5262e5c4d02cd90e9916fa1161c4a469332f2", "parents": [ "81a2acccff0c88b0087753444057d577257b08fa" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Thu Jul 10 15:01:18 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Jul 10 16:40:00 2025 +0000" }, "message": "fix(realm): fixup pdev_create arguments\n\nDirectly invoke host_rmi_pdev_create with invalid arguments instead of\nreferring to gbl_host_pdevs[0] as no valid devices exists in TRP\nrun config.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I424d77ff2cd3b265a1b1bdcb8e44aa6851c72d13\n" }, { "commit": "81a2acccff0c88b0087753444057d577257b08fa", "tree": "1a26aacfee38c0f7108d35dc007ff4c4143cf373", "parents": [ "bbb1e4b382b0ea2aa36f4aa1f5f8c8409f4adb03", "afc7a0c1bc6b9c1e3bdbf6fb6f49ce13ffc575da" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Wed Jul 09 19:22:32 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 09 19:22:32 2025 +0000" }, "message": "Merge \"fix(smc): update vendor el3 minor version\"" }, { "commit": "afc7a0c1bc6b9c1e3bdbf6fb6f49ce13ffc575da", "tree": "1a26aacfee38c0f7108d35dc007ff4c4143cf373", "parents": [ "bbb1e4b382b0ea2aa36f4aa1f5f8c8409f4adb03" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Jul 09 14:51:52 2025 +0100" }, "committer": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Wed Jul 09 14:51:52 2025 +0100" }, "message": "fix(smc): update vendor el3 minor version\n\nWith addition of TPM Start service to TF-A vendor el3 minor version\nwas updated.\n\nSigned-off-by: Manish Pandey \u003cmanish.pandey2@arm.com\u003e\nChange-Id: I68a9238673d1be9c4421fe88067499c00672a545\n" }, { "commit": "bbb1e4b382b0ea2aa36f4aa1f5f8c8409f4adb03", "tree": "3045a9a21bcaa2ca396fa7895796dcf5e295ecd8", "parents": [ "20c2d74e687556c462b49eb1f8a5e3afc21698cb", "aedca160ea2d648b6f46535a2cce9e4354d30e12" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Wed Jul 09 09:35:46 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Wed Jul 09 09:35:46 2025 +0000" }, "message": "Merge changes from topics \"multi_pdev\", \"pcie_enum\"\n\n* changes:\n feat(realm_host_mgmt): support multiple devices in DA test\n refactor(lib/pcie): rename macro CHECK_DA_SUPPORT_IN_RMI\n feat(lib/pcie): init pcie device capabilities\n feat(lib/pcie): add dvsec helpers\n fix(lib/pcie): import pcie enumeration helpers from rmm-acs\n" }, { "commit": "aedca160ea2d648b6f46535a2cce9e4354d30e12", "tree": "3045a9a21bcaa2ca396fa7895796dcf5e295ecd8", "parents": [ "73005a60253c98274a4a1104af0bf75ccca4d205" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Mon Apr 21 16:39:06 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Wed Jul 09 09:08:58 2025 +0000" }, "message": "feat(realm_host_mgmt): support multiple devices in DA test\n\nConnect all off-chip pcie devices with TSM. This setup secure session,\nIDE and programs DVSEC RMEDA.\n\nHost assigns all devices that are connected with TSM to a Realm. And\nRealm locks and accepts the assigned device.\n\nThis patch adds host_da_workflow_on_all_offchip_devices testcase.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Id8ea54f9c9aad45787a0aac106a9260f68a63ec5\n" }, { "commit": "73005a60253c98274a4a1104af0bf75ccca4d205", "tree": "4b377917909b3aeada9b6a23598112b2b63fd145", "parents": [ "b0833d26dacc0fef45e4d695f9e7028a8d20825e" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jul 01 10:37:15 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Wed Jul 09 09:08:51 2025 +0000" }, "message": "refactor(lib/pcie): rename macro CHECK_DA_SUPPORT_IN_RMI\n\nRename macro CHECK_DA_SUPPORT_IN_RMI to SKIP_DA_TEST_IF_PREREQS_NOT_MET\nand move it to host_da_helper.h\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Ie955e1dcb2edefa0f41edfc36b4b2587cb465a29\n" }, { "commit": "b0833d26dacc0fef45e4d695f9e7028a8d20825e", "tree": "f0902ea53de0d53d4ff4fb3464ea78910ee0ef61", "parents": [ "bbb1305abc89d5b88a4cefe374e05052f27d165c" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Thu Jun 26 11:05:51 2025 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jul 01 17:53:39 2025 +0100" }, "message": "feat(lib/pcie): init pcie device capabilities\n\nAdd additional fields in pcie_dev structure that will be later\nused by DA testcases.\n\nFind and initialize devices extended capabilities.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I32042393dc023d8ac948aa9f4ea921de22ec0b98\n" }, { "commit": "bbb1305abc89d5b88a4cefe374e05052f27d165c", "tree": "914c12b61f6f91da1982b906aa3dd180b911583c", "parents": [ "503b89a6b2d6ecd039401bd7f6f08f0d3cbb69a6" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jun 24 14:00:06 2025 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jul 01 17:53:39 2025 +0100" }, "message": "feat(lib/pcie): add dvsec helpers\n\nAdd DVSEC RME DA support and helpers based on RME System\nArchitecture [1].\n\n[1] https://developer.arm.com/documentation/den0129/latest\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I29c2dc3c94fa295c9948f63f57f88e2763326291\n" }, { "commit": "503b89a6b2d6ecd039401bd7f6f08f0d3cbb69a6", "tree": "bf4b3f02eabecec15b63e2c5247eb6085b7c5ce8", "parents": [ "20c2d74e687556c462b49eb1f8a5e3afc21698cb" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Thu Jun 19 10:34:11 2025 +0100" }, "committer": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jul 01 17:53:36 2025 +0100" }, "message": "fix(lib/pcie): import pcie enumeration helpers from rmm-acs\n\nImport PCIe enumeration helpers from rmm-acs[1] at tag v1.0_REL0_12.24.\n\nThis patch adds the missing device enumeration logic added as part of\nthe initial commit.\n\nThis change is verified with FVP default PCI topology. The helper\npcie_init() might need some enhancements for other platforms with\ndifferent PCI topology.\n\n[1] https://github.com/ARM-software/cca-rmm-acs\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I46724c458fe0071272fc7bca73d51e27181bb1b4\n" }, { "commit": "20c2d74e687556c462b49eb1f8a5e3afc21698cb", "tree": "f1ff24aa3b26674b0fdc9395655dd359a94be504", "parents": [ "9f6afef2ff8f2f36f2df2993d1de086599955677", "51f0333e24e6c4aff44ace871c6042b507476b5e" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Jun 27 14:35:51 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 27 14:35:51 2025 +0000" }, "message": "Merge \"revert: replace in-tree Event Log Lib w/ submodule\"" }, { "commit": "51f0333e24e6c4aff44ace871c6042b507476b5e", "tree": "4e7a4c0d34ab7cb3c0039bbd3b59431f646c531c", "parents": [ "cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Jun 27 13:47:23 2025 +0000" }, "committer": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Fri Jun 27 13:57:23 2025 +0000" }, "message": "revert: replace in-tree Event Log Lib w/ submodule\n\nThis reverts commit cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849.\n\nReason for revert: Causing CI failures\n\nChange-Id: Iad32fb9ba1d32044ef647f01e3091e9b0ee0d9e2\n" }, { "commit": "9f6afef2ff8f2f36f2df2993d1de086599955677", "tree": "bdfab4c4abc2bb6e1fad51fa1b8160abe7bff085", "parents": [ "411645c66c9c95d70b6f26802b2ea41f4ee2981b", "9cc32220197b753f661f47b467c9d629dd9d030c" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 27 12:55:37 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 27 12:55:37 2025 +0000" }, "message": "Merge \"fix: update partial success for DA test case\"" }, { "commit": "411645c66c9c95d70b6f26802b2ea41f4ee2981b", "tree": "f7eb63139e9500a1e9acaac8b4cb314d56b5d9ba", "parents": [ "0fb1238149e5eb0d4c825f2483b21cdc6d963b64", "cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849" ], "author": { "name": "Govindraj Raja", "email": "govindraj.raja@arm.com", "time": "Thu Jun 26 21:39:09 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Jun 26 21:39:09 2025 +0000" }, "message": "Merge changes from topic \"hm/libtl\"\n\n* changes:\n refactor: replace in-tree Event Log Lib w/ submodule\n feat(libtl): integrate Transfer List Library as submodule\n refactor: remove dead make command\n" }, { "commit": "0fb1238149e5eb0d4c825f2483b21cdc6d963b64", "tree": "e0f29f8df550690c78f07f5c63438812eb4b6939", "parents": [ "e1a53a699649c263860560a5ac784599c3b289ca", "e46fa2fc1605473430a41f1b6ee20273fab5f6bf" ], "author": { "name": "Manish Pandey", "email": "manish.pandey2@arm.com", "time": "Thu Jun 26 10:01:01 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Thu Jun 26 10:01:01 2025 +0000" }, "message": "Merge \"fix(fvp): increase NS_BL2U limit\"" }, { "commit": "cc89c2fc40c74ea8d8f1a1489ea988c66c1b5849", "tree": "8be9469773b3f15614ee27ae9539cc29f8692c3c", "parents": [ "68ecce15bcd5db2449700d122f4e8f32cce91ae9" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu May 22 11:08:46 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 15:58:15 2025 +0000" }, "message": "refactor: replace in-tree Event Log Lib w/ submodule\n\nThe Event Log Library has been relocated to a separate repository and is\nnow integrated as a submodule, eliminating the need for in-tree files\nand reducing maintenance efforts for TFTF.\n\nChange-Id: I29694f8b3b08bb1d57dd685f6e42dc9f69d241bb\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "68ecce15bcd5db2449700d122f4e8f32cce91ae9", "tree": "4e7a4c0d34ab7cb3c0039bbd3b59431f646c531c", "parents": [ "550d5104ffe85f2f6994ef04a7172627cd76770e" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Mon May 12 12:38:24 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 15:58:13 2025 +0000" }, "message": "feat(libtl): integrate Transfer List Library as submodule\n\nReplaces in-tree transfer_list implementation with LibTL submodule.\nRemoves legacy source and headers, updates includes and makefiles\nto use the standalone library. Adds architecture-specific inttypes\nheaders for compatibility.\n\nChange-Id: Iff8272a6417983b9fb8e7f6bde6db44c2a6020f5\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "550d5104ffe85f2f6994ef04a7172627cd76770e", "tree": "f6b0848eb24c2ee151dea1aaf859bf8de038a4e0", "parents": [ "e1a53a699649c263860560a5ac784599c3b289ca" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Thu May 22 13:09:27 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 15:58:13 2025 +0000" }, "message": "refactor: remove dead make command\n\nLibFDT sources are built directly and not via the `MAKE_LIB` utility\nwhich isn\u0027t actually defined in TFTF.\n\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\nChange-Id: Ieed18abeade617e741743187fcffa65481b73ed1\n" }, { "commit": "e46fa2fc1605473430a41f1b6ee20273fab5f6bf", "tree": "e0f29f8df550690c78f07f5c63438812eb4b6939", "parents": [ "e1a53a699649c263860560a5ac784599c3b289ca" ], "author": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 09:12:11 2025 +0000" }, "committer": { "name": "Harrison Mutai", "email": "harrison.mutai@arm.com", "time": "Tue Jun 24 09:15:15 2025 +0000" }, "message": "fix(fvp): increase NS_BL2U limit\n\nAdjust NS_BL2U memory limit from 0x4E000 to 0x50000 to accommodate\ngrowth in the `.bss` section of the xlat tables context module and\nprevent overflows when loading the image into DRAM.\n\nChange-Id: I5ddc9368f0eee4c6970a22c5c0389c07d2f2d3d7\nSigned-off-by: Harrison Mutai \u003charrison.mutai@arm.com\u003e\n" }, { "commit": "9cc32220197b753f661f47b467c9d629dd9d030c", "tree": "bae5e24a0eaae2c69f1e33f69aff479001e3c9cb", "parents": [ "e1a53a699649c263860560a5ac784599c3b289ca" ], "author": { "name": "Mate Toth-Pal", "email": "mate.toth-pal@arm.com", "time": "Mon Jun 23 14:54:42 2025 +0200" }, "committer": { "name": "Mate Toth-Pal", "email": "mate.toth-pal@arm.com", "time": "Mon Jun 23 15:00:36 2025 +0200" }, "message": "fix: update partial success for DA test case\n\nThis patch returns a SUCCESS error code on partial success of DA\ntestcase so that TF-RMM can progress with partial merge of DA\npatch stack. This will be reverted when the entire DA\nflow is implemented in TF-RMM.\n\nSigned-off-by: Mate Toth-Pal \u003cmate.toth-pal@arm.com\u003e\nChange-Id: I39a682fd4a346b8f34b51a20e3b5868f71a0f214\n" }, { "commit": "e1a53a699649c263860560a5ac784599c3b289ca", "tree": "ae40d0ba75e4fec2b1a193e99114facb551f11bc", "parents": [ "1356594a91dad701720d4c30357bc2f64f268dbf", "a494e31d805b2ea60e1b154cdf70eba5b8239e31" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 20 12:41:57 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 20 12:41:57 2025 +0000" }, "message": "Merge changes If9d778a7,I8f6f0d32\n\n* changes:\n chore(rme): get device memory regions for map/unmap\n chore(rme): dev granules delegation tests\n" }, { "commit": "a494e31d805b2ea60e1b154cdf70eba5b8239e31", "tree": "ae40d0ba75e4fec2b1a193e99114facb551f11bc", "parents": [ "f25ff9bdacb9b355935486a0b41bcd07789cac38" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Jun 19 16:27:45 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 20 11:36:59 2025 +0000" }, "message": "chore(rme): get device memory regions for map/unmap\n\nSet device memory map/unmap test structures based on\nretrieved platform PCIe memory regions and remove\ndependency on the second region.\n\nChange-Id: If9d778a7d922eaf1ead3193d2916756fd74d77df\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "f25ff9bdacb9b355935486a0b41bcd07789cac38", "tree": "c2473e6292ac1463ef08f61e95f13f7c4485c297", "parents": [ "1356594a91dad701720d4c30357bc2f64f268dbf" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Jun 18 13:51:07 2025 +0100" }, "committer": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Wed Jun 18 14:22:48 2025 +0100" }, "message": "chore(rme): dev granules delegation tests\n\nModify device granules delegatation tests to use\nall existing PCIe memory regions.\nSeed the random number generator by reading RNDR register.\n\nChange-Id: I8f6f0d321a71f1913c63dbab50b2085b308ded58\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "1356594a91dad701720d4c30357bc2f64f268dbf", "tree": "3b1967ddeb8b1e77f9b92072ed2ed26dd8c5b70d", "parents": [ "41684ab1b6655ddeddbd13cff6d3a2938aa1cf2d", "295721e357657995da7e5ee41528a5f14bff497a" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jun 16 06:09:17 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jun 16 06:09:17 2025 +0000" }, "message": "Merge changes from topic \"da_alp12\"\n\n* changes:\n fix: allow partial success for DA test case\n fix(realm): cleanup pdev after setup\n chore(realm): rename rsi_ripas_respose_type to rsi_response_type\n chore(real_da): move realm DA support functions\n chore(host_da): move host RME DA related functions\n feat(realm): added support to invoke RSI RDEV ABIs\n feat(realm): align RSI ABIs with RMM spec 1.1-alp12\n feat(realm_host_mgmt): added support to call RMI VDEV ABIs\n feat(host_realm_mgmt): align DA RMI ABIs RMM spec 1.1-alp12\n chore(include/runtime_services): update SMC RMI commands\n" }, { "commit": "41684ab1b6655ddeddbd13cff6d3a2938aa1cf2d", "tree": "a29b300157e93b11a9b38e831959f64172ebb326", "parents": [ "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa", "5fdb3bff1892596ae023876e62097df70cb0bb37" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Mon Jun 16 06:04:36 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Mon Jun 16 06:04:36 2025 +0000" }, "message": "Merge \"fix: correct the check for MbedTLS makefile\"" }, { "commit": "5fdb3bff1892596ae023876e62097df70cb0bb37", "tree": "a29b300157e93b11a9b38e831959f64172ebb326", "parents": [ "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 22:59:55 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Sat Jun 14 08:07:02 2025 +0000" }, "message": "fix: correct the check for MbedTLS makefile\n\nThis patch addresses an issue introduced in a previous\ncommit where the inclusion of the MbedTLS makefile was\nincorrect.\n\nChange-Id: Icdae1d85e4bc5663f68b12a9087084ce667f38f4\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "295721e357657995da7e5ee41528a5f14bff497a", "tree": "9f2feff5677fc194200d30d143f6afdbea032e8d", "parents": [ "d0d1710183402ef819629c61f1e311ef645148d0" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 00:07:23 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "fix: allow partial success for DA test case\n\nThis patch returns a SUCCESS error code on partial success of DA\ntestcase so that TF-RMM can progress with partial merge of DA\npatch stack. This will be reverted when the entire DA\nflow is implemented in TF-RMM.\n\nChange-Id: Ia28da05efd93d8290c2cfc879e09ff796a5797d6\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "d0d1710183402ef819629c61f1e311ef645148d0", "tree": "b54047ef37f85f9e7215db14726368703dd56a5d", "parents": [ "08a5f16c322b75a5ed7a1b16da2bb2fc6755ca16" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 06 17:20:59 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "fix(realm): cleanup pdev after setup\n\nChange-Id: Ia2f47fef71ce7336cece5f14b50e0ea4631c0358\nSigned-off-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\n" }, { "commit": "08a5f16c322b75a5ed7a1b16da2bb2fc6755ca16", "tree": "148d48459acd68d174f5e4dfb7f33b0488a2b3b2", "parents": [ "b8851a7ef8aca4385c42f63d74ac709456c8af1d" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Fri May 09 17:29:13 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "chore(realm): rename rsi_ripas_respose_type to rsi_response_type\n\nRSI_RDEV_VALIDATE_MAPPING command\u0027s output value in X2 has RsiResponse\ntype. Rename \u0027rsi_ripas_respose_type\u0027 to \u0027rsi_response_type\u0027 and fix\ntypo.\n\nChange-Id: I7af258f67c6f18eed9443bfb922dad3a2fdfb0a9\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "b8851a7ef8aca4385c42f63d74ac709456c8af1d", "tree": "faa9bc10b3090fd1745b0190bfe8281e26065294", "parents": [ "19ad61740ec71f886473c3f4d125ad062ce6c9f4" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Apr 24 11:40:28 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "chore(real_da): move realm DA support functions\n\nMove realm DA support functions from realm_da.c\nto realm_da_helpers.c.\n\nChange-Id: I53f3d8bbcaa77d5d17a9b435c0e0484af64adbd7\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "19ad61740ec71f886473c3f4d125ad062ce6c9f4", "tree": "5f707d4e0cbfd1136312c33f02576745a9bf689d", "parents": [ "c58e4697c2df3d1b9d3a7d2e3da2294a13c27449" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Thu Apr 24 10:39:53 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "chore(host_da): move host RME DA related functions\n\nMove host RME DA related functions from host_rmi_da_flow.c\nto host_da_helper.c.\n\nChange-Id: Ib5c5ba3440ba1fa26b6f25a8bfab002183252627\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" }, { "commit": "c58e4697c2df3d1b9d3a7d2e3da2294a13c27449", "tree": "8b0e4d94ab522130322b4a260f7114efa418abd4", "parents": [ "51135c80730b1ce8faf30ee53a3797bdf342661c" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jan 28 12:28:59 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 17:57:03 2025 +0100" }, "message": "feat(realm): added support to invoke RSI RDEV ABIs\n\n- Updated DA RSI data types with RMM spec 1.1-alp11.1.\n- Added support to call DA RSI RDEV ABIs like\n SMC_RSI_RDEV_CONTINUE\n SMC_RSI_RDEV_STOP\n SMC_RSI_RDEV_START\n SMC_RSI_RDEV_GET_INTERFACE_REPORT\n SMC_RSI_RDEV_LOCK\n SMC_RSI_RDEV_GET_INFO\n SMC_RSI_RDEV_GET_MEASUREMENTS\n SMC_RSI_RDEV_GET_STATE\n SMC_RSI_RDEV_GET_INSTANCE_ID\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I60664262c24f287637e91d53ecab0c8b980e58b7\n" }, { "commit": "51135c80730b1ce8faf30ee53a3797bdf342661c", "tree": "b1f1864a8d8666ae08ca534bf3ea53f76e30c97e", "parents": [ "c4ef92bd075d41d7d1ae03b9c5484881547946e7" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Mon Jan 27 11:17:32 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:53:10 2025 +0100" }, "message": "feat(realm): align RSI ABIs with RMM spec 1.1-alp12\n\nThis syncs the naming of SMC RSI commands with TF-RMM.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I7905f0f3788c0c659ba6f787fb002d1c5997d289\n" }, { "commit": "c4ef92bd075d41d7d1ae03b9c5484881547946e7", "tree": "3471ac534950b9cde8059ed320aa4a1d4d797595", "parents": [ "ec4249f483a9ca6e5d65db7ae9c65a69b1d22a96" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Fri Jan 24 11:55:02 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:53:06 2025 +0100" }, "message": "feat(realm_host_mgmt): added support to call RMI VDEV ABIs\n\nThis change creates a Realm witn RMI_FEAT_DA feature and assigns\na VDEV to the Realm using RMI_VDEV_CREATE and calls various VDEV\nmanagement ABIs like:\n SMC_RMI_VDEV_DESTROY\n SMC_RMI_VDEV_STOP\n SMC_RMI_VDEV_GET_STATE\n SMC_RMI_VDEV_COMMUNICATE\n\nOnce the VDEV is assigned to a Realm. A REC enter is done to invoke\nDA RSIs calls.\n\nA common dev_communicate is implemented that is used by both PDEV\nand VDEV communicate.\n\nRenamed testcase host_test_rmi_pdev_calls to host_invoke_rmi_da_flow.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: Iefe6f6ee4c0810479d20319851cd8a6590c1e4d7\n" }, { "commit": "ec4249f483a9ca6e5d65db7ae9c65a69b1d22a96", "tree": "04bb12194f885577d0ddbe29aba3008dc9c84660", "parents": [ "5dac5b087067ac7c726ba6eef13538e84d330f43" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jan 07 15:13:09 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:52:09 2025 +0100" }, "message": "feat(host_realm_mgmt): align DA RMI ABIs RMM spec 1.1-alp12\n\nThe DA RMI ABIs related to PDEV, VDEV are aligned to RMM specification\n1.1-alp12\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I6ac86bd2d574f93c7f7b29095b242e4cbf73a071\n" }, { "commit": "5dac5b087067ac7c726ba6eef13538e84d330f43", "tree": "6e951e9d7e671c439d7fbce6bf8554b76f9124c2", "parents": [ "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa" ], "author": { "name": "Arunachalam Ganapathy", "email": "arunachalam.ganapathy@arm.com", "time": "Tue Jan 07 14:51:50 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 16:52:09 2025 +0100" }, "message": "chore(include/runtime_services): update SMC RMI commands\n\nThis syncs the naming of SMC RMI commands with TF-RMM. This change helps\nto update SMC RMI commands and data types easily whenever it gets\nupdated in TF-RMM.\n\nSigned-off-by: Arunachalam Ganapathy \u003carunachalam.ganapathy@arm.com\u003e\nChange-Id: I8acc96d5326ad0656df0f6c7822adefe87a275c3\n" }, { "commit": "f54e1fea268a63b2fb6bb41b0a1be4d3f9408ffa", "tree": "1c688ebf6673563fdd5871dd3eda45457454cc47", "parents": [ "42c4a61e973a8d2a50f6e606ac1fc61157fa4e85", "8307c3367e29b068cd3e65b5bd05aa28f8fee0f8" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 15:36:34 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 15:36:34 2025 +0000" }, "message": "Merge \"feat(rmm): add tests for FEAT_TCR2 on RMM\"" }, { "commit": "8307c3367e29b068cd3e65b5bd05aa28f8fee0f8", "tree": "b19d216065c9af2c129b5e692024acc836b70662", "parents": [ "d1cf6dc75ffa489f3055b2c453ad57893214b6bc" ], "author": { "name": "Javier Almansa Sobrino", "email": "javier.almansasobrino@arm.com", "time": "Thu Jun 12 10:30:46 2025 +0100" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 15:35:48 2025 +0000" }, "message": "feat(rmm): add tests for FEAT_TCR2 on RMM\n\nSigned-off-by: Javier Almansa Sobrino \u003cjavier.almansasobrino@arm.com\u003e\nChange-Id: I4dc16c5c6edcabf993ea30fe53eff5993b5af651\n" }, { "commit": "42c4a61e973a8d2a50f6e606ac1fc61157fa4e85", "tree": "55e2cc735d7d1f1b931c1b3e1c69c689f81d0e5c", "parents": [ "d1cf6dc75ffa489f3055b2c453ad57893214b6bc", "ea34abf73d6405cd870fe1f1ff46268b635f51d6" ], "author": { "name": "Olivier Deprez", "email": "olivier.deprez@arm.com", "time": "Fri Jun 13 13:59:30 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 13:59:30 2025 +0000" }, "message": "Merge \"fix(realm): add missing size definitions for Juno\"" }, { "commit": "d1cf6dc75ffa489f3055b2c453ad57893214b6bc", "tree": "c3be96dc6a3cf24de7b5d778004a4e76d97dbbc5", "parents": [ "d479a125cbb07b63c85daf42a36215008168fd37", "a1fe738b1fd6212d92e20a408a0110778276732b" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 10:53:51 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 10:53:51 2025 +0000" }, "message": "Merge \"feat(rme): test access outside PAR from Plane N\"" }, { "commit": "d479a125cbb07b63c85daf42a36215008168fd37", "tree": "56be81714e31b82397012a6203f28a17bbb203d4", "parents": [ "5032d7bc760128a07ace8c9d4d91f7c3e9011cda", "1b16dc85e01ac96b02a384a307925005a471b2e2" ], "author": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Fri Jun 13 08:57:58 2025 +0000" }, "committer": { "name": "TrustedFirmware Code Review", "email": "review@review.trustedfirmware.org", "time": "Fri Jun 13 08:57:58 2025 +0000" }, "message": "Merge changes Ieecc41dd,Ie59361dd\n\n* changes:\n feat(rme): add dev mem map/unmap tests\n feat(rme): add dev granules tests\n" }, { "commit": "1b16dc85e01ac96b02a384a307925005a471b2e2", "tree": "56be81714e31b82397012a6203f28a17bbb203d4", "parents": [ "718fd7902c015a64b49b12dcb6005d1aa50fd72e" ], "author": { "name": "AlexeiFedorov", "email": "Alexei.Fedorov@arm.com", "time": "Tue Jan 14 11:40:18 2025 +0000" }, "committer": { "name": "Soby Mathew", "email": "soby.mathew@arm.com", "time": "Thu Jun 12 23:30:01 2025 +0100" }, "message": "feat(rme): add dev mem map/unmap tests\n\n- Add tests for RMI_DEV_MEM_MAP and\nRMI_DEV_MEM_UNMAP commands as per RMM Specification 1.1-alp12.\n- Add RNDR and RNDRRS registers\u0027 definitions.\n- Redefine RNDR and RNDRRS read functions as:\nDEFINE_RENAME_SYSREG_READ_FUNC(rndr, RNDR)\nDEFINE_RENAME_SYSREG_READ_FUNC(rndrrs, RNDRRS)\n\nChange-Id: Ieecc41dd6d3011bb63101bc38d527a8f57e0ef4a\nSigned-off-by: AlexeiFedorov \u003cAlexei.Fedorov@arm.com\u003e\n" } ], "next": "718fd7902c015a64b49b12dcb6005d1aa50fd72e" }