)]}'
{
  "log": [
    {
      "commit": "6d144db95cd1ee317bf66efade0fd5d4e0909c3c",
      "tree": "0b57d1214fe208e82a5b56ba03b06cec0074700f",
      "parents": [
        "e5629bd4c6ab6088e21e7f4e2f4a27495945e21a"
      ],
      "author": {
        "name": "Boyan Karatotev",
        "email": "boyan.karatotev@arm.com",
        "time": "Mon Jun 23 15:04:53 2025 +0100"
      },
      "committer": {
        "name": "Boyan Karatotev",
        "email": "boyan.karatotev@arm.com",
        "time": "Mon Nov 03 14:53:32 2025 +0000"
      },
      "message": "refactor(gic): make the concept of SGI generic\n\nSoftware generated interrupts (SGIs) are a GICv2/3/4 concept. However,\nthey are deeply embedded in how TFTF handles wake ups. This patch\npromotes the SGI to an abstract concept that can be performed\nindependently of the interrupt controller, largely the same as it is\nused today. To do that the interrupt interface for an SGI is separated\nfrom the general IRQ and each SGI is assigned a linear index from 0\nonwards. Translating from SGI to IRQ is done via a hook in arm_gic.c\nthat will be multiplexed to the appropriate driver. For GIC \u003c\u003d v3 this\nis a thin wrapper around the identity mapping as SGIs map to INTIDs from\n0 through 15. For GICv5 the mapping is different and an SGI is an LPI\nand calculated as recommended by chapter 2.5 in the spec.\n\nAdditionally, the definitions of SGI numbers are made generic as no\nplatform has utilised the difference.\n\nChange-Id: I7e6a5fbe655098c5e235b98f6dda8a14619a5904\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n"
    },
    {
      "commit": "b1467682a26053428c34eb363ba06391dcbf77eb",
      "tree": "af2c57fb047817f280270ffa4bb4c275064359b3",
      "parents": [
        "6e191237b069712f613e42592fd08fe326da1ffc"
      ],
      "author": {
        "name": "Imre Kis",
        "email": "imre.kis@arm.com",
        "time": "Thu Aug 28 14:38:36 2025 +0200"
      },
      "committer": {
        "name": "Imre Kis",
        "email": "imre.kis@arm.com",
        "time": "Tue Sep 16 14:57:48 2025 +0200"
      },
      "message": "fix(psci): mask MBZ bits in PSCI target_cpu arguments\n\nThe PSCI specification defines the target_cpu values almost the same as\nthe MPIDR_EL1 register value, however it only contains the Aff0-3 fields\nand the rest is declared as MBZ. Mask the MBZ bits to follow the PSCI\nspecification.\n\nChange-Id: I4196b5039aa774b357cb6932d3c2c24060f1f228\nSigned-off-by: Imre Kis \u003cimre.kis@arm.com\u003e\n"
    },
    {
      "commit": "2fb7522d68553139a45c418bbe74b376b10e8d78",
      "tree": "687c2b7fa3f9148809d14ac2d0bdf9c38238a5fe",
      "parents": [
        "939c19ed3944643e4caf27c843f086aff1f071c6"
      ],
      "author": {
        "name": "Imre Kis",
        "email": "imre.kis@arm.com",
        "time": "Wed Aug 06 16:26:23 2025 +0200"
      },
      "committer": {
        "name": "Imre Kis",
        "email": "imre.kis@arm.com",
        "time": "Tue Sep 16 14:56:38 2025 +0200"
      },
      "message": "feat(psci): accept v1.2 and v1.3 PSCI versions\n\nAdd PSCI version 1.2 and 1.3 to the allowed version list.\n\nChange-Id: I84a3e46112397d4b75ff3a8614a0bfc5f2682f31\nSigned-off-by: Imre Kis \u003cimre.kis@arm.com\u003e\n"
    },
    {
      "commit": "794b0ac8cdb01aa8c5ad630d4592b3743f6782cd",
      "tree": "9d4bda7de5f2c1640670949c0aa8fb382bc31fee",
      "parents": [
        "aa48358ef9270417897780230bdedb635cc4af56"
      ],
      "author": {
        "name": "Boyan Karatotev",
        "email": "boyan.karatotev@arm.com",
        "time": "Fri Jun 20 13:13:29 2025 +0100"
      },
      "committer": {
        "name": "Boyan Karatotev",
        "email": "boyan.karatotev@arm.com",
        "time": "Tue Sep 09 06:37:05 2025 +0100"
      },
      "message": "refactor(gic): unify SGI exception data\n\nThe information we pass to exception handlers for SGIs, PPIs, and SPIs\ndoes not differer materially. Unify the handling to use the same types.\n\nSince SGIs are normal IRQs, we can put the last remaining function in\nirq.h to simplify a bit.\n\nChange-Id: I1cf6f8a2a832797a9ce54eeb025a94120f115cf6\nSigned-off-by: Boyan Karatotev \u003cboyan.karatotev@arm.com\u003e\n"
    },
    {
      "commit": "cb88add07daff59486f850be6b4cd4750f94d97c",
      "tree": "3737ad2a8a2aa4c4d9e8d4eea54720009ca4e94a",
      "parents": [
        "e0400c6d2b0372d742cd2cda9aaa7c5cf4741c4a"
      ],
      "author": {
        "name": "Wing Li",
        "email": "wingers@google.com",
        "time": "Sat Oct 29 02:32:06 2022 +0100"
      },
      "committer": {
        "name": "Wing Li",
        "email": "wingers@google.com",
        "time": "Thu Mar 23 19:37:52 2023 -0700"
      },
      "message": "test(psci): add tests for OS-initiated mode\n\nChange-Id: I33e135f659aea600f71e053ac3db57eb0172e22b\nSigned-off-by: Wing Li \u003cwingers@google.com\u003e\n"
    },
    {
      "commit": "09a00ef98c6108fec75dafcc7dbdddacb2ee2e91",
      "tree": "77b585708a4fd850f0dac3a3f0fcaf34576fa8c9",
      "parents": [
        "9e550b6f75f064b53d74a4ad3c8672332d87451c"
      ],
      "author": {
        "name": "Antonio Nino Diaz",
        "email": "antonio.ninodiaz@arm.com",
        "time": "Fri Jan 11 13:12:58 2019 +0000"
      },
      "committer": {
        "name": "Sandrine Bailleux",
        "email": "sandrine.bailleux@arm.com",
        "time": "Fri Jan 25 08:23:20 2019 +0000"
      },
      "message": "Sanitise includes of include/drivers across codebase\n\nEnforce full include path for includes.\n\nThe reason for this change is that having a global namespace for\nincludes isn\u0027t a good idea. It defeats one of the advantages of having\nfolders and it introduces problems that are sometimes subtle (because\nyou may not know the header you are actually including if there are two\nof them with the same name).\n\nChange-Id: I45e912b16c9fff81f50840dad7e7f90ed6637b2a\nSigned-off-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\n"
    },
    {
      "commit": "3cd87d77947ec4fc04440268ed122b4ed81c7781",
      "tree": "78fdee12b026b931029e434f29b4fe09835fe4c9",
      "parents": [],
      "author": {
        "name": "Sandrine Bailleux",
        "email": "sandrine.bailleux@arm.com",
        "time": "Tue Oct 09 11:12:55 2018 +0200"
      },
      "committer": {
        "name": "Sandrine Bailleux",
        "email": "sandrine.bailleux@arm.com",
        "time": "Wed Oct 10 12:34:34 2018 +0200"
      },
      "message": "Trusted Firmware-A Tests, version 2.0\n\nThis is the first public version of the tests for the Trusted\nFirmware-A project. Please see the documentation provided in the\nsource tree for more details.\n\nChange-Id: I6f3452046a1351ac94a71b3525c30a4ca8db7867\nSigned-off-by: Sandrine Bailleux \u003csandrine.bailleux@arm.com\u003e\nCo-authored-by: amobal01 \u003camol.balasokamble@arm.com\u003e\nCo-authored-by: Antonio Nino Diaz \u003cantonio.ninodiaz@arm.com\u003e\nCo-authored-by: Asha R \u003casha.r@arm.com\u003e\nCo-authored-by: Chandni Cherukuri \u003cchandni.cherukuri@arm.com\u003e\nCo-authored-by: David Cunado \u003cdavid.cunado@arm.com\u003e\nCo-authored-by: Dimitris Papastamos \u003cdimitris.papastamos@arm.com\u003e\nCo-authored-by: Douglas Raillard \u003cdouglas.raillard@arm.com\u003e\nCo-authored-by: dp-arm \u003cdimitris.papastamos@arm.com\u003e\nCo-authored-by: Jeenu Viswambharan \u003cjeenu.viswambharan@arm.com\u003e\nCo-authored-by: Jonathan Wright \u003cjonathan.wright@arm.com\u003e\nCo-authored-by: Kévin Petit \u003ckevin.petit@arm.com\u003e\nCo-authored-by: Roberto Vargas \u003croberto.vargas@arm.com\u003e\nCo-authored-by: Sathees Balya \u003csathees.balya@arm.com\u003e\nCo-authored-by: Shawon Roy \u003cShawon.Roy@arm.com\u003e\nCo-authored-by: Soby Mathew \u003csoby.mathew@arm.com\u003e\nCo-authored-by: Thomas Abraham \u003cthomas.abraham@arm.com\u003e\nCo-authored-by: Vikram Kanigiri \u003cvikram.kanigiri@arm.com\u003e\nCo-authored-by: Yatharth Kochar \u003cyatharth.kochar@arm.com\u003e\n"
    }
  ]
}