| Varun Wadekar | dbf8a2f | 2020-06-23 08:13:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <debug.h> |
| 8 | #include <drivers/console.h> |
| 9 | #include <drivers/arm/gic_common.h> |
| 10 | #include <drivers/arm/gic_v2.h> |
| 11 | #include <platform.h> |
| 12 | #include <platform_def.h> |
| 13 | |
| 14 | #include <xlat_tables_v2.h> |
| 15 | |
| 16 | /* |
| 17 | * Memory map |
| 18 | */ |
| 19 | static const mmap_region_t tegra186_mmap[] = { |
| 20 | MAP_REGION_FLAT(TEGRA_MC_BASE, 0x2000, /* 8KB */ |
| 21 | MT_DEVICE | MT_RW | MT_NS), |
| 22 | MAP_REGION_FLAT(TEGRA_TMR0_BASE, 0x1000, /* 4KB */ |
| 23 | MT_DEVICE | MT_RW | MT_NS), |
| 24 | MAP_REGION_FLAT(TEGRA_WDT0_BASE, 0x1000, /* 4KB */ |
| 25 | MT_DEVICE | MT_RW | MT_NS), |
| 26 | MAP_REGION_FLAT(TEGRA_UARTA_BASE, 0x10000U, /* 64KB */ |
| 27 | MT_DEVICE | MT_RW | MT_NS), |
| 28 | MAP_REGION_FLAT(TEGRA_GICD_BASE, 0x1000, /* 4KB */ |
| 29 | MT_DEVICE | MT_RW | MT_NS), |
| 30 | MAP_REGION_FLAT(TEGRA_GICC_BASE, 0x1000, /* 4KB */ |
| 31 | MT_DEVICE | MT_RW | MT_NS), |
| 32 | MAP_REGION_FLAT(TEGRA_RTC_BASE, 0x1000, /* 4KB */ |
| 33 | MT_DEVICE | MT_RW | MT_NS), |
| 34 | MAP_REGION_FLAT(TEGRA_TMRUS_BASE, 0x1000, /* 4KB */ |
| 35 | MT_DEVICE | MT_RW | MT_NS), |
| 36 | MAP_REGION_FLAT(TEGRA_AOWAKE_BASE, 0x1000, /* 4KB */ |
| 37 | MT_DEVICE | MT_RW | MT_NS), |
| 38 | MAP_REGION_FLAT(TEGRA_SCRATCH_BASE, 0x1000, /* 4KB */ |
| 39 | MT_DEVICE | MT_RW | MT_NS), |
| 40 | MAP_REGION_FLAT(TEGRA_SMMU0_BASE, 0x1000, /* 4KB */ |
| 41 | MT_DEVICE | MT_RW | MT_NS), |
| 42 | MAP_REGION_FLAT(DRAM_BASE + TFTF_NVM_OFFSET, TFTF_NVM_SIZE, |
| 43 | MT_MEMORY | MT_RW | MT_NS), |
| 44 | {0} |
| 45 | }; |
| 46 | |
| 47 | const mmap_region_t *tftf_platform_get_mmap(void) |
| 48 | { |
| 49 | return tegra186_mmap; |
| 50 | } |
| 51 | |
| 52 | void tftf_plat_arch_setup(void) |
| 53 | { |
| 54 | tftf_plat_configure_mmu(); |
| 55 | } |
| 56 | |
| 57 | void tftf_early_platform_setup(void) |
| 58 | { |
| 59 | /* Tegra186 platforms use UARTA as the console */ |
| 60 | console_init(TEGRA_UARTA_BASE, TEGRA_CONSOLE_CLKRATE, |
| 61 | TEGRA_CONSOLE_BAUDRATE); |
| 62 | } |
| 63 | |
| 64 | void tftf_platform_setup(void) |
| 65 | { |
| 66 | gicv2_init(TEGRA_GICC_BASE, TEGRA_GICD_BASE); |
| 67 | gicv2_setup_distif(); |
| 68 | gicv2_probe_gic_cpu_id(); |
| 69 | gicv2_setup_cpuif(); |
| 70 | |
| 71 | /* Configure system suspend wake sources */ |
| 72 | tegra_set_rtc_as_wakeup_source(); |
| 73 | } |