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Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02001/*
Max Shvetsov103e0562021-02-04 16:58:31 +00002 * Copyright (c) 2017-2021, Arm Limited. All rights reserved.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz1486f3b2018-06-26 10:30:10 +01007#ifndef CACTUS_TESTS_H
8#define CACTUS_TESTS_H
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02009
Max Shvetsov103e0562021-02-04 16:58:31 +000010#include <spm_common.h>
Max Shvetsovc32f4782020-06-23 09:41:15 +010011
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020012/*
13 * Test functions
14 */
15
Max Shvetsovc32f4782020-06-23 09:41:15 +010016void ffa_tests(struct mailbox_buffers *mb);
J-Alves9f6f0142020-06-17 15:37:59 +010017
18/*
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020019 * Test other things like the version number returned by SPM.
20 */
21void misc_tests(void);
22
23/*
24 * The Arm TF is responsible for setting up system registers on behalf of the
25 * Secure Partition. For example, TF is supposed to allow Secure Partitions to
26 * perform cache maintenance operations (by setting the SCTLR_EL1.UCI bit).
27 *
28 * This function attempts to verify that we indeed have access to these system
29 * features from S-EL0. These tests report their results on the UART. They do
30 * not recover from a failure : when an error is encountered they will most
31 * likely trigger an exception into S-EL1.
32 */
33void system_setup_tests(void);
34
35/*
36 * Exercise the SP_MEMORY_ATTRIBUTES_SET_AARCH64 SMC interface. A variety of
37 * valid and invalid requests to change memory attributes are tested.
38 *
39 * These tests report their results on the UART. They do not recover from a
40 * failure : when an error is encountered they endlessly loop.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020041 */
Antonio Nino Diaz1486f3b2018-06-26 10:30:10 +010042void mem_attr_changes_tests(void);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020043
Antonio Nino Diaz1486f3b2018-06-26 10:30:10 +010044#endif /* CACTUS_TESTS_H */