blob: 46d952bfcd002e69ff29bbe8d1922fd001221b14 [file] [log] [blame]
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +01001/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <platform.h>
8#include <psci.h>
9
10/* State IDs for local power states on SGI platforms. */
Daniel Boulbyc19215a2023-05-17 13:50:36 +010011#define TC_PS_RUN_STATE_ID 0 /* Valid for CPUs and Clusters */
12#define TC_PS_RETENTION_STATE_ID 1 /* Valid for only CPUs */
13#define TC_PS_OFF_STATE_ID 2 /* Valid for CPUs and Clusters */
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +010014
15/* Suspend depth definitions for each power state */
Daniel Boulbyc19215a2023-05-17 13:50:36 +010016#define TC_PS_RUN_DEPTH 0
17#define TC_PS_RETENTION_DEPTH 1
18#define TC_PS_OFF_DEPTH 2
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +010019
20/* The state property array with details of idle state possible for the core */
21static const plat_state_prop_t core_state_prop[] = {
Daniel Boulbyc19215a2023-05-17 13:50:36 +010022 {TC_PS_RETENTION_DEPTH, TC_PS_RETENTION_STATE_ID,
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +010023 PSTATE_TYPE_STANDBY},
Daniel Boulbyc19215a2023-05-17 13:50:36 +010024 {TC_PS_OFF_DEPTH, TC_PS_OFF_STATE_ID, PSTATE_TYPE_POWERDOWN},
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +010025 {0}
26};
27
28/* The state property array with details of idle state possible for the cluster */
29static const plat_state_prop_t cluster_state_prop[] = {
Daniel Boulbyc19215a2023-05-17 13:50:36 +010030 {TC_PS_OFF_DEPTH, TC_PS_OFF_STATE_ID, PSTATE_TYPE_POWERDOWN},
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +010031 {0}
32};
33
34const plat_state_prop_t *plat_get_state_prop(unsigned int level)
35{
36 switch (level) {
37 case MPIDR_AFFLVL0:
38 return core_state_prop;
39 case MPIDR_AFFLVL1:
40 return cluster_state_prop;
41 default:
42 return NULL;
43 }
44}