blob: 18cfa2c765a65754f7b1762b8e3baeee3e7646ce [file] [log] [blame]
Varun Wadekar4d0dcc82020-06-25 19:39:27 -07001/*
2 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <debug.h>
8#include <drivers/console.h>
9#include <drivers/arm/gic_common.h>
10#include <drivers/arm/gic_v2.h>
11#include <platform.h>
12#include <platform_def.h>
13
14#include <xlat_tables_v2.h>
15
16/*
17 * Memory map
18 */
19static const mmap_region_t tegra210_mmap[] = {
20 MAP_REGION_FLAT(TEGRA_GICD_BASE, 0x1000, /* 4KB */
21 MT_DEVICE | MT_RW | MT_NS),
22 MAP_REGION_FLAT(TEGRA_GICC_BASE, 0x1000, /* 4KB */
23 MT_DEVICE | MT_RW | MT_NS),
24 MAP_REGION_FLAT(TEGRA_TIMERS_BASE, 0x1000, /* 4KB */
25 MT_DEVICE | MT_RW | MT_NS),
26 MAP_REGION_FLAT(TEGRA_UARTA_BASE, 0x10000U, /* 64KB */
27 MT_DEVICE | MT_RW | MT_NS),
28 MAP_REGION_FLAT(TEGRA_RTC_BASE, 0x1000, /* 4KB */
29 MT_DEVICE | MT_RW | MT_NS),
30 MAP_REGION_FLAT(DRAM_BASE + TFTF_NVM_OFFSET, TFTF_NVM_SIZE,
31 MT_MEMORY | MT_RW | MT_NS),
32 {0}
33};
34
35const mmap_region_t *tftf_platform_get_mmap(void)
36{
37 return tegra210_mmap;
38}
39
40void tftf_plat_arch_setup(void)
41{
42 tftf_plat_configure_mmu();
43}
44
45void tftf_early_platform_setup(void)
46{
47 /* Tegra210 platforms use UARTA as the console */
48 console_init(TEGRA_UARTA_BASE, TEGRA_CONSOLE_CLKRATE,
49 TEGRA_CONSOLE_BAUDRATE);
50}
51
52void tftf_platform_setup(void)
53{
54 gicv2_init(TEGRA_GICC_BASE, TEGRA_GICD_BASE);
55 gicv2_setup_distif();
56 gicv2_probe_gic_cpu_id();
57 gicv2_setup_cpuif();
58}