refactor(spm): rename FF-A SIMD test suite
Rename "SIMD,SVE Registers context" test suite to "SIMD context
switch tests".
Rename test case "Check that SIMD registers context is preserved" to
"Check that Adv. SIMD registers context is preserved".
Update platform tests_to_skip files accordingly.
Remove redundant "SIMD,SVE Registers context" instance from
tftf/tests/aarch32_tests_to_skip.txt
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ida5f46a8d0ec822a6629b660c41dfcf9c7e200e7
diff --git a/plat/xilinx/versal_net/tests_to_skip.txt b/plat/xilinx/versal_net/tests_to_skip.txt
index d5c3a39..80e7cb2 100644
--- a/plat/xilinx/versal_net/tests_to_skip.txt
+++ b/plat/xilinx/versal_net/tests_to_skip.txt
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2023-2024, Advanced Micro Devices, Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -38,7 +38,7 @@
FF-A Setup and Discovery/FF-A RXTX unmap SP rxtx buffer
FF-A Setup and Discovery/Test FFA_PARTITION_INFO_GET v1.0
FF-A Memory Sharing/Lend memory, clear flag set
-SIMD,SVE Registers context/Check that SIMD registers context is preserved
+SIMD context switch tests
FF-A Interrupt
FF-A Notifications
diff --git a/plat/xilinx/zynqmp/tests_to_skip.txt b/plat/xilinx/zynqmp/tests_to_skip.txt
index 9c32ae2..271fdc8 100644
--- a/plat/xilinx/zynqmp/tests_to_skip.txt
+++ b/plat/xilinx/zynqmp/tests_to_skip.txt
@@ -53,7 +53,7 @@
EL3 power state parser validation
#TESTS: SIMD
-SIMD,SVE Registers context/Check that SIMD registers context is preserved
+SIMD context switch tests
#TESTS: psci-extensive
PSCI CPU ON OFF Stress Tests/Repeated shutdown of all cores to stress test CPU_ON, CPU_SUSPEND and CPU_OFF
diff --git a/tftf/tests/aarch32_tests_to_skip.txt b/tftf/tests/aarch32_tests_to_skip.txt
index 6913cb1..f05235d 100644
--- a/tftf/tests/aarch32_tests_to_skip.txt
+++ b/tftf/tests/aarch32_tests_to_skip.txt
@@ -1,10 +1,9 @@
#
-# Copyright (c) 2023, Arm Limited. All rights reserved.
+# Copyright (c) 2023-2024, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
Realm payload at EL1
-SIMD,SVE Registers context
Invalid memory access with RME extension
FF-A Setup and Discovery
SP exceptions
@@ -12,7 +11,7 @@
FF-A Group0 interrupts
FF-A Power management
FF-A Memory Sharing
-SIMD,SVE Registers context
+SIMD context switch tests
FF-A Interrupt
SMMUv3 tests
FF-A Notifications
diff --git a/tftf/tests/tests-spm.xml b/tftf/tests/tests-spm.xml
index 5658d62..60eb24d 100644
--- a/tftf/tests/tests-spm.xml
+++ b/tftf/tests/tests-spm.xml
@@ -143,9 +143,9 @@
function="test_ffa_memory_retrieve_request_from_vm" />
</testsuite>
- <testsuite name="SIMD,SVE Registers context"
+ <testsuite name="SIMD context switch tests"
description="Validate context switch between NWd and SWd" >
- <testcase name="Check that SIMD registers context is preserved"
+ <testcase name="Check that Adv. SIMD registers context is preserved"
function="test_simd_vectors_preserved" />
<testcase name="Check that SVE registers context is preserved"
function="test_sve_vectors_preserved" />