Support for extended register usage in SMCCC v1.2 spec
The new version of SMC Calling Convention spec makes X0-X7/W0-W7/R0-R7
registers available for returning results and X1-X7/W1-W7/R1-R7 for
passing arguments during SMC calls.
This patch makes necessary changes to support the update in register
usage and also enhances existing test case to check for expected
behavior across SMC call.
Link to the SMCCC spec:
https://developer.arm.com/docs/den0028/c
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Change-Id: I9e5a3e4f9de388cb9a7426b0eae1c0fa1229292a
diff --git a/lib/smc/aarch32/asm_smc.S b/lib/smc/aarch32/asm_smc.S
index 908b8d0..1070864 100644
--- a/lib/smc/aarch32/asm_smc.S
+++ b/lib/smc/aarch32/asm_smc.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017, Arm Limited. All rights reserved.
+ * Copyright (c) 2016-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -26,10 +26,10 @@
smc #0
/*
- * The returned values from the SMC are in r0-r3, put them in the
+ * The returned values from the SMC are in r0-r7, put them in the
* 'smc_ret_values' return structure.
*/
- stm r8, {r0 - r3}
+ stm r8, {r0 - r7}
pop {r4 - r9}
bx lr
diff --git a/lib/smc/aarch64/asm_smc.S b/lib/smc/aarch64/asm_smc.S
index 1180f51..c3044a4 100644
--- a/lib/smc/aarch64/asm_smc.S
+++ b/lib/smc/aarch64/asm_smc.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2017, Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -34,17 +34,19 @@
*/
str x8, [sp, #-16]!
- /* SMC arguments are already stored in x0-x6 */
+ /* SMC arguments are already stored in x0-x7 */
smc #0
/* Pop x8 into a caller-saved register */
ldr x9, [sp], #16
/*
- * Return values are stored in x0-x3, put them in the 'smc_ret_values'
+ * Return values are stored in x0-x7, put them in the 'smc_ret_values'
* return structure
*/
stp x0, x1, [x9, #0]
stp x2, x3, [x9, #16]
+ stp x4, x5, [x9, #32]
+ stp x6, x7, [x9, #48]
ret
endfunc asm_tftf_smc64