diff --git a/docs/about/maintainers.rst b/docs/about/maintainers.rst
index f7cf3de..bb15b64 100644
--- a/docs/about/maintainers.rst
+++ b/docs/about/maintainers.rst
@@ -7,6 +7,10 @@
 Please note the maintainers' bandwidth is limited and contributions to this
 project will be reviewed and handled on a best-effort basis.
 
+.. |M| replace:: **Mail**
+.. |G| replace:: **GitHub ID**
+.. |F| replace:: **Files**
+
 Maintainers List
 ----------------
 
@@ -42,6 +46,10 @@
 :|F|: tftf/tests/tests-versal.mk
 :|F|: tftf/tests/tests-versal.xml
 
+.. _Akshay-Belsare: https://github.com/Akshay-Belsare
+.. _amit-nagal: https://github.com/amit-nagal
+.. _michalsimek: https://github.com/michalsimek
+
 --------------
 
 *Copyright (c) 2018-2020, Arm Limited. All rights reserved.*
diff --git a/docs/change-log.rst b/docs/change-log.rst
index 964b13c..1bf1f68 100644
--- a/docs/change-log.rst
+++ b/docs/change-log.rst
@@ -280,7 +280,7 @@
     - Fixed test case test_smccc_callee_preserved.
     - Updated definitions for sysregs on older toolchains.
     - Fixed undef_injection_handler to clarify it catches both undef injections
-  and EL2 register traps.
+      and EL2 register traps.
 
 Version 2.11
 ------------
diff --git a/docs/plat/xilinx-versal2.rst b/docs/plat/xilinx-versal2.rst
index 841340e..14a290e 100644
--- a/docs/plat/xilinx-versal2.rst
+++ b/docs/plat/xilinx-versal2.rst
@@ -5,7 +5,7 @@
 
 
 AMD Versal Gen 2
-=============
+================
 
 - Logs are available only on console and not saved in memory(No NVM support).
 - Versal Gen 2 Platform uses TTC Timer
diff --git a/docs/plat/xilinx-versal_net.rst b/docs/plat/xilinx-versal_net.rst
index 1886489..107ce2f 100644
--- a/docs/plat/xilinx-versal_net.rst
+++ b/docs/plat/xilinx-versal_net.rst
@@ -14,10 +14,13 @@
 For individual tests/test suite:
 
 .. code-block:: shell
+
         make CROSS_COMPILE=aarch64-none-elf- PLAT=versal_net TESTS=<required tests> tftf
+
 For Versal NET Specific tests (includes AMD-Xilinx Tests cases + Standard Test Suite)
 
 .. code-block:: shell
+
         make CROSS_COMPILE=aarch64-none-elf- PLAT=versal_net TESTS=versal tftf
 
 Execution on Target
@@ -27,6 +30,7 @@
 - To package the tftf.elf in BOOT.BIN, the u-boot entry in bootgen.bif needs to be replaced with following
 
 .. code-block:: shell
+
         the_ROM_image:
         {
                 image {
diff --git a/docs/porting/optional-mods.rst b/docs/porting/optional-mods.rst
index 7fc3813..79f07aa 100644
--- a/docs/porting/optional-mods.rst
+++ b/docs/porting/optional-mods.rst
@@ -51,7 +51,7 @@
 unserviced, which eventually asserts the reset signal.
 
 Function : plat_pcie_get_info_table()
-----------------------------
+-------------------------------------
 
 ::