feat(hcx): modified test to also check for reset value
Previous test only checked for the presence of FEAT_HCX.
However, as register HCRX_EL2 is initialized in EL3,
the value read from it should be its reset value.
As the test already existed, there is no new CI config.
It can be run by using test group:
tftf-l2-fvp/fvp-hcx-aarch64-only,fvp-hcx:fvp-tftf-fip.tftf-foundationv8
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: I7fcd3d868fa4a7b4aee53fe3b141e8da1f670c0a
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index e48e51c..8d1adbd 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -1198,10 +1198,18 @@
* FEAT_HCX - Extended Hypervisor Configuration Register
******************************************************************************/
#define HCRX_EL2 S3_4_C1_C2_2
+#define HCRX_EL2_MSCEn_BIT (UL(1) << 11)
+#define HCRX_EL2_MCE2_BIT (UL(1) << 10)
+#define HCRX_EL2_CMOW_BIT (UL(1) << 9)
+#define HCRX_EL2_VFNMI_BIT (UL(1) << 8)
+#define HCRX_EL2_VINMI_BIT (UL(1) << 7)
+#define HCRX_EL2_TALLINT_BIT (UL(1) << 6)
+#define HCRX_EL2_SMPME_BIT (UL(1) << 5)
#define HCRX_EL2_FGTnXS_BIT (UL(1) << 4)
#define HCRX_EL2_FnXS_BIT (UL(1) << 3)
#define HCRX_EL2_EnASR_BIT (UL(1) << 2)
#define HCRX_EL2_EnALS_BIT (UL(1) << 1)
#define HCRX_EL2_EnAS0_BIT (UL(1) << 0)
+#define HCRX_EL2_INIT_VAL ULL(0x0)
#endif /* ARCH_H */
diff --git a/tftf/tests/extensions/hcx/test_hcx.c b/tftf/tests/extensions/hcx/test_hcx.c
index ebc6e81..3621f21 100644
--- a/tftf/tests/extensions/hcx/test_hcx.c
+++ b/tftf/tests/extensions/hcx/test_hcx.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021, Arm Limited. All rights reserved.
+ * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,16 +13,32 @@
test_result_t test_feat_hcx_enabled(void)
{
#ifdef __aarch64__
+ u_register_t hcrx_el2;
+
/* Make sure FEAT_HCX is supported. */
if (!get_feat_hcx_support()) {
return TEST_RESULT_SKIPPED;
}
/* Attempt to read HCRX_EL2, if not enabled this should trap to EL3. */
- read_hcrx_el2();
+ hcrx_el2 = read_hcrx_el2();
- /* If we make it this far, the test was successful. */
- return TEST_RESULT_SUCCESS;
+ /*
+ * If we make it this far, access to HCRX_EL2 was not trapped, and
+ * therefore FEAT_HCX is supported.
+ */
+ if (hcrx_el2 == HCRX_EL2_INIT_VAL) {
+ /*
+ * If the value of the register is the reset value, the test
+ * passed.
+ */
+ return TEST_RESULT_SUCCESS;
+ }
+ /*
+ * Otherwise, the test fails, as the HCRX_EL2 register has
+ * not been initialized properly.
+ */
+ return TEST_RESULT_FAIL;
#else
/* Skip test if AArch32 */
return TEST_RESULT_SKIPPED;