blob: 997bc61d7476c937647c06ebdc5d3b786756d664 [file] [log] [blame]
#
# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
#
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# Disable the listed tests for Versal Platform.
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#TESTS: tftf-validation
Framework Validation/Events API
Timer framework Validation/Target timer to a power down cpu
Timer framework Validation/Test scenario where multiple CPUs call same timeout
#TESTS: Boot requirement tests
Boot requirement tests
#TESTS: psci
PSCI Affinity Info/Affinity info level0 powerdown
PSCI CPU Suspend/CPU suspend to powerdown at level 0
PSCI CPU Suspend/CPU suspend to powerdown at level 1
PSCI CPU Suspend/CPU suspend to powerdown at level 2
PSCI CPU Suspend/CPU suspend to standby at level 0
PSCI CPU Suspend/CPU suspend to standby at level 1
PSCI CPU Suspend/CPU suspend to standby at level 2
PSCI CPU Suspend in OSI mode
CPU Hotplug/Invalid entry point
PSCI System Suspend Validation/System suspend multiple times
PSCI System Suspend Validation/system suspend from all cores
PSCI System Suspend Validation/Validate suspend to RAM functionality
#Query runtime services
Query runtime services/Query Vendor-Specific Service
Query runtime services/Probe PMF Version
#TESTS: el3-power-state
EL3 power state parser validation/Create all power states and validate EL3 power state parsing
EL3 power state parser validation/Create invalid local power state at all levels and validate EL3 power state parsing
EL3 power state parser validation/Create invalid power state type and validate EL3 power state parsing
EL3 power state parser validation/Create a power state with valid and invalid local state ID at different levels and validate power state parsing
#TESTS: psci-extensive
PSCI CPU ON OFF Stress Tests/PSCI CPU ON OFF stress test
PSCI CPU ON OFF Stress Tests/Repeated hotplug of all cores to stress test CPU_ON and CPU_OFF
PSCI CPU ON OFF Stress Tests/Random hotplug cores in a large iteration to stress boot path code
#TESTS: TSP
IRQ support in TSP/Resume preempted STD SMC after PSCI CPU OFF/ON cycle
IRQ support in TSP/Resume preempted STD SMC after PSCI SYSTEM SUSPEND
IRQ support in TSP/Resume preempted STD SMC
TSP PSTATE test
#TESTS: runtime-instrumentation
Runtime Instrumentation Validation
#TESTS: debugfs
DebugFS