| commit | b1467682a26053428c34eb363ba06391dcbf77eb | [log] [tgz] |
|---|---|---|
| author | Imre Kis <imre.kis@arm.com> | Thu Aug 28 14:38:36 2025 +0200 |
| committer | Imre Kis <imre.kis@arm.com> | Tue Sep 16 14:57:48 2025 +0200 |
| tree | af2c57fb047817f280270ffa4bb4c275064359b3 | |
| parent | 6e191237b069712f613e42592fd08fe326da1ffc [diff] |
fix(psci): mask MBZ bits in PSCI target_cpu arguments The PSCI specification defines the target_cpu values almost the same as the MPIDR_EL1 register value, however it only contains the Aff0-3 fields and the rest is declared as MBZ. Mask the MBZ bits to follow the PSCI specification. Change-Id: I4196b5039aa774b357cb6932d3c2c24060f1f228 Signed-off-by: Imre Kis <imre.kis@arm.com>