commit a75b61043527655ffdca008a8d47fbb4cc17431b
author Yann Gautier <yann.gautier@st.com> Tue Oct 14 12:11:52 2025 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Tue Oct 14 12:11:52 2025 +0000
tree 32db39cc1beed611b52f1c7aa44b3ca0a9e993ea
parent ed52bf5682c652e9d82a5a2e6869774bb300ed08
parent adc86ecbe0aff82859a5f2f215d8199b77409413

Merge "fix(versal2): correct SLCR base for timer interrupt"

plat/amd/versal2/include/platform_def.h

diff --git a/plat/amd/versal2/include/platform_def.h b/plat/amd/versal2/include/platform_def.h
index 89a8cde..206f292 100644
--- a/plat/amd/versal2/include/platform_def.h
+++ b/plat/amd/versal2/include/platform_def.h
@@ -66,13 +66,13 @@
 #define GIC_BASE				GICD_REG_BASE
 #define GIC_SIZE				U(0x01000000)
 
-#define TTC_BASE				U(0xF1E70000)
+#define TTC_BASE				U(0xF1E60000)
 #define TTC_SIZE				U(0x00010000)
 
 #define SYS_CNT_BASE1				TTC_BASE
 #define SYS_CNT_SIZE				TTC_SIZE
 
-#define LPD_IOU_SLCR				U(0xEB410000)
+#define LPD_IOU_SLCR				U(0xF1A20000)
 #define LPD_IOU_SLCR_SIZE			U(0x00010000)
 
 /* ARM PL011 UART */