fix(sme): enable SME/SME2 during arch init
This change enables SME/SME2 for nonsecure use at EL2 for TFTF cases
during arch_setup. This removes dependency on testcases to explicitly
call sme_enable or sme2_enable to access SME or SME2 functionality.
This change also adds CPTR_EL2 register in suspend context. CPTR_EL2
register is saved/restored in CPU suspend entry/exit path.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I2c99fd49c48c1a9ff2110747714db858a78d3a32
diff --git a/tftf/tests/extensions/sme/test_sme.c b/tftf/tests/extensions/sme/test_sme.c
index 64391ab..6d85183 100644
--- a/tftf/tests/extensions/sme/test_sme.c
+++ b/tftf/tests/extensions/sme/test_sme.c
@@ -71,13 +71,11 @@
unsigned int requested_vector_len;
unsigned int len_max;
unsigned int __unused svl_max = 0U;
+ u_register_t saved_smcr;
/* Skip the test if SME is not supported. */
SKIP_TEST_IF_SME_NOT_SUPPORTED();
- /* Enable SME for use at NS EL2. */
- sme_enable();
-
/* Make sure TPIDR2_EL0 is accessible. */
write_tpidr2_el0(0);
if (read_tpidr2_el0() != 0) {
@@ -97,8 +95,12 @@
/* Entering Streaming SVE mode */
sme_smstart(SMSTART_SM);
+ saved_smcr = read_smcr_el2();
+
/* Write SMCR_EL2 with the LEN max to find implemented width. */
write_smcr_el2(SME_SMCR_LEN_MAX);
+ isb();
+
len_max = (unsigned int)read_smcr_el2();
VERBOSE("Maximum SMCR_EL2.LEN value: 0x%x\n", len_max);
VERBOSE("Enumerating supported vector lengths...\n");
@@ -108,6 +110,7 @@
reg &= ~(SMCR_ELX_LEN_MASK << SMCR_ELX_LEN_SHIFT);
reg |= (i << SMCR_ELX_LEN_SHIFT);
write_smcr_el2(reg);
+ isb();
/* Compute current and requested vector lengths in bits. */
current_vector_len = ((unsigned int)sme_rdvl_1() * 8U);
@@ -164,6 +167,9 @@
sme_try_illegal_instruction();
}
+ write_smcr_el2(saved_smcr);
+ isb();
+
return TEST_RESULT_SUCCESS;
#endif /* __aarch64__ */
}
diff --git a/tftf/tests/extensions/sme/test_sme2.c b/tftf/tests/extensions/sme/test_sme2.c
index c16b7c3..e82da08 100644
--- a/tftf/tests/extensions/sme/test_sme2.c
+++ b/tftf/tests/extensions/sme/test_sme2.c
@@ -55,18 +55,16 @@
/* Skip the test if SME2 is not supported. */
SKIP_TEST_IF_SME2_NOT_SUPPORTED();
- /* Enable SME2 for use at NS EL2. */
- sme2_enable();
-
/*
* FEAT_SME2 adds a 512 BIT architectural register ZT0 to support
* the lookup-table feature.
* System register SMCR_ELx defines a bit SMCR_ELx.EZT0 bit [30] to
- * enable/disable access to this register.
+ * enable/disable access to this register. SMCR_EL2_RESET_VAL enables
+ * this bit by default.
*
* Instructions to access ZT0 register are being tested to ensure
- * SMCR_ELx.EZT0 bit is set at( EL-3 as well as EL-2), so that
- * they are not trapped.
+ * SMCR_EL3.EZT0 bit is set by EL3 firmware so that EL2 access are not
+ * trapped.
*/
/* Make sure we can acesss SME2 ZT0 storage, PSTATE.ZA = 1*/