feat(amd): add test for pll EEMI APIs
Add test for pll EEMI APIs within the TF-A test
framework. The purpose of this test is to validate
functionality and reliability of various pll operations
Test cover the following EEMI APIs:
- xpm_pll_set_parameter
- xpm_pll_get_parameter
- xpm_pll_get_mode
- xpm_pll_set_mode
Change-Id: I1a2c88edc247dd4783ed52bc7e731b1d18b139e9
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
diff --git a/tftf/tests/plat/amd/common/common_files/eemi_api.c b/tftf/tests/plat/amd/common/common_files/eemi_api.c
index 96a5c4c..86f8f7f 100644
--- a/tftf/tests/plat/amd/common/common_files/eemi_api.c
+++ b/tftf/tests/plat/amd/common/common_files/eemi_api.c
@@ -455,3 +455,43 @@
return eemi_call(PM_SYSTEM_SHUTDOWN, ((uint64_t)subtype << 32 | type),
0, 0, 0, 0, 0, 0, ret_payload);
}
+
+int xpm_pll_set_parameter(const uint32_t clock_id, const uint32_t param_id, const uint32_t value)
+{
+ uint32_t ret_payload[PAYLOAD_ARG_CNT];
+
+ return eemi_call(PM_PLL_SET_PARAMETER, ((uint64_t)param_id << 32 | clock_id),
+ value, 0, 0, 0, 0, 0, ret_payload);
+}
+
+int xpm_pll_get_parameter(const uint32_t clock_id, const uint32_t param_id, uint32_t *value)
+{
+ uint32_t ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = eemi_call(PM_PLL_GET_PARAMETER, clock_id, param_id, 0, 0, 0, 0, 0, ret_payload);
+ if (ret == PM_RET_SUCCESS)
+ *value = ret_payload[1];
+
+ return ret;
+}
+
+int xpm_pll_set_mode(const uint32_t clock_id, const uint32_t value)
+{
+ uint32_t ret_payload[PAYLOAD_ARG_CNT];
+
+ return eemi_call(PM_PLL_SET_MODE, ((uint64_t)value << 32 | clock_id), 0,
+ 0, 0, 0, 0, 0, ret_payload);
+}
+
+int xpm_pll_get_mode(const uint32_t clock_id, uint32_t *value)
+{
+ uint32_t ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = eemi_call(PM_PLL_GET_MODE, clock_id, 0, 0, 0, 0, 0, 0, ret_payload);
+ if (ret == PM_RET_SUCCESS)
+ *value = ret_payload[1];
+
+ return ret;
+}
diff --git a/tftf/tests/plat/amd/common/common_files/eemi_api.h b/tftf/tests/plat/amd/common/common_files/eemi_api.h
index bcebe78..14cc66f 100644
--- a/tftf/tests/plat/amd/common/common_files/eemi_api.h
+++ b/tftf/tests/plat/amd/common/common_files/eemi_api.h
@@ -43,6 +43,10 @@
uint32_t shutdown_subtype; /**< Shutdown subtype (subsystem-only/PU-only/system) */
};
+struct test_pll_api {
+ uint32_t clock_id; /**< Clock ID */
+};
+
int xpm_get_api_version(uint32_t *version);
int xpm_get_chip_id(uint32_t *id_code, uint32_t *version);
int xpm_feature_check(const uint32_t api_id, uint32_t *const version);
@@ -79,5 +83,11 @@
int tf_a_pm_register_sgi(uint32_t sgi_num, uint32_t reset);
int xpm_op_characteristics(uint32_t const device_id, uint32_t const type, uint32_t *result);
int xpm_system_shutdown(const uint32_t type, const uint32_t subtype);
+int xpm_pll_set_parameter(const uint32_t clock_id, const uint32_t param_id,
+ const uint32_t value);
+int xpm_pll_get_parameter(const uint32_t clock_id, const uint32_t param_id,
+ uint32_t *value);
+int xpm_pll_set_mode(const uint32_t clock_id, const uint32_t value);
+int xpm_pll_get_mode(const uint32_t clock_id, uint32_t *value);
#endif /* __EEMI_API_H__ */
diff --git a/tftf/tests/plat/amd/common/common_files/xpm_defs.h b/tftf/tests/plat/amd/common/common_files/xpm_defs.h
index 5f8095b..0bd8177 100644
--- a/tftf/tests/plat/amd/common/common_files/xpm_defs.h
+++ b/tftf/tests/plat/amd/common/common_files/xpm_defs.h
@@ -265,4 +265,30 @@
PM_OPCHAR_TYPE_LATENCY, /**< Operating characteristic ID latency */
};
+/**
+ * PLL parameters
+ */
+enum xpm_pll_config_params {
+ PM_PLL_PARAM_ID_DIV2, /**< PLL param ID DIV2 */
+ PM_PLL_PARAM_ID_FBDIV, /**< PLL param ID FBDIV */
+ PM_PLL_PARAM_ID_DATA, /**< PLL param ID DATA */
+ PM_PLL_PARAM_ID_PRE_SRC, /**< PLL param ID PRE_SRC */
+ PM_PLL_PARAM_ID_POST_SRC, /**< PLL param ID POST_SRC */
+ PM_PLL_PARAM_ID_LOCK_DLY, /**< PLL param ID LOCK_DLY */
+ PM_PLL_PARAM_ID_LOCK_CNT, /**< PLL param ID LOCK_CNT */
+ PM_PLL_PARAM_ID_LFHF, /**< PLL param ID LFHF */
+ PM_PLL_PARAM_ID_CP, /**< PLL param ID CP */
+ PM_PLL_PARAM_ID_RES, /**< PLL param ID RES */
+ PM_PLL_PARAM_MAX, /**< PLL param ID max */
+};
+
+/**
+ * PLL modes
+ */
+enum xpm_pll_mode {
+ PM_PLL_MODE_INTEGER = (0U), /**< PLL mode integer */
+ PM_PLL_MODE_FRACTIONAL = (1U), /**< PLL mode fractional */
+ PM_PLL_MODE_RESET = (2U), /**< PLL mode reset */
+};
+
#endif /* XPM_DEFS_H_ */
diff --git a/tftf/tests/plat/amd/common/pll_test/pll_test.c b/tftf/tests/plat/amd/common/pll_test/pll_test.c
new file mode 100644
index 0000000..245d5a4
--- /dev/null
+++ b/tftf/tests/plat/amd/common/pll_test/pll_test.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "eemi_api.h"
+#include "xpm_nodeid.h"
+
+struct test_pll_api test_pll[] = {
+ {
+ .clock_id = PM_CLK_RPU_PLL,
+ },
+};
+
+/*
+ * This function is used to set the parameters for specified PLL clock.
+ */
+test_result_t test_pll_set_parameter(void)
+{
+ int32_t status, i;
+
+ for (i = 0; i < ARRAY_SIZE(test_pll); i++) {
+ uint32_t clock_id = test_pll[i].clock_id;
+
+ status = xpm_pll_set_parameter(clock_id, PM_PLL_PARAM_ID_FBDIV, 10);
+ if (status == PM_RET_SUCCESS) {
+ tftf_testcase_printf("%s ERROR PLL Set Parameter for Clock ID: 0x%x, "
+ "Status: 0x%x\n", __func__, clock_id, status);
+ return TEST_RESULT_FAIL;
+ }
+ }
+
+ return TEST_RESULT_SUCCESS;
+}
+
+/*
+ * This function is used to get the parameter of specified PLL clock.
+ */
+test_result_t test_pll_get_parameter(void)
+{
+ int32_t status, i;
+ uint32_t value;
+
+ for (i = 0; i < ARRAY_SIZE(test_pll); i++) {
+ uint32_t clock_id = test_pll[i].clock_id;
+
+ status = xpm_pll_get_parameter(clock_id, PM_PLL_PARAM_ID_FBDIV, &value);
+ if (status != PM_RET_SUCCESS) {
+ tftf_testcase_printf("%s ERROR PLL Get Parameter for Clock ID: 0x%x, "
+ "Status: 0x%x\n", __func__, clock_id, status);
+ return TEST_RESULT_FAIL;
+ }
+ tftf_testcase_printf("Value = %x\n\r", value);
+ }
+
+ return TEST_RESULT_SUCCESS;
+}
+
+/*
+ * This function is used to set the mode of specified PLL clock
+ */
+test_result_t test_pll_set_mode(void)
+{
+ int32_t status, i;
+
+ for (i = 0; i < ARRAY_SIZE(test_pll); i++) {
+ uint32_t clock_id = test_pll[i].clock_id;
+
+ status = xpm_pll_set_mode(clock_id, PM_PLL_MODE_RESET);
+ if (status == PM_RET_SUCCESS) {
+ tftf_testcase_printf("%s ERROR PLL Set Mode for Clock ID: 0x%x, "
+ "Status: 0x%x\n", __func__, clock_id, status);
+ return TEST_RESULT_FAIL;
+ }
+ }
+
+ return TEST_RESULT_SUCCESS;
+}
+
+/*
+ * This function is used to get the mode of specified PLL clock
+ */
+test_result_t test_pll_get_mode(void)
+{
+ int32_t status, i;
+ uint32_t value;
+
+ for (i = 0; i < ARRAY_SIZE(test_pll); i++) {
+ uint32_t clock_id = test_pll[i].clock_id;
+
+ status = xpm_pll_get_mode(clock_id, &value);
+ if (status != PM_RET_SUCCESS) {
+ tftf_testcase_printf("%s ERROR PLL Get Mode for Clock ID: 0x%x, "
+ "Status: 0x%x\n", __func__, clock_id, status);
+ return TEST_RESULT_FAIL;
+ }
+ tftf_testcase_printf("Mode = %x\n\r", value);
+ }
+
+ return TEST_RESULT_SUCCESS;
+}
diff --git a/tftf/tests/tests-versal.xml b/tftf/tests/tests-versal.xml
index 10b96ca..d967fdb 100644
--- a/tftf/tests/tests-versal.xml
+++ b/tftf/tests/tests-versal.xml
@@ -35,6 +35,10 @@
<testcase name="Get operating characteristics" function="test_op_characteristics" />
<testcase name="Get operating characteristics with invalid params" function="test_op_characteristics_invalid_param" />
<testcase name="System Shutdown" function="test_system_shutdown" />
+ <testcase name="Set PLL Mode" function="test_pll_set_mode" />
+ <testcase name="Get PLL Mode" function="test_pll_get_mode" />
+ <testcase name="Set PLL parameter " function="test_pll_set_parameter" />
+ <testcase name="Get PLL parameter " function="test_pll_get_parameter" />
</testsuite>
</testsuites>