feat(rme): add dev granules tests

Add tests for RMI_GRANULE_DELEGATE and
RMI_GRANULE_UNDELEGATE commands using
device granules.
Add plat_get_dev_region() function to
retrieve platform PCIe memory region info.

Change-Id: Ie59361dd28e11db348c30b033c156de044aa0ffc
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
diff --git a/include/common/test_helpers.h b/include/common/test_helpers.h
index 1ab35ba..6482d6d 100644
--- a/include/common/test_helpers.h
+++ b/include/common/test_helpers.h
@@ -391,7 +391,7 @@
 	do {									\
 		u_register_t retrmm = 0U;					\
 										\
-		if (!get_armv9_2_feat_rme_support()) {				\
+		if (get_armv9_2_feat_rme_support() == 0U) {			\
 			tftf_testcase_printf("FEAT_RME not supported\n");	\
 			return TEST_RESULT_SKIPPED;				\
 		}								\
diff --git a/include/lib/pcie/pcie_doe.h b/include/lib/pcie/pcie_doe.h
index bac0dbf..777309a 100644
--- a/include/lib/pcie/pcie_doe.h
+++ b/include/lib/pcie/pcie_doe.h
@@ -111,13 +111,13 @@
 #define SKIP_TEST_IF_DOE_NOT_SUPPORTED(_bdf, _doe_cap_base)			\
 	do {									\
 		/* Test PCIe DOE only for RME */				\
-		if (!get_armv9_2_feat_rme_support()) {				\
+		if (get_armv9_2_feat_rme_support() == 0U) {			\
 			tftf_testcase_printf("FEAT_RME not supported\n");	\
 			return TEST_RESULT_SKIPPED;				\
 		}								\
 										\
 		pcie_init();							\
-		if (pcie_find_doe_device(&(_bdf), &(_doe_cap_base)) != 0) {		\
+		if (pcie_find_doe_device(&(_bdf), &(_doe_cap_base)) != 0) {	\
 			tftf_testcase_printf("PCIe DOE not supported\n");	\
 			return TEST_RESULT_SKIPPED;				\
 		}								\
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index 8103335..e5032fa 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2024, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2025, Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -25,6 +25,13 @@
 	} while (0)
 
 /*
+ * Represents whether a device memory location is within the system coherent
+ * memory space.
+ */
+#define DEV_MEM_NON_COHERENT			0
+#define DEV_MEM_COHERENT			1
+
+/*
  * The platform structure to represent the valid local power state
  * properties for a particular affinity level. The platform needs to
  * export the array of valid local low power states for each affinity level
@@ -213,4 +220,10 @@
  */
 uintptr_t plat_get_invalid_addr(void);
 
+/*
+ * Retrieve platform PCIe memory region
+ */
+int plat_get_dev_region(uint64_t *dev_base, size_t *dev_size,
+			uint32_t dev_type, uint32_t dev_idx);
+
 #endif /* __PLATFORM_H__ */
diff --git a/include/runtime_services/host_realm_managment/host_realm_rmi.h b/include/runtime_services/host_realm_managment/host_realm_rmi.h
index 4a87ede..571f129 100644
--- a/include/runtime_services/host_realm_managment/host_realm_rmi.h
+++ b/include/runtime_services/host_realm_managment/host_realm_rmi.h
@@ -324,16 +324,6 @@
 #define RMI_RTT_SET_RIPAS		SMC64_RMI_FID(U(0x19))
 
 /*
- * FID: 0xC4000170
- */
-#define SMC_RMI_GRANULE_DEV_DELEGATE		SMC64_RMI_FID(U(0x20))
-
-/*
- * FID: 0xC4000171
- */
-#define SMC_RMI_GRANULE_DEV_UNDELEGATE		SMC64_RMI_FID(U(0x21))
-
-/*
  * FID: 0xC4000172
  */
 #define SMC_RMI_DEV_MAP				SMC64_RMI_FID(U(0x22))