Fix: drivers/gic: Relax GICD_ITARGETSR assertion for unicore
As per the GICv2 arch specification, section 4.3.12 in a uniprocessor
implementation all interrupts target one processor and the
GICD_ITARGETSRs are RAZ/WI. The assert on the gicd_itargets_val in the
gic_v2 driver causes the tftf to halt on uniprocessor systems. Thus,
skip the assert on uniprocessor systems.
Change-Id: I471836b413a7835487de3a5dd9cf0e3b6d28b523
Signed-off-by: Pranjal Shrivastava <praan@google.com>
diff --git a/drivers/arm/gic/gic_v2.c b/drivers/arm/gic/gic_v2.c
index ef93007..f91427c 100644
--- a/drivers/arm/gic/gic_v2.c
+++ b/drivers/arm/gic/gic_v2.c
@@ -130,7 +130,9 @@
core_pos = platform_get_core_pos(read_mpidr_el1());
gicd_itargets_val = gicd_read_itargetsr(gicd_base_addr, 0);
- assert(gicd_itargets_val);
+ /* In a uniprocessor implementation the GICD_ITARGETSRs are RAZ/WI. */
+ if (PLATFORM_CORE_COUNT > 1)
+ assert(gicd_itargets_val);
/* Convert the bit pos returned by read of ITARGETSR0 to GIC CPU ID */
gic_cpu_id[core_pos] = __builtin_ctz(gicd_itargets_val);